mcxa_pac/lpspi0/
ier.rs

1#[doc = "Register `IER` reader"]
2pub type R = crate::R<IerSpec>;
3#[doc = "Register `IER` writer"]
4pub type W = crate::W<IerSpec>;
5#[doc = "Transmit Data Interrupt Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Tdie {
9    #[doc = "0: Disable"]
10    Disable = 0,
11    #[doc = "1: Enable"]
12    Enable = 1,
13}
14impl From<Tdie> for bool {
15    #[inline(always)]
16    fn from(variant: Tdie) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `TDIE` reader - Transmit Data Interrupt Enable"]
21pub type TdieR = crate::BitReader<Tdie>;
22impl TdieR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Tdie {
26        match self.bits {
27            false => Tdie::Disable,
28            true => Tdie::Enable,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_disable(&self) -> bool {
34        *self == Tdie::Disable
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_enable(&self) -> bool {
39        *self == Tdie::Enable
40    }
41}
42#[doc = "Field `TDIE` writer - Transmit Data Interrupt Enable"]
43pub type TdieW<'a, REG> = crate::BitWriter<'a, REG, Tdie>;
44impl<'a, REG> TdieW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn disable(self) -> &'a mut crate::W<REG> {
51        self.variant(Tdie::Disable)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn enable(self) -> &'a mut crate::W<REG> {
56        self.variant(Tdie::Enable)
57    }
58}
59#[doc = "Receive Data Interrupt Enable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Rdie {
63    #[doc = "0: Disable"]
64    Disable = 0,
65    #[doc = "1: Enable"]
66    Enable = 1,
67}
68impl From<Rdie> for bool {
69    #[inline(always)]
70    fn from(variant: Rdie) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `RDIE` reader - Receive Data Interrupt Enable"]
75pub type RdieR = crate::BitReader<Rdie>;
76impl RdieR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Rdie {
80        match self.bits {
81            false => Rdie::Disable,
82            true => Rdie::Enable,
83        }
84    }
85    #[doc = "Disable"]
86    #[inline(always)]
87    pub fn is_disable(&self) -> bool {
88        *self == Rdie::Disable
89    }
90    #[doc = "Enable"]
91    #[inline(always)]
92    pub fn is_enable(&self) -> bool {
93        *self == Rdie::Enable
94    }
95}
96#[doc = "Field `RDIE` writer - Receive Data Interrupt Enable"]
97pub type RdieW<'a, REG> = crate::BitWriter<'a, REG, Rdie>;
98impl<'a, REG> RdieW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Disable"]
103    #[inline(always)]
104    pub fn disable(self) -> &'a mut crate::W<REG> {
105        self.variant(Rdie::Disable)
106    }
107    #[doc = "Enable"]
108    #[inline(always)]
109    pub fn enable(self) -> &'a mut crate::W<REG> {
110        self.variant(Rdie::Enable)
111    }
112}
113#[doc = "Word Complete Interrupt Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Wcie {
117    #[doc = "0: Disable"]
118    Disable = 0,
119    #[doc = "1: Enable"]
120    Enable = 1,
121}
122impl From<Wcie> for bool {
123    #[inline(always)]
124    fn from(variant: Wcie) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `WCIE` reader - Word Complete Interrupt Enable"]
129pub type WcieR = crate::BitReader<Wcie>;
130impl WcieR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Wcie {
134        match self.bits {
135            false => Wcie::Disable,
136            true => Wcie::Enable,
137        }
138    }
139    #[doc = "Disable"]
140    #[inline(always)]
141    pub fn is_disable(&self) -> bool {
142        *self == Wcie::Disable
143    }
144    #[doc = "Enable"]
145    #[inline(always)]
146    pub fn is_enable(&self) -> bool {
147        *self == Wcie::Enable
148    }
149}
150#[doc = "Field `WCIE` writer - Word Complete Interrupt Enable"]
151pub type WcieW<'a, REG> = crate::BitWriter<'a, REG, Wcie>;
152impl<'a, REG> WcieW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Disable"]
157    #[inline(always)]
158    pub fn disable(self) -> &'a mut crate::W<REG> {
159        self.variant(Wcie::Disable)
160    }
161    #[doc = "Enable"]
162    #[inline(always)]
163    pub fn enable(self) -> &'a mut crate::W<REG> {
164        self.variant(Wcie::Enable)
165    }
166}
167#[doc = "Frame Complete Interrupt Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Fcie {
171    #[doc = "0: Disable"]
172    Disable = 0,
173    #[doc = "1: Enable"]
174    Enable = 1,
175}
176impl From<Fcie> for bool {
177    #[inline(always)]
178    fn from(variant: Fcie) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `FCIE` reader - Frame Complete Interrupt Enable"]
183pub type FcieR = crate::BitReader<Fcie>;
184impl FcieR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Fcie {
188        match self.bits {
189            false => Fcie::Disable,
190            true => Fcie::Enable,
191        }
192    }
193    #[doc = "Disable"]
194    #[inline(always)]
195    pub fn is_disable(&self) -> bool {
196        *self == Fcie::Disable
197    }
198    #[doc = "Enable"]
199    #[inline(always)]
200    pub fn is_enable(&self) -> bool {
201        *self == Fcie::Enable
202    }
203}
204#[doc = "Field `FCIE` writer - Frame Complete Interrupt Enable"]
205pub type FcieW<'a, REG> = crate::BitWriter<'a, REG, Fcie>;
206impl<'a, REG> FcieW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disable"]
211    #[inline(always)]
212    pub fn disable(self) -> &'a mut crate::W<REG> {
213        self.variant(Fcie::Disable)
214    }
215    #[doc = "Enable"]
216    #[inline(always)]
217    pub fn enable(self) -> &'a mut crate::W<REG> {
218        self.variant(Fcie::Enable)
219    }
220}
221#[doc = "Transfer Complete Interrupt Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Tcie {
225    #[doc = "0: Disable"]
226    Disable = 0,
227    #[doc = "1: Enable"]
228    Enable = 1,
229}
230impl From<Tcie> for bool {
231    #[inline(always)]
232    fn from(variant: Tcie) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `TCIE` reader - Transfer Complete Interrupt Enable"]
237pub type TcieR = crate::BitReader<Tcie>;
238impl TcieR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Tcie {
242        match self.bits {
243            false => Tcie::Disable,
244            true => Tcie::Enable,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_disable(&self) -> bool {
250        *self == Tcie::Disable
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_enable(&self) -> bool {
255        *self == Tcie::Enable
256    }
257}
258#[doc = "Field `TCIE` writer - Transfer Complete Interrupt Enable"]
259pub type TcieW<'a, REG> = crate::BitWriter<'a, REG, Tcie>;
260impl<'a, REG> TcieW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn disable(self) -> &'a mut crate::W<REG> {
267        self.variant(Tcie::Disable)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn enable(self) -> &'a mut crate::W<REG> {
272        self.variant(Tcie::Enable)
273    }
274}
275#[doc = "Transmit Error Interrupt Enable\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Teie {
279    #[doc = "0: Disable"]
280    Disable = 0,
281    #[doc = "1: Enable"]
282    Enable = 1,
283}
284impl From<Teie> for bool {
285    #[inline(always)]
286    fn from(variant: Teie) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `TEIE` reader - Transmit Error Interrupt Enable"]
291pub type TeieR = crate::BitReader<Teie>;
292impl TeieR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Teie {
296        match self.bits {
297            false => Teie::Disable,
298            true => Teie::Enable,
299        }
300    }
301    #[doc = "Disable"]
302    #[inline(always)]
303    pub fn is_disable(&self) -> bool {
304        *self == Teie::Disable
305    }
306    #[doc = "Enable"]
307    #[inline(always)]
308    pub fn is_enable(&self) -> bool {
309        *self == Teie::Enable
310    }
311}
312#[doc = "Field `TEIE` writer - Transmit Error Interrupt Enable"]
313pub type TeieW<'a, REG> = crate::BitWriter<'a, REG, Teie>;
314impl<'a, REG> TeieW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Disable"]
319    #[inline(always)]
320    pub fn disable(self) -> &'a mut crate::W<REG> {
321        self.variant(Teie::Disable)
322    }
323    #[doc = "Enable"]
324    #[inline(always)]
325    pub fn enable(self) -> &'a mut crate::W<REG> {
326        self.variant(Teie::Enable)
327    }
328}
329#[doc = "Receive Error Interrupt Enable\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Reie {
333    #[doc = "0: Disable"]
334    Disable = 0,
335    #[doc = "1: Enable"]
336    Enable = 1,
337}
338impl From<Reie> for bool {
339    #[inline(always)]
340    fn from(variant: Reie) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `REIE` reader - Receive Error Interrupt Enable"]
345pub type ReieR = crate::BitReader<Reie>;
346impl ReieR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Reie {
350        match self.bits {
351            false => Reie::Disable,
352            true => Reie::Enable,
353        }
354    }
355    #[doc = "Disable"]
356    #[inline(always)]
357    pub fn is_disable(&self) -> bool {
358        *self == Reie::Disable
359    }
360    #[doc = "Enable"]
361    #[inline(always)]
362    pub fn is_enable(&self) -> bool {
363        *self == Reie::Enable
364    }
365}
366#[doc = "Field `REIE` writer - Receive Error Interrupt Enable"]
367pub type ReieW<'a, REG> = crate::BitWriter<'a, REG, Reie>;
368impl<'a, REG> ReieW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Disable"]
373    #[inline(always)]
374    pub fn disable(self) -> &'a mut crate::W<REG> {
375        self.variant(Reie::Disable)
376    }
377    #[doc = "Enable"]
378    #[inline(always)]
379    pub fn enable(self) -> &'a mut crate::W<REG> {
380        self.variant(Reie::Enable)
381    }
382}
383#[doc = "Data Match Interrupt Enable\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Dmie {
387    #[doc = "0: Disable"]
388    Disable = 0,
389    #[doc = "1: Enable"]
390    Enable = 1,
391}
392impl From<Dmie> for bool {
393    #[inline(always)]
394    fn from(variant: Dmie) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `DMIE` reader - Data Match Interrupt Enable"]
399pub type DmieR = crate::BitReader<Dmie>;
400impl DmieR {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Dmie {
404        match self.bits {
405            false => Dmie::Disable,
406            true => Dmie::Enable,
407        }
408    }
409    #[doc = "Disable"]
410    #[inline(always)]
411    pub fn is_disable(&self) -> bool {
412        *self == Dmie::Disable
413    }
414    #[doc = "Enable"]
415    #[inline(always)]
416    pub fn is_enable(&self) -> bool {
417        *self == Dmie::Enable
418    }
419}
420#[doc = "Field `DMIE` writer - Data Match Interrupt Enable"]
421pub type DmieW<'a, REG> = crate::BitWriter<'a, REG, Dmie>;
422impl<'a, REG> DmieW<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Disable"]
427    #[inline(always)]
428    pub fn disable(self) -> &'a mut crate::W<REG> {
429        self.variant(Dmie::Disable)
430    }
431    #[doc = "Enable"]
432    #[inline(always)]
433    pub fn enable(self) -> &'a mut crate::W<REG> {
434        self.variant(Dmie::Enable)
435    }
436}
437impl R {
438    #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
439    #[inline(always)]
440    pub fn tdie(&self) -> TdieR {
441        TdieR::new((self.bits & 1) != 0)
442    }
443    #[doc = "Bit 1 - Receive Data Interrupt Enable"]
444    #[inline(always)]
445    pub fn rdie(&self) -> RdieR {
446        RdieR::new(((self.bits >> 1) & 1) != 0)
447    }
448    #[doc = "Bit 8 - Word Complete Interrupt Enable"]
449    #[inline(always)]
450    pub fn wcie(&self) -> WcieR {
451        WcieR::new(((self.bits >> 8) & 1) != 0)
452    }
453    #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
454    #[inline(always)]
455    pub fn fcie(&self) -> FcieR {
456        FcieR::new(((self.bits >> 9) & 1) != 0)
457    }
458    #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
459    #[inline(always)]
460    pub fn tcie(&self) -> TcieR {
461        TcieR::new(((self.bits >> 10) & 1) != 0)
462    }
463    #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
464    #[inline(always)]
465    pub fn teie(&self) -> TeieR {
466        TeieR::new(((self.bits >> 11) & 1) != 0)
467    }
468    #[doc = "Bit 12 - Receive Error Interrupt Enable"]
469    #[inline(always)]
470    pub fn reie(&self) -> ReieR {
471        ReieR::new(((self.bits >> 12) & 1) != 0)
472    }
473    #[doc = "Bit 13 - Data Match Interrupt Enable"]
474    #[inline(always)]
475    pub fn dmie(&self) -> DmieR {
476        DmieR::new(((self.bits >> 13) & 1) != 0)
477    }
478}
479#[cfg(feature = "debug")]
480impl core::fmt::Debug for R {
481    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
482        f.debug_struct("IER")
483            .field("tdie", &self.tdie())
484            .field("rdie", &self.rdie())
485            .field("wcie", &self.wcie())
486            .field("fcie", &self.fcie())
487            .field("tcie", &self.tcie())
488            .field("teie", &self.teie())
489            .field("reie", &self.reie())
490            .field("dmie", &self.dmie())
491            .finish()
492    }
493}
494impl W {
495    #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
496    #[inline(always)]
497    pub fn tdie(&mut self) -> TdieW<'_, IerSpec> {
498        TdieW::new(self, 0)
499    }
500    #[doc = "Bit 1 - Receive Data Interrupt Enable"]
501    #[inline(always)]
502    pub fn rdie(&mut self) -> RdieW<'_, IerSpec> {
503        RdieW::new(self, 1)
504    }
505    #[doc = "Bit 8 - Word Complete Interrupt Enable"]
506    #[inline(always)]
507    pub fn wcie(&mut self) -> WcieW<'_, IerSpec> {
508        WcieW::new(self, 8)
509    }
510    #[doc = "Bit 9 - Frame Complete Interrupt Enable"]
511    #[inline(always)]
512    pub fn fcie(&mut self) -> FcieW<'_, IerSpec> {
513        FcieW::new(self, 9)
514    }
515    #[doc = "Bit 10 - Transfer Complete Interrupt Enable"]
516    #[inline(always)]
517    pub fn tcie(&mut self) -> TcieW<'_, IerSpec> {
518        TcieW::new(self, 10)
519    }
520    #[doc = "Bit 11 - Transmit Error Interrupt Enable"]
521    #[inline(always)]
522    pub fn teie(&mut self) -> TeieW<'_, IerSpec> {
523        TeieW::new(self, 11)
524    }
525    #[doc = "Bit 12 - Receive Error Interrupt Enable"]
526    #[inline(always)]
527    pub fn reie(&mut self) -> ReieW<'_, IerSpec> {
528        ReieW::new(self, 12)
529    }
530    #[doc = "Bit 13 - Data Match Interrupt Enable"]
531    #[inline(always)]
532    pub fn dmie(&mut self) -> DmieW<'_, IerSpec> {
533        DmieW::new(self, 13)
534    }
535}
536#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
537pub struct IerSpec;
538impl crate::RegisterSpec for IerSpec {
539    type Ux = u32;
540}
541#[doc = "`read()` method returns [`ier::R`](R) reader structure"]
542impl crate::Readable for IerSpec {}
543#[doc = "`write(|w| ..)` method takes [`ier::W`](W) writer structure"]
544impl crate::Writable for IerSpec {
545    type Safety = crate::Unsafe;
546}
547#[doc = "`reset()` method sets IER to value 0"]
548impl crate::Resettable for IerSpec {}
mcxa_pac/lpspi0/ier.rs

mcxa_pac/lpspi0/
ier.rs
