mcxa_pac/flexpwm0/
outen.rs

1#[doc = "Register `OUTEN` reader"]
2pub type R = crate::R<OutenSpec>;
3#[doc = "Register `OUTEN` writer"]
4pub type W = crate::W<OutenSpec>;
5#[doc = "Field `PWMX_EN` reader - PWM_X Output Enables"]
6pub type PwmxEnR = crate::FieldReader;
7#[doc = "Field `PWMX_EN` writer - PWM_X Output Enables"]
8pub type PwmxEnW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9#[doc = "Field `PWMB_EN` reader - PWM_B Output Enables"]
10pub type PwmbEnR = crate::FieldReader;
11#[doc = "Field `PWMB_EN` writer - PWM_B Output Enables"]
12pub type PwmbEnW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `PWMA_EN` reader - PWM_A Output Enables"]
14pub type PwmaEnR = crate::FieldReader;
15#[doc = "Field `PWMA_EN` writer - PWM_A Output Enables"]
16pub type PwmaEnW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
17impl R {
18    #[doc = "Bits 0:3 - PWM_X Output Enables"]
19    #[inline(always)]
20    pub fn pwmx_en(&self) -> PwmxEnR {
21        PwmxEnR::new((self.bits & 0x0f) as u8)
22    }
23    #[doc = "Bits 4:7 - PWM_B Output Enables"]
24    #[inline(always)]
25    pub fn pwmb_en(&self) -> PwmbEnR {
26        PwmbEnR::new(((self.bits >> 4) & 0x0f) as u8)
27    }
28    #[doc = "Bits 8:11 - PWM_A Output Enables"]
29    #[inline(always)]
30    pub fn pwma_en(&self) -> PwmaEnR {
31        PwmaEnR::new(((self.bits >> 8) & 0x0f) as u8)
32    }
33}
34#[cfg(feature = "debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("OUTEN")
38            .field("pwmx_en", &self.pwmx_en())
39            .field("pwmb_en", &self.pwmb_en())
40            .field("pwma_en", &self.pwma_en())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bits 0:3 - PWM_X Output Enables"]
46    #[inline(always)]
47    pub fn pwmx_en(&mut self) -> PwmxEnW<'_, OutenSpec> {
48        PwmxEnW::new(self, 0)
49    }
50    #[doc = "Bits 4:7 - PWM_B Output Enables"]
51    #[inline(always)]
52    pub fn pwmb_en(&mut self) -> PwmbEnW<'_, OutenSpec> {
53        PwmbEnW::new(self, 4)
54    }
55    #[doc = "Bits 8:11 - PWM_A Output Enables"]
56    #[inline(always)]
57    pub fn pwma_en(&mut self) -> PwmaEnW<'_, OutenSpec> {
58        PwmaEnW::new(self, 8)
59    }
60}
61#[doc = "Output Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`outen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct OutenSpec;
63impl crate::RegisterSpec for OutenSpec {
64    type Ux = u16;
65}
66#[doc = "`read()` method returns [`outen::R`](R) reader structure"]
67impl crate::Readable for OutenSpec {}
68#[doc = "`write(|w| ..)` method takes [`outen::W`](W) writer structure"]
69impl crate::Writable for OutenSpec {
70    type Safety = crate::Unsafe;
71}
72#[doc = "`reset()` method sets OUTEN to value 0"]
73impl crate::Resettable for OutenSpec {}
mcxa_pac/flexpwm0/outen.rs

mcxa_pac/flexpwm0/
outen.rs
