mcxa_pac/flexpwm0/
dtsrcsel.rs

1#[doc = "Register `DTSRCSEL` reader"]
2pub type R = crate::R<DtsrcselSpec>;
3#[doc = "Register `DTSRCSEL` writer"]
4pub type W = crate::W<DtsrcselSpec>;
5#[doc = "Submodule 0 PWM45 Control Select\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Sm0sel45 {
10    #[doc = "0: Generated SM0PWM45 signal used by the deadtime logic."]
11    Sm0pwm45 = 0,
12    #[doc = "1: Inverted generated SM0PWM45 signal used by the deadtime logic."]
13    InvertedSm0pwm45 = 1,
14    #[doc = "2: SWCOUT\\[SM0OUT45\\] used by the deadtime logic."]
15    Sm0out45 = 2,
16}
17impl From<Sm0sel45> for u8 {
18    #[inline(always)]
19    fn from(variant: Sm0sel45) -> Self {
20        variant as _
21    }
22}
23impl crate::FieldSpec for Sm0sel45 {
24    type Ux = u8;
25}
26impl crate::IsEnum for Sm0sel45 {}
27#[doc = "Field `SM0SEL45` reader - Submodule 0 PWM45 Control Select"]
28pub type Sm0sel45R = crate::FieldReader<Sm0sel45>;
29impl Sm0sel45R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> Option<Sm0sel45> {
33        match self.bits {
34            0 => Some(Sm0sel45::Sm0pwm45),
35            1 => Some(Sm0sel45::InvertedSm0pwm45),
36            2 => Some(Sm0sel45::Sm0out45),
37            _ => None,
38        }
39    }
40    #[doc = "Generated SM0PWM45 signal used by the deadtime logic."]
41    #[inline(always)]
42    pub fn is_sm0pwm45(&self) -> bool {
43        *self == Sm0sel45::Sm0pwm45
44    }
45    #[doc = "Inverted generated SM0PWM45 signal used by the deadtime logic."]
46    #[inline(always)]
47    pub fn is_inverted_sm0pwm45(&self) -> bool {
48        *self == Sm0sel45::InvertedSm0pwm45
49    }
50    #[doc = "SWCOUT\\[SM0OUT45\\] used by the deadtime logic."]
51    #[inline(always)]
52    pub fn is_sm0out45(&self) -> bool {
53        *self == Sm0sel45::Sm0out45
54    }
55}
56#[doc = "Field `SM0SEL45` writer - Submodule 0 PWM45 Control Select"]
57pub type Sm0sel45W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm0sel45>;
58impl<'a, REG> Sm0sel45W<'a, REG>
59where
60    REG: crate::Writable + crate::RegisterSpec,
61    REG::Ux: From<u8>,
62{
63    #[doc = "Generated SM0PWM45 signal used by the deadtime logic."]
64    #[inline(always)]
65    pub fn sm0pwm45(self) -> &'a mut crate::W<REG> {
66        self.variant(Sm0sel45::Sm0pwm45)
67    }
68    #[doc = "Inverted generated SM0PWM45 signal used by the deadtime logic."]
69    #[inline(always)]
70    pub fn inverted_sm0pwm45(self) -> &'a mut crate::W<REG> {
71        self.variant(Sm0sel45::InvertedSm0pwm45)
72    }
73    #[doc = "SWCOUT\\[SM0OUT45\\] used by the deadtime logic."]
74    #[inline(always)]
75    pub fn sm0out45(self) -> &'a mut crate::W<REG> {
76        self.variant(Sm0sel45::Sm0out45)
77    }
78}
79#[doc = "Submodule 0 PWM23 Control Select\n\nValue on reset: 0"]
80#[cfg_attr(feature = "defmt", derive(defmt::Format))]
81#[derive(Clone, Copy, Debug, PartialEq, Eq)]
82#[repr(u8)]
83pub enum Sm0sel23 {
84    #[doc = "0: Generated SM0PWM23 signal used by the deadtime logic."]
85    Sm0pwm23 = 0,
86    #[doc = "1: Inverted generated SM0PWM23 signal used by the deadtime logic."]
87    InvertedSm0pwm23 = 1,
88    #[doc = "2: SWCOUT\\[SM0OUT23\\] used by the deadtime logic."]
89    Sm0out23 = 2,
90    #[doc = "3: PWM0_EXTA signal used by the deadtime logic."]
91    Pwm0Exta = 3,
92}
93impl From<Sm0sel23> for u8 {
94    #[inline(always)]
95    fn from(variant: Sm0sel23) -> Self {
96        variant as _
97    }
98}
99impl crate::FieldSpec for Sm0sel23 {
100    type Ux = u8;
101}
102impl crate::IsEnum for Sm0sel23 {}
103#[doc = "Field `SM0SEL23` reader - Submodule 0 PWM23 Control Select"]
104pub type Sm0sel23R = crate::FieldReader<Sm0sel23>;
105impl Sm0sel23R {
106    #[doc = "Get enumerated values variant"]
107    #[inline(always)]
108    pub const fn variant(&self) -> Sm0sel23 {
109        match self.bits {
110            0 => Sm0sel23::Sm0pwm23,
111            1 => Sm0sel23::InvertedSm0pwm23,
112            2 => Sm0sel23::Sm0out23,
113            3 => Sm0sel23::Pwm0Exta,
114            _ => unreachable!(),
115        }
116    }
117    #[doc = "Generated SM0PWM23 signal used by the deadtime logic."]
118    #[inline(always)]
119    pub fn is_sm0pwm23(&self) -> bool {
120        *self == Sm0sel23::Sm0pwm23
121    }
122    #[doc = "Inverted generated SM0PWM23 signal used by the deadtime logic."]
123    #[inline(always)]
124    pub fn is_inverted_sm0pwm23(&self) -> bool {
125        *self == Sm0sel23::InvertedSm0pwm23
126    }
127    #[doc = "SWCOUT\\[SM0OUT23\\] used by the deadtime logic."]
128    #[inline(always)]
129    pub fn is_sm0out23(&self) -> bool {
130        *self == Sm0sel23::Sm0out23
131    }
132    #[doc = "PWM0_EXTA signal used by the deadtime logic."]
133    #[inline(always)]
134    pub fn is_pwm0_exta(&self) -> bool {
135        *self == Sm0sel23::Pwm0Exta
136    }
137}
138#[doc = "Field `SM0SEL23` writer - Submodule 0 PWM23 Control Select"]
139pub type Sm0sel23W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm0sel23, crate::Safe>;
140impl<'a, REG> Sm0sel23W<'a, REG>
141where
142    REG: crate::Writable + crate::RegisterSpec,
143    REG::Ux: From<u8>,
144{
145    #[doc = "Generated SM0PWM23 signal used by the deadtime logic."]
146    #[inline(always)]
147    pub fn sm0pwm23(self) -> &'a mut crate::W<REG> {
148        self.variant(Sm0sel23::Sm0pwm23)
149    }
150    #[doc = "Inverted generated SM0PWM23 signal used by the deadtime logic."]
151    #[inline(always)]
152    pub fn inverted_sm0pwm23(self) -> &'a mut crate::W<REG> {
153        self.variant(Sm0sel23::InvertedSm0pwm23)
154    }
155    #[doc = "SWCOUT\\[SM0OUT23\\] used by the deadtime logic."]
156    #[inline(always)]
157    pub fn sm0out23(self) -> &'a mut crate::W<REG> {
158        self.variant(Sm0sel23::Sm0out23)
159    }
160    #[doc = "PWM0_EXTA signal used by the deadtime logic."]
161    #[inline(always)]
162    pub fn pwm0_exta(self) -> &'a mut crate::W<REG> {
163        self.variant(Sm0sel23::Pwm0Exta)
164    }
165}
166#[doc = "Submodule 1 PWM45 Control Select\n\nValue on reset: 0"]
167#[cfg_attr(feature = "defmt", derive(defmt::Format))]
168#[derive(Clone, Copy, Debug, PartialEq, Eq)]
169#[repr(u8)]
170pub enum Sm1sel45 {
171    #[doc = "0: Generated SM1PWM45 signal used by the deadtime logic."]
172    Sm1pwm45 = 0,
173    #[doc = "1: Inverted generated SM1PWM45 signal used by the deadtime logic."]
174    InvertedSm1pwm45 = 1,
175    #[doc = "2: SWCOUT\\[SM1OUT45\\] used by the deadtime logic."]
176    Sm1out45 = 2,
177}
178impl From<Sm1sel45> for u8 {
179    #[inline(always)]
180    fn from(variant: Sm1sel45) -> Self {
181        variant as _
182    }
183}
184impl crate::FieldSpec for Sm1sel45 {
185    type Ux = u8;
186}
187impl crate::IsEnum for Sm1sel45 {}
188#[doc = "Field `SM1SEL45` reader - Submodule 1 PWM45 Control Select"]
189pub type Sm1sel45R = crate::FieldReader<Sm1sel45>;
190impl Sm1sel45R {
191    #[doc = "Get enumerated values variant"]
192    #[inline(always)]
193    pub const fn variant(&self) -> Option<Sm1sel45> {
194        match self.bits {
195            0 => Some(Sm1sel45::Sm1pwm45),
196            1 => Some(Sm1sel45::InvertedSm1pwm45),
197            2 => Some(Sm1sel45::Sm1out45),
198            _ => None,
199        }
200    }
201    #[doc = "Generated SM1PWM45 signal used by the deadtime logic."]
202    #[inline(always)]
203    pub fn is_sm1pwm45(&self) -> bool {
204        *self == Sm1sel45::Sm1pwm45
205    }
206    #[doc = "Inverted generated SM1PWM45 signal used by the deadtime logic."]
207    #[inline(always)]
208    pub fn is_inverted_sm1pwm45(&self) -> bool {
209        *self == Sm1sel45::InvertedSm1pwm45
210    }
211    #[doc = "SWCOUT\\[SM1OUT45\\] used by the deadtime logic."]
212    #[inline(always)]
213    pub fn is_sm1out45(&self) -> bool {
214        *self == Sm1sel45::Sm1out45
215    }
216}
217#[doc = "Field `SM1SEL45` writer - Submodule 1 PWM45 Control Select"]
218pub type Sm1sel45W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm1sel45>;
219impl<'a, REG> Sm1sel45W<'a, REG>
220where
221    REG: crate::Writable + crate::RegisterSpec,
222    REG::Ux: From<u8>,
223{
224    #[doc = "Generated SM1PWM45 signal used by the deadtime logic."]
225    #[inline(always)]
226    pub fn sm1pwm45(self) -> &'a mut crate::W<REG> {
227        self.variant(Sm1sel45::Sm1pwm45)
228    }
229    #[doc = "Inverted generated SM1PWM45 signal used by the deadtime logic."]
230    #[inline(always)]
231    pub fn inverted_sm1pwm45(self) -> &'a mut crate::W<REG> {
232        self.variant(Sm1sel45::InvertedSm1pwm45)
233    }
234    #[doc = "SWCOUT\\[SM1OUT45\\] used by the deadtime logic."]
235    #[inline(always)]
236    pub fn sm1out45(self) -> &'a mut crate::W<REG> {
237        self.variant(Sm1sel45::Sm1out45)
238    }
239}
240#[doc = "Submodule 1 PWM23 Control Select\n\nValue on reset: 0"]
241#[cfg_attr(feature = "defmt", derive(defmt::Format))]
242#[derive(Clone, Copy, Debug, PartialEq, Eq)]
243#[repr(u8)]
244pub enum Sm1sel23 {
245    #[doc = "0: Generated SM1PWM23 signal used by the deadtime logic."]
246    Sm1pwm23 = 0,
247    #[doc = "1: Inverted generated SM1PWM23 signal used by the deadtime logic."]
248    InvertedSm1pwm23 = 1,
249    #[doc = "2: SWCOUT\\[SM1OUT23\\] used by the deadtime logic."]
250    Sm1out23 = 2,
251    #[doc = "3: PWM1_EXTA signal used by the deadtime logic."]
252    Pwm1Exta = 3,
253}
254impl From<Sm1sel23> for u8 {
255    #[inline(always)]
256    fn from(variant: Sm1sel23) -> Self {
257        variant as _
258    }
259}
260impl crate::FieldSpec for Sm1sel23 {
261    type Ux = u8;
262}
263impl crate::IsEnum for Sm1sel23 {}
264#[doc = "Field `SM1SEL23` reader - Submodule 1 PWM23 Control Select"]
265pub type Sm1sel23R = crate::FieldReader<Sm1sel23>;
266impl Sm1sel23R {
267    #[doc = "Get enumerated values variant"]
268    #[inline(always)]
269    pub const fn variant(&self) -> Sm1sel23 {
270        match self.bits {
271            0 => Sm1sel23::Sm1pwm23,
272            1 => Sm1sel23::InvertedSm1pwm23,
273            2 => Sm1sel23::Sm1out23,
274            3 => Sm1sel23::Pwm1Exta,
275            _ => unreachable!(),
276        }
277    }
278    #[doc = "Generated SM1PWM23 signal used by the deadtime logic."]
279    #[inline(always)]
280    pub fn is_sm1pwm23(&self) -> bool {
281        *self == Sm1sel23::Sm1pwm23
282    }
283    #[doc = "Inverted generated SM1PWM23 signal used by the deadtime logic."]
284    #[inline(always)]
285    pub fn is_inverted_sm1pwm23(&self) -> bool {
286        *self == Sm1sel23::InvertedSm1pwm23
287    }
288    #[doc = "SWCOUT\\[SM1OUT23\\] used by the deadtime logic."]
289    #[inline(always)]
290    pub fn is_sm1out23(&self) -> bool {
291        *self == Sm1sel23::Sm1out23
292    }
293    #[doc = "PWM1_EXTA signal used by the deadtime logic."]
294    #[inline(always)]
295    pub fn is_pwm1_exta(&self) -> bool {
296        *self == Sm1sel23::Pwm1Exta
297    }
298}
299#[doc = "Field `SM1SEL23` writer - Submodule 1 PWM23 Control Select"]
300pub type Sm1sel23W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm1sel23, crate::Safe>;
301impl<'a, REG> Sm1sel23W<'a, REG>
302where
303    REG: crate::Writable + crate::RegisterSpec,
304    REG::Ux: From<u8>,
305{
306    #[doc = "Generated SM1PWM23 signal used by the deadtime logic."]
307    #[inline(always)]
308    pub fn sm1pwm23(self) -> &'a mut crate::W<REG> {
309        self.variant(Sm1sel23::Sm1pwm23)
310    }
311    #[doc = "Inverted generated SM1PWM23 signal used by the deadtime logic."]
312    #[inline(always)]
313    pub fn inverted_sm1pwm23(self) -> &'a mut crate::W<REG> {
314        self.variant(Sm1sel23::InvertedSm1pwm23)
315    }
316    #[doc = "SWCOUT\\[SM1OUT23\\] used by the deadtime logic."]
317    #[inline(always)]
318    pub fn sm1out23(self) -> &'a mut crate::W<REG> {
319        self.variant(Sm1sel23::Sm1out23)
320    }
321    #[doc = "PWM1_EXTA signal used by the deadtime logic."]
322    #[inline(always)]
323    pub fn pwm1_exta(self) -> &'a mut crate::W<REG> {
324        self.variant(Sm1sel23::Pwm1Exta)
325    }
326}
327#[doc = "Submodule 2 PWM45 Control Select\n\nValue on reset: 0"]
328#[cfg_attr(feature = "defmt", derive(defmt::Format))]
329#[derive(Clone, Copy, Debug, PartialEq, Eq)]
330#[repr(u8)]
331pub enum Sm2sel45 {
332    #[doc = "0: Generated SM2PWM45 signal used by the deadtime logic."]
333    Sm2pwm45 = 0,
334    #[doc = "1: Inverted generated SM2PWM45 signal used by the deadtime logic."]
335    InvertedSm2pwm45 = 1,
336    #[doc = "2: SWCOUT\\[SM2OUT45\\] used by the deadtime logic."]
337    Sm2out45 = 2,
338}
339impl From<Sm2sel45> for u8 {
340    #[inline(always)]
341    fn from(variant: Sm2sel45) -> Self {
342        variant as _
343    }
344}
345impl crate::FieldSpec for Sm2sel45 {
346    type Ux = u8;
347}
348impl crate::IsEnum for Sm2sel45 {}
349#[doc = "Field `SM2SEL45` reader - Submodule 2 PWM45 Control Select"]
350pub type Sm2sel45R = crate::FieldReader<Sm2sel45>;
351impl Sm2sel45R {
352    #[doc = "Get enumerated values variant"]
353    #[inline(always)]
354    pub const fn variant(&self) -> Option<Sm2sel45> {
355        match self.bits {
356            0 => Some(Sm2sel45::Sm2pwm45),
357            1 => Some(Sm2sel45::InvertedSm2pwm45),
358            2 => Some(Sm2sel45::Sm2out45),
359            _ => None,
360        }
361    }
362    #[doc = "Generated SM2PWM45 signal used by the deadtime logic."]
363    #[inline(always)]
364    pub fn is_sm2pwm45(&self) -> bool {
365        *self == Sm2sel45::Sm2pwm45
366    }
367    #[doc = "Inverted generated SM2PWM45 signal used by the deadtime logic."]
368    #[inline(always)]
369    pub fn is_inverted_sm2pwm45(&self) -> bool {
370        *self == Sm2sel45::InvertedSm2pwm45
371    }
372    #[doc = "SWCOUT\\[SM2OUT45\\] used by the deadtime logic."]
373    #[inline(always)]
374    pub fn is_sm2out45(&self) -> bool {
375        *self == Sm2sel45::Sm2out45
376    }
377}
378#[doc = "Field `SM2SEL45` writer - Submodule 2 PWM45 Control Select"]
379pub type Sm2sel45W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm2sel45>;
380impl<'a, REG> Sm2sel45W<'a, REG>
381where
382    REG: crate::Writable + crate::RegisterSpec,
383    REG::Ux: From<u8>,
384{
385    #[doc = "Generated SM2PWM45 signal used by the deadtime logic."]
386    #[inline(always)]
387    pub fn sm2pwm45(self) -> &'a mut crate::W<REG> {
388        self.variant(Sm2sel45::Sm2pwm45)
389    }
390    #[doc = "Inverted generated SM2PWM45 signal used by the deadtime logic."]
391    #[inline(always)]
392    pub fn inverted_sm2pwm45(self) -> &'a mut crate::W<REG> {
393        self.variant(Sm2sel45::InvertedSm2pwm45)
394    }
395    #[doc = "SWCOUT\\[SM2OUT45\\] used by the deadtime logic."]
396    #[inline(always)]
397    pub fn sm2out45(self) -> &'a mut crate::W<REG> {
398        self.variant(Sm2sel45::Sm2out45)
399    }
400}
401#[doc = "Submodule 2 PWM23 Control Select\n\nValue on reset: 0"]
402#[cfg_attr(feature = "defmt", derive(defmt::Format))]
403#[derive(Clone, Copy, Debug, PartialEq, Eq)]
404#[repr(u8)]
405pub enum Sm2sel23 {
406    #[doc = "0: Generated SM2PWM23 signal used by the deadtime logic."]
407    Sm2pwm23 = 0,
408    #[doc = "1: Inverted generated SM2PWM23 signal used by the deadtime logic."]
409    InvertedSm2pwm23 = 1,
410    #[doc = "2: SWCOUT\\[SM2OUT23\\] used by the deadtime logic."]
411    Sm2out23 = 2,
412    #[doc = "3: PWM2_EXTA signal used by the deadtime logic."]
413    Pwm2Exta = 3,
414}
415impl From<Sm2sel23> for u8 {
416    #[inline(always)]
417    fn from(variant: Sm2sel23) -> Self {
418        variant as _
419    }
420}
421impl crate::FieldSpec for Sm2sel23 {
422    type Ux = u8;
423}
424impl crate::IsEnum for Sm2sel23 {}
425#[doc = "Field `SM2SEL23` reader - Submodule 2 PWM23 Control Select"]
426pub type Sm2sel23R = crate::FieldReader<Sm2sel23>;
427impl Sm2sel23R {
428    #[doc = "Get enumerated values variant"]
429    #[inline(always)]
430    pub const fn variant(&self) -> Sm2sel23 {
431        match self.bits {
432            0 => Sm2sel23::Sm2pwm23,
433            1 => Sm2sel23::InvertedSm2pwm23,
434            2 => Sm2sel23::Sm2out23,
435            3 => Sm2sel23::Pwm2Exta,
436            _ => unreachable!(),
437        }
438    }
439    #[doc = "Generated SM2PWM23 signal used by the deadtime logic."]
440    #[inline(always)]
441    pub fn is_sm2pwm23(&self) -> bool {
442        *self == Sm2sel23::Sm2pwm23
443    }
444    #[doc = "Inverted generated SM2PWM23 signal used by the deadtime logic."]
445    #[inline(always)]
446    pub fn is_inverted_sm2pwm23(&self) -> bool {
447        *self == Sm2sel23::InvertedSm2pwm23
448    }
449    #[doc = "SWCOUT\\[SM2OUT23\\] used by the deadtime logic."]
450    #[inline(always)]
451    pub fn is_sm2out23(&self) -> bool {
452        *self == Sm2sel23::Sm2out23
453    }
454    #[doc = "PWM2_EXTA signal used by the deadtime logic."]
455    #[inline(always)]
456    pub fn is_pwm2_exta(&self) -> bool {
457        *self == Sm2sel23::Pwm2Exta
458    }
459}
460#[doc = "Field `SM2SEL23` writer - Submodule 2 PWM23 Control Select"]
461pub type Sm2sel23W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm2sel23, crate::Safe>;
462impl<'a, REG> Sm2sel23W<'a, REG>
463where
464    REG: crate::Writable + crate::RegisterSpec,
465    REG::Ux: From<u8>,
466{
467    #[doc = "Generated SM2PWM23 signal used by the deadtime logic."]
468    #[inline(always)]
469    pub fn sm2pwm23(self) -> &'a mut crate::W<REG> {
470        self.variant(Sm2sel23::Sm2pwm23)
471    }
472    #[doc = "Inverted generated SM2PWM23 signal used by the deadtime logic."]
473    #[inline(always)]
474    pub fn inverted_sm2pwm23(self) -> &'a mut crate::W<REG> {
475        self.variant(Sm2sel23::InvertedSm2pwm23)
476    }
477    #[doc = "SWCOUT\\[SM2OUT23\\] used by the deadtime logic."]
478    #[inline(always)]
479    pub fn sm2out23(self) -> &'a mut crate::W<REG> {
480        self.variant(Sm2sel23::Sm2out23)
481    }
482    #[doc = "PWM2_EXTA signal used by the deadtime logic."]
483    #[inline(always)]
484    pub fn pwm2_exta(self) -> &'a mut crate::W<REG> {
485        self.variant(Sm2sel23::Pwm2Exta)
486    }
487}
488#[doc = "Submodule 3 PWM45 Control Select\n\nValue on reset: 0"]
489#[cfg_attr(feature = "defmt", derive(defmt::Format))]
490#[derive(Clone, Copy, Debug, PartialEq, Eq)]
491#[repr(u8)]
492pub enum Sm3sel45 {
493    #[doc = "0: Generated SM3PWM45 signal used by the deadtime logic."]
494    Sm3pwm45 = 0,
495    #[doc = "1: Inverted generated SM3PWM45 signal used by the deadtime logic."]
496    InvertedSm3pwm45 = 1,
497    #[doc = "2: SWCOUT\\[SM3OUT45\\] used by the deadtime logic."]
498    Sm3out45 = 2,
499}
500impl From<Sm3sel45> for u8 {
501    #[inline(always)]
502    fn from(variant: Sm3sel45) -> Self {
503        variant as _
504    }
505}
506impl crate::FieldSpec for Sm3sel45 {
507    type Ux = u8;
508}
509impl crate::IsEnum for Sm3sel45 {}
510#[doc = "Field `SM3SEL45` reader - Submodule 3 PWM45 Control Select"]
511pub type Sm3sel45R = crate::FieldReader<Sm3sel45>;
512impl Sm3sel45R {
513    #[doc = "Get enumerated values variant"]
514    #[inline(always)]
515    pub const fn variant(&self) -> Option<Sm3sel45> {
516        match self.bits {
517            0 => Some(Sm3sel45::Sm3pwm45),
518            1 => Some(Sm3sel45::InvertedSm3pwm45),
519            2 => Some(Sm3sel45::Sm3out45),
520            _ => None,
521        }
522    }
523    #[doc = "Generated SM3PWM45 signal used by the deadtime logic."]
524    #[inline(always)]
525    pub fn is_sm3pwm45(&self) -> bool {
526        *self == Sm3sel45::Sm3pwm45
527    }
528    #[doc = "Inverted generated SM3PWM45 signal used by the deadtime logic."]
529    #[inline(always)]
530    pub fn is_inverted_sm3pwm45(&self) -> bool {
531        *self == Sm3sel45::InvertedSm3pwm45
532    }
533    #[doc = "SWCOUT\\[SM3OUT45\\] used by the deadtime logic."]
534    #[inline(always)]
535    pub fn is_sm3out45(&self) -> bool {
536        *self == Sm3sel45::Sm3out45
537    }
538}
539#[doc = "Field `SM3SEL45` writer - Submodule 3 PWM45 Control Select"]
540pub type Sm3sel45W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm3sel45>;
541impl<'a, REG> Sm3sel45W<'a, REG>
542where
543    REG: crate::Writable + crate::RegisterSpec,
544    REG::Ux: From<u8>,
545{
546    #[doc = "Generated SM3PWM45 signal used by the deadtime logic."]
547    #[inline(always)]
548    pub fn sm3pwm45(self) -> &'a mut crate::W<REG> {
549        self.variant(Sm3sel45::Sm3pwm45)
550    }
551    #[doc = "Inverted generated SM3PWM45 signal used by the deadtime logic."]
552    #[inline(always)]
553    pub fn inverted_sm3pwm45(self) -> &'a mut crate::W<REG> {
554        self.variant(Sm3sel45::InvertedSm3pwm45)
555    }
556    #[doc = "SWCOUT\\[SM3OUT45\\] used by the deadtime logic."]
557    #[inline(always)]
558    pub fn sm3out45(self) -> &'a mut crate::W<REG> {
559        self.variant(Sm3sel45::Sm3out45)
560    }
561}
562#[doc = "Submodule 3 PWM23 Control Select\n\nValue on reset: 0"]
563#[cfg_attr(feature = "defmt", derive(defmt::Format))]
564#[derive(Clone, Copy, Debug, PartialEq, Eq)]
565#[repr(u8)]
566pub enum Sm3sel23 {
567    #[doc = "0: Generated SM3PWM23 signal used by the deadtime logic."]
568    Sm3pwm23 = 0,
569    #[doc = "1: Inverted generated SM3PWM23 signal used by the deadtime logic."]
570    InvertedSm3pwm23 = 1,
571    #[doc = "2: SWCOUT\\[SM3OUT23\\] used by the deadtime logic."]
572    Sm3out23 = 2,
573    #[doc = "3: PWM3_EXTA signal used by the deadtime logic."]
574    Pwm3Exta = 3,
575}
576impl From<Sm3sel23> for u8 {
577    #[inline(always)]
578    fn from(variant: Sm3sel23) -> Self {
579        variant as _
580    }
581}
582impl crate::FieldSpec for Sm3sel23 {
583    type Ux = u8;
584}
585impl crate::IsEnum for Sm3sel23 {}
586#[doc = "Field `SM3SEL23` reader - Submodule 3 PWM23 Control Select"]
587pub type Sm3sel23R = crate::FieldReader<Sm3sel23>;
588impl Sm3sel23R {
589    #[doc = "Get enumerated values variant"]
590    #[inline(always)]
591    pub const fn variant(&self) -> Sm3sel23 {
592        match self.bits {
593            0 => Sm3sel23::Sm3pwm23,
594            1 => Sm3sel23::InvertedSm3pwm23,
595            2 => Sm3sel23::Sm3out23,
596            3 => Sm3sel23::Pwm3Exta,
597            _ => unreachable!(),
598        }
599    }
600    #[doc = "Generated SM3PWM23 signal used by the deadtime logic."]
601    #[inline(always)]
602    pub fn is_sm3pwm23(&self) -> bool {
603        *self == Sm3sel23::Sm3pwm23
604    }
605    #[doc = "Inverted generated SM3PWM23 signal used by the deadtime logic."]
606    #[inline(always)]
607    pub fn is_inverted_sm3pwm23(&self) -> bool {
608        *self == Sm3sel23::InvertedSm3pwm23
609    }
610    #[doc = "SWCOUT\\[SM3OUT23\\] used by the deadtime logic."]
611    #[inline(always)]
612    pub fn is_sm3out23(&self) -> bool {
613        *self == Sm3sel23::Sm3out23
614    }
615    #[doc = "PWM3_EXTA signal used by the deadtime logic."]
616    #[inline(always)]
617    pub fn is_pwm3_exta(&self) -> bool {
618        *self == Sm3sel23::Pwm3Exta
619    }
620}
621#[doc = "Field `SM3SEL23` writer - Submodule 3 PWM23 Control Select"]
622pub type Sm3sel23W<'a, REG> = crate::FieldWriter<'a, REG, 2, Sm3sel23, crate::Safe>;
623impl<'a, REG> Sm3sel23W<'a, REG>
624where
625    REG: crate::Writable + crate::RegisterSpec,
626    REG::Ux: From<u8>,
627{
628    #[doc = "Generated SM3PWM23 signal used by the deadtime logic."]
629    #[inline(always)]
630    pub fn sm3pwm23(self) -> &'a mut crate::W<REG> {
631        self.variant(Sm3sel23::Sm3pwm23)
632    }
633    #[doc = "Inverted generated SM3PWM23 signal used by the deadtime logic."]
634    #[inline(always)]
635    pub fn inverted_sm3pwm23(self) -> &'a mut crate::W<REG> {
636        self.variant(Sm3sel23::InvertedSm3pwm23)
637    }
638    #[doc = "SWCOUT\\[SM3OUT23\\] used by the deadtime logic."]
639    #[inline(always)]
640    pub fn sm3out23(self) -> &'a mut crate::W<REG> {
641        self.variant(Sm3sel23::Sm3out23)
642    }
643    #[doc = "PWM3_EXTA signal used by the deadtime logic."]
644    #[inline(always)]
645    pub fn pwm3_exta(self) -> &'a mut crate::W<REG> {
646        self.variant(Sm3sel23::Pwm3Exta)
647    }
648}
649impl R {
650    #[doc = "Bits 0:1 - Submodule 0 PWM45 Control Select"]
651    #[inline(always)]
652    pub fn sm0sel45(&self) -> Sm0sel45R {
653        Sm0sel45R::new((self.bits & 3) as u8)
654    }
655    #[doc = "Bits 2:3 - Submodule 0 PWM23 Control Select"]
656    #[inline(always)]
657    pub fn sm0sel23(&self) -> Sm0sel23R {
658        Sm0sel23R::new(((self.bits >> 2) & 3) as u8)
659    }
660    #[doc = "Bits 4:5 - Submodule 1 PWM45 Control Select"]
661    #[inline(always)]
662    pub fn sm1sel45(&self) -> Sm1sel45R {
663        Sm1sel45R::new(((self.bits >> 4) & 3) as u8)
664    }
665    #[doc = "Bits 6:7 - Submodule 1 PWM23 Control Select"]
666    #[inline(always)]
667    pub fn sm1sel23(&self) -> Sm1sel23R {
668        Sm1sel23R::new(((self.bits >> 6) & 3) as u8)
669    }
670    #[doc = "Bits 8:9 - Submodule 2 PWM45 Control Select"]
671    #[inline(always)]
672    pub fn sm2sel45(&self) -> Sm2sel45R {
673        Sm2sel45R::new(((self.bits >> 8) & 3) as u8)
674    }
675    #[doc = "Bits 10:11 - Submodule 2 PWM23 Control Select"]
676    #[inline(always)]
677    pub fn sm2sel23(&self) -> Sm2sel23R {
678        Sm2sel23R::new(((self.bits >> 10) & 3) as u8)
679    }
680    #[doc = "Bits 12:13 - Submodule 3 PWM45 Control Select"]
681    #[inline(always)]
682    pub fn sm3sel45(&self) -> Sm3sel45R {
683        Sm3sel45R::new(((self.bits >> 12) & 3) as u8)
684    }
685    #[doc = "Bits 14:15 - Submodule 3 PWM23 Control Select"]
686    #[inline(always)]
687    pub fn sm3sel23(&self) -> Sm3sel23R {
688        Sm3sel23R::new(((self.bits >> 14) & 3) as u8)
689    }
690}
691#[cfg(feature = "debug")]
692impl core::fmt::Debug for R {
693    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
694        f.debug_struct("DTSRCSEL")
695            .field("sm0sel45", &self.sm0sel45())
696            .field("sm0sel23", &self.sm0sel23())
697            .field("sm1sel45", &self.sm1sel45())
698            .field("sm1sel23", &self.sm1sel23())
699            .field("sm2sel45", &self.sm2sel45())
700            .field("sm2sel23", &self.sm2sel23())
701            .field("sm3sel45", &self.sm3sel45())
702            .field("sm3sel23", &self.sm3sel23())
703            .finish()
704    }
705}
706impl W {
707    #[doc = "Bits 0:1 - Submodule 0 PWM45 Control Select"]
708    #[inline(always)]
709    pub fn sm0sel45(&mut self) -> Sm0sel45W<'_, DtsrcselSpec> {
710        Sm0sel45W::new(self, 0)
711    }
712    #[doc = "Bits 2:3 - Submodule 0 PWM23 Control Select"]
713    #[inline(always)]
714    pub fn sm0sel23(&mut self) -> Sm0sel23W<'_, DtsrcselSpec> {
715        Sm0sel23W::new(self, 2)
716    }
717    #[doc = "Bits 4:5 - Submodule 1 PWM45 Control Select"]
718    #[inline(always)]
719    pub fn sm1sel45(&mut self) -> Sm1sel45W<'_, DtsrcselSpec> {
720        Sm1sel45W::new(self, 4)
721    }
722    #[doc = "Bits 6:7 - Submodule 1 PWM23 Control Select"]
723    #[inline(always)]
724    pub fn sm1sel23(&mut self) -> Sm1sel23W<'_, DtsrcselSpec> {
725        Sm1sel23W::new(self, 6)
726    }
727    #[doc = "Bits 8:9 - Submodule 2 PWM45 Control Select"]
728    #[inline(always)]
729    pub fn sm2sel45(&mut self) -> Sm2sel45W<'_, DtsrcselSpec> {
730        Sm2sel45W::new(self, 8)
731    }
732    #[doc = "Bits 10:11 - Submodule 2 PWM23 Control Select"]
733    #[inline(always)]
734    pub fn sm2sel23(&mut self) -> Sm2sel23W<'_, DtsrcselSpec> {
735        Sm2sel23W::new(self, 10)
736    }
737    #[doc = "Bits 12:13 - Submodule 3 PWM45 Control Select"]
738    #[inline(always)]
739    pub fn sm3sel45(&mut self) -> Sm3sel45W<'_, DtsrcselSpec> {
740        Sm3sel45W::new(self, 12)
741    }
742    #[doc = "Bits 14:15 - Submodule 3 PWM23 Control Select"]
743    #[inline(always)]
744    pub fn sm3sel23(&mut self) -> Sm3sel23W<'_, DtsrcselSpec> {
745        Sm3sel23W::new(self, 14)
746    }
747}
748#[doc = "PWM Source Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtsrcsel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtsrcsel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
749pub struct DtsrcselSpec;
750impl crate::RegisterSpec for DtsrcselSpec {
751    type Ux = u16;
752}
753#[doc = "`read()` method returns [`dtsrcsel::R`](R) reader structure"]
754impl crate::Readable for DtsrcselSpec {}
755#[doc = "`write(|w| ..)` method takes [`dtsrcsel::W`](W) writer structure"]
756impl crate::Writable for DtsrcselSpec {
757    type Safety = crate::Unsafe;
758}
759#[doc = "`reset()` method sets DTSRCSEL to value 0"]
760impl crate::Resettable for DtsrcselSpec {}
mcxa_pac/flexpwm0/dtsrcsel.rs

mcxa_pac/flexpwm0/
dtsrcsel.rs
