mcxa_pac/flexio0/
timctl.rs

1#[doc = "Register `TIMCTL[%s]` reader"]
2pub type R = crate::R<TimctlSpec>;
3#[doc = "Register `TIMCTL[%s]` writer"]
4pub type W = crate::W<TimctlSpec>;
5#[doc = "Timer Mode\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Timod {
10    #[doc = "0: Timer disabled"]
11    Disable = 0,
12    #[doc = "1: Dual 8-bit counters baud mode"]
13    Dual8bitBaud = 1,
14    #[doc = "2: Dual 8-bit counters PWM high mode"]
15    Dual8bitPwmH = 2,
16    #[doc = "3: Single 16-bit counter mode"]
17    Single16bit = 3,
18    #[doc = "4: Single 16-bit counter disable mode"]
19    Single16bitDisable = 4,
20    #[doc = "5: Dual 8-bit counters word mode"]
21    Dual8bitWord = 5,
22    #[doc = "6: Dual 8-bit counters PWM low mode"]
23    Dual8bitPwmL = 6,
24    #[doc = "7: Single 16-bit input capture mode"]
25    Single16bitInCapture = 7,
26}
27impl From<Timod> for u8 {
28    #[inline(always)]
29    fn from(variant: Timod) -> Self {
30        variant as _
31    }
32}
33impl crate::FieldSpec for Timod {
34    type Ux = u8;
35}
36impl crate::IsEnum for Timod {}
37#[doc = "Field `TIMOD` reader - Timer Mode"]
38pub type TimodR = crate::FieldReader<Timod>;
39impl TimodR {
40    #[doc = "Get enumerated values variant"]
41    #[inline(always)]
42    pub const fn variant(&self) -> Timod {
43        match self.bits {
44            0 => Timod::Disable,
45            1 => Timod::Dual8bitBaud,
46            2 => Timod::Dual8bitPwmH,
47            3 => Timod::Single16bit,
48            4 => Timod::Single16bitDisable,
49            5 => Timod::Dual8bitWord,
50            6 => Timod::Dual8bitPwmL,
51            7 => Timod::Single16bitInCapture,
52            _ => unreachable!(),
53        }
54    }
55    #[doc = "Timer disabled"]
56    #[inline(always)]
57    pub fn is_disable(&self) -> bool {
58        *self == Timod::Disable
59    }
60    #[doc = "Dual 8-bit counters baud mode"]
61    #[inline(always)]
62    pub fn is_dual8bit_baud(&self) -> bool {
63        *self == Timod::Dual8bitBaud
64    }
65    #[doc = "Dual 8-bit counters PWM high mode"]
66    #[inline(always)]
67    pub fn is_dual8bit_pwm_h(&self) -> bool {
68        *self == Timod::Dual8bitPwmH
69    }
70    #[doc = "Single 16-bit counter mode"]
71    #[inline(always)]
72    pub fn is_single16bit(&self) -> bool {
73        *self == Timod::Single16bit
74    }
75    #[doc = "Single 16-bit counter disable mode"]
76    #[inline(always)]
77    pub fn is_single16bit_disable(&self) -> bool {
78        *self == Timod::Single16bitDisable
79    }
80    #[doc = "Dual 8-bit counters word mode"]
81    #[inline(always)]
82    pub fn is_dual8bit_word(&self) -> bool {
83        *self == Timod::Dual8bitWord
84    }
85    #[doc = "Dual 8-bit counters PWM low mode"]
86    #[inline(always)]
87    pub fn is_dual8bit_pwm_l(&self) -> bool {
88        *self == Timod::Dual8bitPwmL
89    }
90    #[doc = "Single 16-bit input capture mode"]
91    #[inline(always)]
92    pub fn is_single16bit_in_capture(&self) -> bool {
93        *self == Timod::Single16bitInCapture
94    }
95}
96#[doc = "Field `TIMOD` writer - Timer Mode"]
97pub type TimodW<'a, REG> = crate::FieldWriter<'a, REG, 3, Timod, crate::Safe>;
98impl<'a, REG> TimodW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101    REG::Ux: From<u8>,
102{
103    #[doc = "Timer disabled"]
104    #[inline(always)]
105    pub fn disable(self) -> &'a mut crate::W<REG> {
106        self.variant(Timod::Disable)
107    }
108    #[doc = "Dual 8-bit counters baud mode"]
109    #[inline(always)]
110    pub fn dual8bit_baud(self) -> &'a mut crate::W<REG> {
111        self.variant(Timod::Dual8bitBaud)
112    }
113    #[doc = "Dual 8-bit counters PWM high mode"]
114    #[inline(always)]
115    pub fn dual8bit_pwm_h(self) -> &'a mut crate::W<REG> {
116        self.variant(Timod::Dual8bitPwmH)
117    }
118    #[doc = "Single 16-bit counter mode"]
119    #[inline(always)]
120    pub fn single16bit(self) -> &'a mut crate::W<REG> {
121        self.variant(Timod::Single16bit)
122    }
123    #[doc = "Single 16-bit counter disable mode"]
124    #[inline(always)]
125    pub fn single16bit_disable(self) -> &'a mut crate::W<REG> {
126        self.variant(Timod::Single16bitDisable)
127    }
128    #[doc = "Dual 8-bit counters word mode"]
129    #[inline(always)]
130    pub fn dual8bit_word(self) -> &'a mut crate::W<REG> {
131        self.variant(Timod::Dual8bitWord)
132    }
133    #[doc = "Dual 8-bit counters PWM low mode"]
134    #[inline(always)]
135    pub fn dual8bit_pwm_l(self) -> &'a mut crate::W<REG> {
136        self.variant(Timod::Dual8bitPwmL)
137    }
138    #[doc = "Single 16-bit input capture mode"]
139    #[inline(always)]
140    pub fn single16bit_in_capture(self) -> &'a mut crate::W<REG> {
141        self.variant(Timod::Single16bitInCapture)
142    }
143}
144#[doc = "Timer One Time Operation\n\nValue on reset: 0"]
145#[cfg_attr(feature = "defmt", derive(defmt::Format))]
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147pub enum Onetim {
148    #[doc = "0: Generate the timer enable event as normal"]
149    NotBlocked = 0,
150    #[doc = "1: Block the timer enable event unless the timer status flag is clear"]
151    Blocked = 1,
152}
153impl From<Onetim> for bool {
154    #[inline(always)]
155    fn from(variant: Onetim) -> Self {
156        variant as u8 != 0
157    }
158}
159#[doc = "Field `ONETIM` reader - Timer One Time Operation"]
160pub type OnetimR = crate::BitReader<Onetim>;
161impl OnetimR {
162    #[doc = "Get enumerated values variant"]
163    #[inline(always)]
164    pub const fn variant(&self) -> Onetim {
165        match self.bits {
166            false => Onetim::NotBlocked,
167            true => Onetim::Blocked,
168        }
169    }
170    #[doc = "Generate the timer enable event as normal"]
171    #[inline(always)]
172    pub fn is_not_blocked(&self) -> bool {
173        *self == Onetim::NotBlocked
174    }
175    #[doc = "Block the timer enable event unless the timer status flag is clear"]
176    #[inline(always)]
177    pub fn is_blocked(&self) -> bool {
178        *self == Onetim::Blocked
179    }
180}
181#[doc = "Field `ONETIM` writer - Timer One Time Operation"]
182pub type OnetimW<'a, REG> = crate::BitWriter<'a, REG, Onetim>;
183impl<'a, REG> OnetimW<'a, REG>
184where
185    REG: crate::Writable + crate::RegisterSpec,
186{
187    #[doc = "Generate the timer enable event as normal"]
188    #[inline(always)]
189    pub fn not_blocked(self) -> &'a mut crate::W<REG> {
190        self.variant(Onetim::NotBlocked)
191    }
192    #[doc = "Block the timer enable event unless the timer status flag is clear"]
193    #[inline(always)]
194    pub fn blocked(self) -> &'a mut crate::W<REG> {
195        self.variant(Onetim::Blocked)
196    }
197}
198#[doc = "Timer Pin Input Select\n\nValue on reset: 0"]
199#[cfg_attr(feature = "defmt", derive(defmt::Format))]
200#[derive(Clone, Copy, Debug, PartialEq, Eq)]
201pub enum Pinins {
202    #[doc = "0: PINSEL selects timer pin input and output"]
203    Pinsel = 0,
204    #[doc = "1: PINSEL + 1 selects the timer pin input; timer pin output remains selected by PINSEL"]
205    Pinselplus1 = 1,
206}
207impl From<Pinins> for bool {
208    #[inline(always)]
209    fn from(variant: Pinins) -> Self {
210        variant as u8 != 0
211    }
212}
213#[doc = "Field `PININS` reader - Timer Pin Input Select"]
214pub type PininsR = crate::BitReader<Pinins>;
215impl PininsR {
216    #[doc = "Get enumerated values variant"]
217    #[inline(always)]
218    pub const fn variant(&self) -> Pinins {
219        match self.bits {
220            false => Pinins::Pinsel,
221            true => Pinins::Pinselplus1,
222        }
223    }
224    #[doc = "PINSEL selects timer pin input and output"]
225    #[inline(always)]
226    pub fn is_pinsel(&self) -> bool {
227        *self == Pinins::Pinsel
228    }
229    #[doc = "PINSEL + 1 selects the timer pin input; timer pin output remains selected by PINSEL"]
230    #[inline(always)]
231    pub fn is_pinselplus1(&self) -> bool {
232        *self == Pinins::Pinselplus1
233    }
234}
235#[doc = "Field `PININS` writer - Timer Pin Input Select"]
236pub type PininsW<'a, REG> = crate::BitWriter<'a, REG, Pinins>;
237impl<'a, REG> PininsW<'a, REG>
238where
239    REG: crate::Writable + crate::RegisterSpec,
240{
241    #[doc = "PINSEL selects timer pin input and output"]
242    #[inline(always)]
243    pub fn pinsel(self) -> &'a mut crate::W<REG> {
244        self.variant(Pinins::Pinsel)
245    }
246    #[doc = "PINSEL + 1 selects the timer pin input; timer pin output remains selected by PINSEL"]
247    #[inline(always)]
248    pub fn pinselplus1(self) -> &'a mut crate::W<REG> {
249        self.variant(Pinins::Pinselplus1)
250    }
251}
252#[doc = "Timer Pin Polarity\n\nValue on reset: 0"]
253#[cfg_attr(feature = "defmt", derive(defmt::Format))]
254#[derive(Clone, Copy, Debug, PartialEq, Eq)]
255pub enum Pinpol {
256    #[doc = "0: Active high"]
257    ActiveHigh = 0,
258    #[doc = "1: Active low"]
259    ActiveLow = 1,
260}
261impl From<Pinpol> for bool {
262    #[inline(always)]
263    fn from(variant: Pinpol) -> Self {
264        variant as u8 != 0
265    }
266}
267#[doc = "Field `PINPOL` reader - Timer Pin Polarity"]
268pub type PinpolR = crate::BitReader<Pinpol>;
269impl PinpolR {
270    #[doc = "Get enumerated values variant"]
271    #[inline(always)]
272    pub const fn variant(&self) -> Pinpol {
273        match self.bits {
274            false => Pinpol::ActiveHigh,
275            true => Pinpol::ActiveLow,
276        }
277    }
278    #[doc = "Active high"]
279    #[inline(always)]
280    pub fn is_active_high(&self) -> bool {
281        *self == Pinpol::ActiveHigh
282    }
283    #[doc = "Active low"]
284    #[inline(always)]
285    pub fn is_active_low(&self) -> bool {
286        *self == Pinpol::ActiveLow
287    }
288}
289#[doc = "Field `PINPOL` writer - Timer Pin Polarity"]
290pub type PinpolW<'a, REG> = crate::BitWriter<'a, REG, Pinpol>;
291impl<'a, REG> PinpolW<'a, REG>
292where
293    REG: crate::Writable + crate::RegisterSpec,
294{
295    #[doc = "Active high"]
296    #[inline(always)]
297    pub fn active_high(self) -> &'a mut crate::W<REG> {
298        self.variant(Pinpol::ActiveHigh)
299    }
300    #[doc = "Active low"]
301    #[inline(always)]
302    pub fn active_low(self) -> &'a mut crate::W<REG> {
303        self.variant(Pinpol::ActiveLow)
304    }
305}
306#[doc = "Field `PINSEL` reader - Timer Pin Select"]
307pub type PinselR = crate::FieldReader;
308#[doc = "Field `PINSEL` writer - Timer Pin Select"]
309pub type PinselW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
310#[doc = "Timer Pin Configuration\n\nValue on reset: 0"]
311#[cfg_attr(feature = "defmt", derive(defmt::Format))]
312#[derive(Clone, Copy, Debug, PartialEq, Eq)]
313#[repr(u8)]
314pub enum Pincfg {
315    #[doc = "0: Timer pin output disabled"]
316    Outdisable = 0,
317    #[doc = "1: Timer pin open-drain or bidirectional output enable"]
318    OpendBidirouten = 1,
319    #[doc = "2: Timer pin bidirectional output data"]
320    BidirOutdata = 2,
321    #[doc = "3: Timer pin output"]
322    Output = 3,
323}
324impl From<Pincfg> for u8 {
325    #[inline(always)]
326    fn from(variant: Pincfg) -> Self {
327        variant as _
328    }
329}
330impl crate::FieldSpec for Pincfg {
331    type Ux = u8;
332}
333impl crate::IsEnum for Pincfg {}
334#[doc = "Field `PINCFG` reader - Timer Pin Configuration"]
335pub type PincfgR = crate::FieldReader<Pincfg>;
336impl PincfgR {
337    #[doc = "Get enumerated values variant"]
338    #[inline(always)]
339    pub const fn variant(&self) -> Pincfg {
340        match self.bits {
341            0 => Pincfg::Outdisable,
342            1 => Pincfg::OpendBidirouten,
343            2 => Pincfg::BidirOutdata,
344            3 => Pincfg::Output,
345            _ => unreachable!(),
346        }
347    }
348    #[doc = "Timer pin output disabled"]
349    #[inline(always)]
350    pub fn is_outdisable(&self) -> bool {
351        *self == Pincfg::Outdisable
352    }
353    #[doc = "Timer pin open-drain or bidirectional output enable"]
354    #[inline(always)]
355    pub fn is_opend_bidirouten(&self) -> bool {
356        *self == Pincfg::OpendBidirouten
357    }
358    #[doc = "Timer pin bidirectional output data"]
359    #[inline(always)]
360    pub fn is_bidir_outdata(&self) -> bool {
361        *self == Pincfg::BidirOutdata
362    }
363    #[doc = "Timer pin output"]
364    #[inline(always)]
365    pub fn is_output(&self) -> bool {
366        *self == Pincfg::Output
367    }
368}
369#[doc = "Field `PINCFG` writer - Timer Pin Configuration"]
370pub type PincfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pincfg, crate::Safe>;
371impl<'a, REG> PincfgW<'a, REG>
372where
373    REG: crate::Writable + crate::RegisterSpec,
374    REG::Ux: From<u8>,
375{
376    #[doc = "Timer pin output disabled"]
377    #[inline(always)]
378    pub fn outdisable(self) -> &'a mut crate::W<REG> {
379        self.variant(Pincfg::Outdisable)
380    }
381    #[doc = "Timer pin open-drain or bidirectional output enable"]
382    #[inline(always)]
383    pub fn opend_bidirouten(self) -> &'a mut crate::W<REG> {
384        self.variant(Pincfg::OpendBidirouten)
385    }
386    #[doc = "Timer pin bidirectional output data"]
387    #[inline(always)]
388    pub fn bidir_outdata(self) -> &'a mut crate::W<REG> {
389        self.variant(Pincfg::BidirOutdata)
390    }
391    #[doc = "Timer pin output"]
392    #[inline(always)]
393    pub fn output(self) -> &'a mut crate::W<REG> {
394        self.variant(Pincfg::Output)
395    }
396}
397#[doc = "Trigger Source\n\nValue on reset: 0"]
398#[cfg_attr(feature = "defmt", derive(defmt::Format))]
399#[derive(Clone, Copy, Debug, PartialEq, Eq)]
400pub enum Trgsrc {
401    #[doc = "0: External"]
402    ExtTrig = 0,
403    #[doc = "1: Internal"]
404    InternalTrig = 1,
405}
406impl From<Trgsrc> for bool {
407    #[inline(always)]
408    fn from(variant: Trgsrc) -> Self {
409        variant as u8 != 0
410    }
411}
412#[doc = "Field `TRGSRC` reader - Trigger Source"]
413pub type TrgsrcR = crate::BitReader<Trgsrc>;
414impl TrgsrcR {
415    #[doc = "Get enumerated values variant"]
416    #[inline(always)]
417    pub const fn variant(&self) -> Trgsrc {
418        match self.bits {
419            false => Trgsrc::ExtTrig,
420            true => Trgsrc::InternalTrig,
421        }
422    }
423    #[doc = "External"]
424    #[inline(always)]
425    pub fn is_ext_trig(&self) -> bool {
426        *self == Trgsrc::ExtTrig
427    }
428    #[doc = "Internal"]
429    #[inline(always)]
430    pub fn is_internal_trig(&self) -> bool {
431        *self == Trgsrc::InternalTrig
432    }
433}
434#[doc = "Field `TRGSRC` writer - Trigger Source"]
435pub type TrgsrcW<'a, REG> = crate::BitWriter<'a, REG, Trgsrc>;
436impl<'a, REG> TrgsrcW<'a, REG>
437where
438    REG: crate::Writable + crate::RegisterSpec,
439{
440    #[doc = "External"]
441    #[inline(always)]
442    pub fn ext_trig(self) -> &'a mut crate::W<REG> {
443        self.variant(Trgsrc::ExtTrig)
444    }
445    #[doc = "Internal"]
446    #[inline(always)]
447    pub fn internal_trig(self) -> &'a mut crate::W<REG> {
448        self.variant(Trgsrc::InternalTrig)
449    }
450}
451#[doc = "Trigger Polarity\n\nValue on reset: 0"]
452#[cfg_attr(feature = "defmt", derive(defmt::Format))]
453#[derive(Clone, Copy, Debug, PartialEq, Eq)]
454pub enum Trgpol {
455    #[doc = "0: Active high"]
456    ActiveHigh = 0,
457    #[doc = "1: Active low"]
458    ActiveLow = 1,
459}
460impl From<Trgpol> for bool {
461    #[inline(always)]
462    fn from(variant: Trgpol) -> Self {
463        variant as u8 != 0
464    }
465}
466#[doc = "Field `TRGPOL` reader - Trigger Polarity"]
467pub type TrgpolR = crate::BitReader<Trgpol>;
468impl TrgpolR {
469    #[doc = "Get enumerated values variant"]
470    #[inline(always)]
471    pub const fn variant(&self) -> Trgpol {
472        match self.bits {
473            false => Trgpol::ActiveHigh,
474            true => Trgpol::ActiveLow,
475        }
476    }
477    #[doc = "Active high"]
478    #[inline(always)]
479    pub fn is_active_high(&self) -> bool {
480        *self == Trgpol::ActiveHigh
481    }
482    #[doc = "Active low"]
483    #[inline(always)]
484    pub fn is_active_low(&self) -> bool {
485        *self == Trgpol::ActiveLow
486    }
487}
488#[doc = "Field `TRGPOL` writer - Trigger Polarity"]
489pub type TrgpolW<'a, REG> = crate::BitWriter<'a, REG, Trgpol>;
490impl<'a, REG> TrgpolW<'a, REG>
491where
492    REG: crate::Writable + crate::RegisterSpec,
493{
494    #[doc = "Active high"]
495    #[inline(always)]
496    pub fn active_high(self) -> &'a mut crate::W<REG> {
497        self.variant(Trgpol::ActiveHigh)
498    }
499    #[doc = "Active low"]
500    #[inline(always)]
501    pub fn active_low(self) -> &'a mut crate::W<REG> {
502        self.variant(Trgpol::ActiveLow)
503    }
504}
505#[doc = "Field `TRGSEL` reader - Trigger Select"]
506pub type TrgselR = crate::FieldReader;
507#[doc = "Field `TRGSEL` writer - Trigger Select"]
508pub type TrgselW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
509impl R {
510    #[doc = "Bits 0:2 - Timer Mode"]
511    #[inline(always)]
512    pub fn timod(&self) -> TimodR {
513        TimodR::new((self.bits & 7) as u8)
514    }
515    #[doc = "Bit 5 - Timer One Time Operation"]
516    #[inline(always)]
517    pub fn onetim(&self) -> OnetimR {
518        OnetimR::new(((self.bits >> 5) & 1) != 0)
519    }
520    #[doc = "Bit 6 - Timer Pin Input Select"]
521    #[inline(always)]
522    pub fn pinins(&self) -> PininsR {
523        PininsR::new(((self.bits >> 6) & 1) != 0)
524    }
525    #[doc = "Bit 7 - Timer Pin Polarity"]
526    #[inline(always)]
527    pub fn pinpol(&self) -> PinpolR {
528        PinpolR::new(((self.bits >> 7) & 1) != 0)
529    }
530    #[doc = "Bits 8:12 - Timer Pin Select"]
531    #[inline(always)]
532    pub fn pinsel(&self) -> PinselR {
533        PinselR::new(((self.bits >> 8) & 0x1f) as u8)
534    }
535    #[doc = "Bits 16:17 - Timer Pin Configuration"]
536    #[inline(always)]
537    pub fn pincfg(&self) -> PincfgR {
538        PincfgR::new(((self.bits >> 16) & 3) as u8)
539    }
540    #[doc = "Bit 22 - Trigger Source"]
541    #[inline(always)]
542    pub fn trgsrc(&self) -> TrgsrcR {
543        TrgsrcR::new(((self.bits >> 22) & 1) != 0)
544    }
545    #[doc = "Bit 23 - Trigger Polarity"]
546    #[inline(always)]
547    pub fn trgpol(&self) -> TrgpolR {
548        TrgpolR::new(((self.bits >> 23) & 1) != 0)
549    }
550    #[doc = "Bits 24:29 - Trigger Select"]
551    #[inline(always)]
552    pub fn trgsel(&self) -> TrgselR {
553        TrgselR::new(((self.bits >> 24) & 0x3f) as u8)
554    }
555}
556#[cfg(feature = "debug")]
557impl core::fmt::Debug for R {
558    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
559        f.debug_struct("TIMCTL")
560            .field("timod", &self.timod())
561            .field("onetim", &self.onetim())
562            .field("pinins", &self.pinins())
563            .field("pinpol", &self.pinpol())
564            .field("pinsel", &self.pinsel())
565            .field("pincfg", &self.pincfg())
566            .field("trgsrc", &self.trgsrc())
567            .field("trgpol", &self.trgpol())
568            .field("trgsel", &self.trgsel())
569            .finish()
570    }
571}
572impl W {
573    #[doc = "Bits 0:2 - Timer Mode"]
574    #[inline(always)]
575    pub fn timod(&mut self) -> TimodW<'_, TimctlSpec> {
576        TimodW::new(self, 0)
577    }
578    #[doc = "Bit 5 - Timer One Time Operation"]
579    #[inline(always)]
580    pub fn onetim(&mut self) -> OnetimW<'_, TimctlSpec> {
581        OnetimW::new(self, 5)
582    }
583    #[doc = "Bit 6 - Timer Pin Input Select"]
584    #[inline(always)]
585    pub fn pinins(&mut self) -> PininsW<'_, TimctlSpec> {
586        PininsW::new(self, 6)
587    }
588    #[doc = "Bit 7 - Timer Pin Polarity"]
589    #[inline(always)]
590    pub fn pinpol(&mut self) -> PinpolW<'_, TimctlSpec> {
591        PinpolW::new(self, 7)
592    }
593    #[doc = "Bits 8:12 - Timer Pin Select"]
594    #[inline(always)]
595    pub fn pinsel(&mut self) -> PinselW<'_, TimctlSpec> {
596        PinselW::new(self, 8)
597    }
598    #[doc = "Bits 16:17 - Timer Pin Configuration"]
599    #[inline(always)]
600    pub fn pincfg(&mut self) -> PincfgW<'_, TimctlSpec> {
601        PincfgW::new(self, 16)
602    }
603    #[doc = "Bit 22 - Trigger Source"]
604    #[inline(always)]
605    pub fn trgsrc(&mut self) -> TrgsrcW<'_, TimctlSpec> {
606        TrgsrcW::new(self, 22)
607    }
608    #[doc = "Bit 23 - Trigger Polarity"]
609    #[inline(always)]
610    pub fn trgpol(&mut self) -> TrgpolW<'_, TimctlSpec> {
611        TrgpolW::new(self, 23)
612    }
613    #[doc = "Bits 24:29 - Trigger Select"]
614    #[inline(always)]
615    pub fn trgsel(&mut self) -> TrgselW<'_, TimctlSpec> {
616        TrgselW::new(self, 24)
617    }
618}
619#[doc = "Timer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`timctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
620pub struct TimctlSpec;
621impl crate::RegisterSpec for TimctlSpec {
622    type Ux = u32;
623}
624#[doc = "`read()` method returns [`timctl::R`](R) reader structure"]
625impl crate::Readable for TimctlSpec {}
626#[doc = "`write(|w| ..)` method takes [`timctl::W`](W) writer structure"]
627impl crate::Writable for TimctlSpec {
628    type Safety = crate::Unsafe;
629}
630#[doc = "`reset()` method sets TIMCTL[%s] to value 0"]
631impl crate::Resettable for TimctlSpec {}
mcxa_pac/flexio0/timctl.rs

mcxa_pac/flexio0/
timctl.rs
