mcxa_pac/
tdet0.rs

1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    _reserved0: [u8; 0x10],
6    cr: Cr,
7    sr: Sr,
8    lr: Lr,
9    ier: Ier,
10    tsr: Tsr,
11    ter: Ter,
12    _reserved6: [u8; 0x04],
13    ppr: Ppr,
14    _reserved7: [u8; 0x10],
15    pgfr: [Pgfr; 6],
16}
17impl RegisterBlock {
18    #[doc = "0x10 - Control"]
19    #[inline(always)]
20    pub const fn cr(&self) -> &Cr {
21        &self.cr
22    }
23    #[doc = "0x14 - Status"]
24    #[inline(always)]
25    pub const fn sr(&self) -> &Sr {
26        &self.sr
27    }
28    #[doc = "0x18 - Lock"]
29    #[inline(always)]
30    pub const fn lr(&self) -> &Lr {
31        &self.lr
32    }
33    #[doc = "0x1c - Interrupt Enable"]
34    #[inline(always)]
35    pub const fn ier(&self) -> &Ier {
36        &self.ier
37    }
38    #[doc = "0x20 - Tamper Seconds"]
39    #[inline(always)]
40    pub const fn tsr(&self) -> &Tsr {
41        &self.tsr
42    }
43    #[doc = "0x24 - Tamper Enable"]
44    #[inline(always)]
45    pub const fn ter(&self) -> &Ter {
46        &self.ter
47    }
48    #[doc = "0x2c - Pin Polarity"]
49    #[inline(always)]
50    pub const fn ppr(&self) -> &Ppr {
51        &self.ppr
52    }
53    #[doc = "0x40..0x58 - Pin Glitch Filter"]
54    #[inline(always)]
55    pub const fn pgfr(&self, n: usize) -> &Pgfr {
56        &self.pgfr[n]
57    }
58    #[doc = "Iterator for array of:"]
59    #[doc = "0x40..0x58 - Pin Glitch Filter"]
60    #[inline(always)]
61    pub fn pgfr_iter(&self) -> impl Iterator<Item = &Pgfr> {
62        self.pgfr.iter()
63    }
64}
65#[doc = "CR (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`] module"]
66#[doc(alias = "CR")]
67pub type Cr = crate::Reg<cr::CrSpec>;
68#[doc = "Control"]
69pub mod cr;
70#[doc = "SR (rw) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`sr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sr`] module"]
71#[doc(alias = "SR")]
72pub type Sr = crate::Reg<sr::SrSpec>;
73#[doc = "Status"]
74pub mod sr;
75#[doc = "LR (rw) register accessor: Lock\n\nYou can [`read`](crate::Reg::read) this register and get [`lr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lr`] module"]
76#[doc(alias = "LR")]
77pub type Lr = crate::Reg<lr::LrSpec>;
78#[doc = "Lock"]
79pub mod lr;
80#[doc = "IER (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ier::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ier`] module"]
81#[doc(alias = "IER")]
82pub type Ier = crate::Reg<ier::IerSpec>;
83#[doc = "Interrupt Enable"]
84pub mod ier;
85#[doc = "TSR (rw) register accessor: Tamper Seconds\n\nYou can [`read`](crate::Reg::read) this register and get [`tsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsr`] module"]
86#[doc(alias = "TSR")]
87pub type Tsr = crate::Reg<tsr::TsrSpec>;
88#[doc = "Tamper Seconds"]
89pub mod tsr;
90#[doc = "TER (rw) register accessor: Tamper Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ter::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ter::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ter`] module"]
91#[doc(alias = "TER")]
92pub type Ter = crate::Reg<ter::TerSpec>;
93#[doc = "Tamper Enable"]
94pub mod ter;
95#[doc = "PPR (rw) register accessor: Pin Polarity\n\nYou can [`read`](crate::Reg::read) this register and get [`ppr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ppr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppr`] module"]
96#[doc(alias = "PPR")]
97pub type Ppr = crate::Reg<ppr::PprSpec>;
98#[doc = "Pin Polarity"]
99pub mod ppr;
100#[doc = "PGFR (rw) register accessor: Pin Glitch Filter\n\nYou can [`read`](crate::Reg::read) this register and get [`pgfr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgfr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pgfr`] module"]
101#[doc(alias = "PGFR")]
102pub type Pgfr = crate::Reg<pgfr::PgfrSpec>;
103#[doc = "Pin Glitch Filter"]
104pub mod pgfr;