1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 verid: Verid,
6 param: Param,
7 _reserved2: [u8; 0x08],
8 cr: Cr,
9 sr: Sr,
10 ier: Ier,
11 der: Der,
12 cfgr0: Cfgr0,
13 cfgr1: Cfgr1,
14 _reserved8: [u8; 0x08],
15 dmr0: Dmr0,
16 dmr1: Dmr1,
17 _reserved10: [u8; 0x08],
18 ccr: Ccr,
19 ccr1: Ccr1,
20 _reserved12: [u8; 0x10],
21 fcr: Fcr,
22 fsr: Fsr,
23 tcr: Tcr,
24 tdr: Tdr,
25 _reserved16: [u8; 0x08],
26 rsr: Rsr,
27 rdr: Rdr,
28 rdror: Rdror,
29 _reserved19: [u8; 0x0380],
30 tcbr: Tcbr,
31 tdbr: [Tdbr; 128],
32 rdbr: [Rdbr; 128],
33}
34impl RegisterBlock {
35 #[doc = "0x00 - Version ID"]
36 #[inline(always)]
37 pub const fn verid(&self) -> &Verid {
38 &self.verid
39 }
40 #[doc = "0x04 - Parameter"]
41 #[inline(always)]
42 pub const fn param(&self) -> &Param {
43 &self.param
44 }
45 #[doc = "0x10 - Control"]
46 #[inline(always)]
47 pub const fn cr(&self) -> &Cr {
48 &self.cr
49 }
50 #[doc = "0x14 - Status"]
51 #[inline(always)]
52 pub const fn sr(&self) -> &Sr {
53 &self.sr
54 }
55 #[doc = "0x18 - Interrupt Enable"]
56 #[inline(always)]
57 pub const fn ier(&self) -> &Ier {
58 &self.ier
59 }
60 #[doc = "0x1c - DMA Enable"]
61 #[inline(always)]
62 pub const fn der(&self) -> &Der {
63 &self.der
64 }
65 #[doc = "0x20 - Configuration 0"]
66 #[inline(always)]
67 pub const fn cfgr0(&self) -> &Cfgr0 {
68 &self.cfgr0
69 }
70 #[doc = "0x24 - Configuration 1"]
71 #[inline(always)]
72 pub const fn cfgr1(&self) -> &Cfgr1 {
73 &self.cfgr1
74 }
75 #[doc = "0x30 - Data Match 0"]
76 #[inline(always)]
77 pub const fn dmr0(&self) -> &Dmr0 {
78 &self.dmr0
79 }
80 #[doc = "0x34 - Data Match 1"]
81 #[inline(always)]
82 pub const fn dmr1(&self) -> &Dmr1 {
83 &self.dmr1
84 }
85 #[doc = "0x40 - Clock Configuration"]
86 #[inline(always)]
87 pub const fn ccr(&self) -> &Ccr {
88 &self.ccr
89 }
90 #[doc = "0x44 - Clock Configuration 1"]
91 #[inline(always)]
92 pub const fn ccr1(&self) -> &Ccr1 {
93 &self.ccr1
94 }
95 #[doc = "0x58 - FIFO Control"]
96 #[inline(always)]
97 pub const fn fcr(&self) -> &Fcr {
98 &self.fcr
99 }
100 #[doc = "0x5c - FIFO Status"]
101 #[inline(always)]
102 pub const fn fsr(&self) -> &Fsr {
103 &self.fsr
104 }
105 #[doc = "0x60 - Transmit Command"]
106 #[inline(always)]
107 pub const fn tcr(&self) -> &Tcr {
108 &self.tcr
109 }
110 #[doc = "0x64 - Transmit Data"]
111 #[inline(always)]
112 pub const fn tdr(&self) -> &Tdr {
113 &self.tdr
114 }
115 #[doc = "0x70 - Receive Status"]
116 #[inline(always)]
117 pub const fn rsr(&self) -> &Rsr {
118 &self.rsr
119 }
120 #[doc = "0x74 - Receive Data"]
121 #[inline(always)]
122 pub const fn rdr(&self) -> &Rdr {
123 &self.rdr
124 }
125 #[doc = "0x78 - Receive Data Read Only"]
126 #[inline(always)]
127 pub const fn rdror(&self) -> &Rdror {
128 &self.rdror
129 }
130 #[doc = "0x3fc - Transmit Command Burst"]
131 #[inline(always)]
132 pub const fn tcbr(&self) -> &Tcbr {
133 &self.tcbr
134 }
135 #[doc = "0x400..0x600 - Transmit Data Burst"]
136 #[inline(always)]
137 pub const fn tdbr(&self, n: usize) -> &Tdbr {
138 &self.tdbr[n]
139 }
140 #[doc = "Iterator for array of:"]
141 #[doc = "0x400..0x600 - Transmit Data Burst"]
142 #[inline(always)]
143 pub fn tdbr_iter(&self) -> impl Iterator<Item = &Tdbr> {
144 self.tdbr.iter()
145 }
146 #[doc = "0x600..0x800 - Receive Data Burst"]
147 #[inline(always)]
148 pub const fn rdbr(&self, n: usize) -> &Rdbr {
149 &self.rdbr[n]
150 }
151 #[doc = "Iterator for array of:"]
152 #[doc = "0x600..0x800 - Receive Data Burst"]
153 #[inline(always)]
154 pub fn rdbr_iter(&self) -> impl Iterator<Item = &Rdbr> {
155 self.rdbr.iter()
156 }
157}
158#[doc = "VERID (r) register accessor: Version ID\n\nYou can [`read`](crate::Reg::read) this register and get [`verid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@verid`] module"]
159#[doc(alias = "VERID")]
160pub type Verid = crate::Reg<verid::VeridSpec>;
161#[doc = "Version ID"]
162pub mod verid;
163#[doc = "PARAM (r) register accessor: Parameter\n\nYou can [`read`](crate::Reg::read) this register and get [`param::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@param`] module"]
164#[doc(alias = "PARAM")]
165pub type Param = crate::Reg<param::ParamSpec>;
166#[doc = "Parameter"]
167pub mod param;
168#[doc = "CR (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`] module"]
169#[doc(alias = "CR")]
170pub type Cr = crate::Reg<cr::CrSpec>;
171#[doc = "Control"]
172pub mod cr;
173#[doc = "SR (rw) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`sr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sr`] module"]
174#[doc(alias = "SR")]
175pub type Sr = crate::Reg<sr::SrSpec>;
176#[doc = "Status"]
177pub mod sr;
178#[doc = "IER (rw) register accessor: Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ier::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ier`] module"]
179#[doc(alias = "IER")]
180pub type Ier = crate::Reg<ier::IerSpec>;
181#[doc = "Interrupt Enable"]
182pub mod ier;
183#[doc = "DER (rw) register accessor: DMA Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`der::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`der::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@der`] module"]
184#[doc(alias = "DER")]
185pub type Der = crate::Reg<der::DerSpec>;
186#[doc = "DMA Enable"]
187pub mod der;
188#[doc = "CFGR0 (rw) register accessor: Configuration 0\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgr0`] module"]
189#[doc(alias = "CFGR0")]
190pub type Cfgr0 = crate::Reg<cfgr0::Cfgr0Spec>;
191#[doc = "Configuration 0"]
192pub mod cfgr0;
193#[doc = "CFGR1 (rw) register accessor: Configuration 1\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgr1`] module"]
194#[doc(alias = "CFGR1")]
195pub type Cfgr1 = crate::Reg<cfgr1::Cfgr1Spec>;
196#[doc = "Configuration 1"]
197pub mod cfgr1;
198#[doc = "DMR0 (rw) register accessor: Data Match 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dmr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmr0`] module"]
199#[doc(alias = "DMR0")]
200pub type Dmr0 = crate::Reg<dmr0::Dmr0Spec>;
201#[doc = "Data Match 0"]
202pub mod dmr0;
203#[doc = "DMR1 (rw) register accessor: Data Match 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dmr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmr1`] module"]
204#[doc(alias = "DMR1")]
205pub type Dmr1 = crate::Reg<dmr1::Dmr1Spec>;
206#[doc = "Data Match 1"]
207pub mod dmr1;
208#[doc = "CCR (rw) register accessor: Clock Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"]
209#[doc(alias = "CCR")]
210pub type Ccr = crate::Reg<ccr::CcrSpec>;
211#[doc = "Clock Configuration"]
212pub mod ccr;
213#[doc = "CCR1 (rw) register accessor: Clock Configuration 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr1`] module"]
214#[doc(alias = "CCR1")]
215pub type Ccr1 = crate::Reg<ccr1::Ccr1Spec>;
216#[doc = "Clock Configuration 1"]
217pub mod ccr1;
218#[doc = "FCR (rw) register accessor: FIFO Control\n\nYou can [`read`](crate::Reg::read) this register and get [`fcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcr`] module"]
219#[doc(alias = "FCR")]
220pub type Fcr = crate::Reg<fcr::FcrSpec>;
221#[doc = "FIFO Control"]
222pub mod fcr;
223#[doc = "FSR (r) register accessor: FIFO Status\n\nYou can [`read`](crate::Reg::read) this register and get [`fsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsr`] module"]
224#[doc(alias = "FSR")]
225pub type Fsr = crate::Reg<fsr::FsrSpec>;
226#[doc = "FIFO Status"]
227pub mod fsr;
228#[doc = "TCR (rw) register accessor: Transmit Command\n\nYou can [`read`](crate::Reg::read) this register and get [`tcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcr`] module"]
229#[doc(alias = "TCR")]
230pub type Tcr = crate::Reg<tcr::TcrSpec>;
231#[doc = "Transmit Command"]
232pub mod tcr;
233#[doc = "TDR (w) register accessor: Transmit Data\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`] module"]
234#[doc(alias = "TDR")]
235pub type Tdr = crate::Reg<tdr::TdrSpec>;
236#[doc = "Transmit Data"]
237pub mod tdr;
238#[doc = "RSR (r) register accessor: Receive Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rsr`] module"]
239#[doc(alias = "RSR")]
240pub type Rsr = crate::Reg<rsr::RsrSpec>;
241#[doc = "Receive Status"]
242pub mod rsr;
243#[doc = "RDR (r) register accessor: Receive Data\n\nYou can [`read`](crate::Reg::read) this register and get [`rdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rdr`] module"]
244#[doc(alias = "RDR")]
245pub type Rdr = crate::Reg<rdr::RdrSpec>;
246#[doc = "Receive Data"]
247pub mod rdr;
248#[doc = "RDROR (r) register accessor: Receive Data Read Only\n\nYou can [`read`](crate::Reg::read) this register and get [`rdror::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rdror`] module"]
249#[doc(alias = "RDROR")]
250pub type Rdror = crate::Reg<rdror::RdrorSpec>;
251#[doc = "Receive Data Read Only"]
252pub mod rdror;
253#[doc = "TCBR (w) register accessor: Transmit Command Burst\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcbr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcbr`] module"]
254#[doc(alias = "TCBR")]
255pub type Tcbr = crate::Reg<tcbr::TcbrSpec>;
256#[doc = "Transmit Command Burst"]
257pub mod tcbr;
258#[doc = "TDBR (w) register accessor: Transmit Data Burst\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tdbr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdbr`] module"]
259#[doc(alias = "TDBR")]
260pub type Tdbr = crate::Reg<tdbr::TdbrSpec>;
261#[doc = "Transmit Data Burst"]
262pub mod tdbr;
263#[doc = "RDBR (r) register accessor: Receive Data Burst\n\nYou can [`read`](crate::Reg::read) this register and get [`rdbr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rdbr`] module"]
264#[doc(alias = "RDBR")]
265pub type Rdbr = crate::Reg<rdbr::RdbrSpec>;
266#[doc = "Receive Data Burst"]
267pub mod rdbr;