1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 verid: Verid,
6 param: Param,
7 trim_lock: TrimLock,
8 _reserved3: [u8; 0x04],
9 csr: Csr,
10 rccr: Rccr,
11 _reserved5: [u8; 0xe8],
12 sosccsr: Sosccsr,
13 _reserved6: [u8; 0x04],
14 sosccfg: Sosccfg,
15 _reserved7: [u8; 0xf4],
16 sirccsr: Sirccsr,
17 _reserved8: [u8; 0x08],
18 sirctcfg: Sirctcfg,
19 sirctrim: Sirctrim,
20 _reserved10: [u8; 0x04],
21 sircstat: Sircstat,
22 _reserved11: [u8; 0xe4],
23 firccsr: Firccsr,
24 _reserved12: [u8; 0x04],
25 firccfg: Firccfg,
26 _reserved13: [u8; 0x04],
27 firctrim: Firctrim,
28 _reserved14: [u8; 0xec],
29 rosccsr: Rosccsr,
30 _reserved15: [u8; 0x01fc],
31 spllcsr: Spllcsr,
32 spllctrl: Spllctrl,
33 spllstat: Spllstat,
34 spllndiv: Spllndiv,
35 spllmdiv: Spllmdiv,
36 spllpdiv: Spllpdiv,
37 splllock_cnfg: SplllockCnfg,
38 _reserved22: [u8; 0x04],
39 spllsscgstat: Spllsscgstat,
40 spllsscg0: Spllsscg0,
41 spllsscg1: Spllsscg1,
42 _reserved25: [u8; 0x01d4],
43 ldocsr: Ldocsr,
44}
45impl RegisterBlock {
46 #[doc = "0x00 - Version ID Register"]
47 #[inline(always)]
48 pub const fn verid(&self) -> &Verid {
49 &self.verid
50 }
51 #[doc = "0x04 - Parameter Register"]
52 #[inline(always)]
53 pub const fn param(&self) -> &Param {
54 &self.param
55 }
56 #[doc = "0x08 - Trim Lock register"]
57 #[inline(always)]
58 pub const fn trim_lock(&self) -> &TrimLock {
59 &self.trim_lock
60 }
61 #[doc = "0x10 - Clock Status Register"]
62 #[inline(always)]
63 pub const fn csr(&self) -> &Csr {
64 &self.csr
65 }
66 #[doc = "0x14 - Run Clock Control Register"]
67 #[inline(always)]
68 pub const fn rccr(&self) -> &Rccr {
69 &self.rccr
70 }
71 #[doc = "0x100 - SOSC Control Status Register"]
72 #[inline(always)]
73 pub const fn sosccsr(&self) -> &Sosccsr {
74 &self.sosccsr
75 }
76 #[doc = "0x108 - SOSC Configuration Register"]
77 #[inline(always)]
78 pub const fn sosccfg(&self) -> &Sosccfg {
79 &self.sosccfg
80 }
81 #[doc = "0x200 - SIRC Control Status Register"]
82 #[inline(always)]
83 pub const fn sirccsr(&self) -> &Sirccsr {
84 &self.sirccsr
85 }
86 #[doc = "0x20c - SIRC Trim Configuration Register"]
87 #[inline(always)]
88 pub const fn sirctcfg(&self) -> &Sirctcfg {
89 &self.sirctcfg
90 }
91 #[doc = "0x210 - SIRC Trim Register"]
92 #[inline(always)]
93 pub const fn sirctrim(&self) -> &Sirctrim {
94 &self.sirctrim
95 }
96 #[doc = "0x218 - SIRC Auto-trimming Status Register"]
97 #[inline(always)]
98 pub const fn sircstat(&self) -> &Sircstat {
99 &self.sircstat
100 }
101 #[doc = "0x300 - FIRC Control Status Register"]
102 #[inline(always)]
103 pub const fn firccsr(&self) -> &Firccsr {
104 &self.firccsr
105 }
106 #[doc = "0x308 - FIRC Configuration Register"]
107 #[inline(always)]
108 pub const fn firccfg(&self) -> &Firccfg {
109 &self.firccfg
110 }
111 #[doc = "0x310 - FIRC Trim Register"]
112 #[inline(always)]
113 pub const fn firctrim(&self) -> &Firctrim {
114 &self.firctrim
115 }
116 #[doc = "0x400 - ROSC Control Status Register"]
117 #[inline(always)]
118 pub const fn rosccsr(&self) -> &Rosccsr {
119 &self.rosccsr
120 }
121 #[doc = "0x600 - SPLL Control Status Register"]
122 #[inline(always)]
123 pub const fn spllcsr(&self) -> &Spllcsr {
124 &self.spllcsr
125 }
126 #[doc = "0x604 - SPLL Control Register"]
127 #[inline(always)]
128 pub const fn spllctrl(&self) -> &Spllctrl {
129 &self.spllctrl
130 }
131 #[doc = "0x608 - SPLL Status Register"]
132 #[inline(always)]
133 pub const fn spllstat(&self) -> &Spllstat {
134 &self.spllstat
135 }
136 #[doc = "0x60c - SPLL N Divider Register"]
137 #[inline(always)]
138 pub const fn spllndiv(&self) -> &Spllndiv {
139 &self.spllndiv
140 }
141 #[doc = "0x610 - SPLL M Divider Register"]
142 #[inline(always)]
143 pub const fn spllmdiv(&self) -> &Spllmdiv {
144 &self.spllmdiv
145 }
146 #[doc = "0x614 - SPLL P Divider Register"]
147 #[inline(always)]
148 pub const fn spllpdiv(&self) -> &Spllpdiv {
149 &self.spllpdiv
150 }
151 #[doc = "0x618 - SPLL LOCK Configuration Register"]
152 #[inline(always)]
153 pub const fn splllock_cnfg(&self) -> &SplllockCnfg {
154 &self.splllock_cnfg
155 }
156 #[doc = "0x620 - SPLL SSCG Status Register"]
157 #[inline(always)]
158 pub const fn spllsscgstat(&self) -> &Spllsscgstat {
159 &self.spllsscgstat
160 }
161 #[doc = "0x624 - SPLL Spread Spectrum Control 0 Register"]
162 #[inline(always)]
163 pub const fn spllsscg0(&self) -> &Spllsscg0 {
164 &self.spllsscg0
165 }
166 #[doc = "0x628 - SPLL Spread Spectrum Control 1 Register"]
167 #[inline(always)]
168 pub const fn spllsscg1(&self) -> &Spllsscg1 {
169 &self.spllsscg1
170 }
171 #[doc = "0x800 - LDO Control and Status Register"]
172 #[inline(always)]
173 pub const fn ldocsr(&self) -> &Ldocsr {
174 &self.ldocsr
175 }
176}
177#[doc = "VERID (r) register accessor: Version ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`verid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@verid`] module"]
178#[doc(alias = "VERID")]
179pub type Verid = crate::Reg<verid::VeridSpec>;
180#[doc = "Version ID Register"]
181pub mod verid;
182#[doc = "PARAM (r) register accessor: Parameter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`param::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@param`] module"]
183#[doc(alias = "PARAM")]
184pub type Param = crate::Reg<param::ParamSpec>;
185#[doc = "Parameter Register"]
186pub mod param;
187#[doc = "TRIM_LOCK (rw) register accessor: Trim Lock register\n\nYou can [`read`](crate::Reg::read) this register and get [`trim_lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trim_lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trim_lock`] module"]
188#[doc(alias = "TRIM_LOCK")]
189pub type TrimLock = crate::Reg<trim_lock::TrimLockSpec>;
190#[doc = "Trim Lock register"]
191pub mod trim_lock;
192#[doc = "CSR (r) register accessor: Clock Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`csr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csr`] module"]
193#[doc(alias = "CSR")]
194pub type Csr = crate::Reg<csr::CsrSpec>;
195#[doc = "Clock Status Register"]
196pub mod csr;
197#[doc = "RCCR (rw) register accessor: Run Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rccr`] module"]
198#[doc(alias = "RCCR")]
199pub type Rccr = crate::Reg<rccr::RccrSpec>;
200#[doc = "Run Clock Control Register"]
201pub mod rccr;
202#[doc = "SOSCCSR (rw) register accessor: SOSC Control Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sosccsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sosccsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sosccsr`] module"]
203#[doc(alias = "SOSCCSR")]
204pub type Sosccsr = crate::Reg<sosccsr::SosccsrSpec>;
205#[doc = "SOSC Control Status Register"]
206pub mod sosccsr;
207#[doc = "SOSCCFG (rw) register accessor: SOSC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sosccfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sosccfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sosccfg`] module"]
208#[doc(alias = "SOSCCFG")]
209pub type Sosccfg = crate::Reg<sosccfg::SosccfgSpec>;
210#[doc = "SOSC Configuration Register"]
211pub mod sosccfg;
212#[doc = "SIRCCSR (rw) register accessor: SIRC Control Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sirccsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sirccsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sirccsr`] module"]
213#[doc(alias = "SIRCCSR")]
214pub type Sirccsr = crate::Reg<sirccsr::SirccsrSpec>;
215#[doc = "SIRC Control Status Register"]
216pub mod sirccsr;
217#[doc = "SIRCTCFG (rw) register accessor: SIRC Trim Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sirctcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sirctcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sirctcfg`] module"]
218#[doc(alias = "SIRCTCFG")]
219pub type Sirctcfg = crate::Reg<sirctcfg::SirctcfgSpec>;
220#[doc = "SIRC Trim Configuration Register"]
221pub mod sirctcfg;
222#[doc = "SIRCTRIM (rw) register accessor: SIRC Trim Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sirctrim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sirctrim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sirctrim`] module"]
223#[doc(alias = "SIRCTRIM")]
224pub type Sirctrim = crate::Reg<sirctrim::SirctrimSpec>;
225#[doc = "SIRC Trim Register"]
226pub mod sirctrim;
227#[doc = "SIRCSTAT (rw) register accessor: SIRC Auto-trimming Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sircstat::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sircstat::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sircstat`] module"]
228#[doc(alias = "SIRCSTAT")]
229pub type Sircstat = crate::Reg<sircstat::SircstatSpec>;
230#[doc = "SIRC Auto-trimming Status Register"]
231pub mod sircstat;
232#[doc = "FIRCCSR (rw) register accessor: FIRC Control Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`firccsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`firccsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@firccsr`] module"]
233#[doc(alias = "FIRCCSR")]
234pub type Firccsr = crate::Reg<firccsr::FirccsrSpec>;
235#[doc = "FIRC Control Status Register"]
236pub mod firccsr;
237#[doc = "FIRCCFG (rw) register accessor: FIRC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`firccfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`firccfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@firccfg`] module"]
238#[doc(alias = "FIRCCFG")]
239pub type Firccfg = crate::Reg<firccfg::FirccfgSpec>;
240#[doc = "FIRC Configuration Register"]
241pub mod firccfg;
242#[doc = "FIRCTRIM (rw) register accessor: FIRC Trim Register\n\nYou can [`read`](crate::Reg::read) this register and get [`firctrim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`firctrim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@firctrim`] module"]
243#[doc(alias = "FIRCTRIM")]
244pub type Firctrim = crate::Reg<firctrim::FirctrimSpec>;
245#[doc = "FIRC Trim Register"]
246pub mod firctrim;
247#[doc = "ROSCCSR (rw) register accessor: ROSC Control Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rosccsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rosccsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rosccsr`] module"]
248#[doc(alias = "ROSCCSR")]
249pub type Rosccsr = crate::Reg<rosccsr::RosccsrSpec>;
250#[doc = "ROSC Control Status Register"]
251pub mod rosccsr;
252#[doc = "SPLLCSR (rw) register accessor: SPLL Control Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllcsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllcsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllcsr`] module"]
253#[doc(alias = "SPLLCSR")]
254pub type Spllcsr = crate::Reg<spllcsr::SpllcsrSpec>;
255#[doc = "SPLL Control Status Register"]
256pub mod spllcsr;
257#[doc = "SPLLCTRL (rw) register accessor: SPLL Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllctrl`] module"]
258#[doc(alias = "SPLLCTRL")]
259pub type Spllctrl = crate::Reg<spllctrl::SpllctrlSpec>;
260#[doc = "SPLL Control Register"]
261pub mod spllctrl;
262#[doc = "SPLLSTAT (r) register accessor: SPLL Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllstat`] module"]
263#[doc(alias = "SPLLSTAT")]
264pub type Spllstat = crate::Reg<spllstat::SpllstatSpec>;
265#[doc = "SPLL Status Register"]
266pub mod spllstat;
267#[doc = "SPLLNDIV (rw) register accessor: SPLL N Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllndiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllndiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllndiv`] module"]
268#[doc(alias = "SPLLNDIV")]
269pub type Spllndiv = crate::Reg<spllndiv::SpllndivSpec>;
270#[doc = "SPLL N Divider Register"]
271pub mod spllndiv;
272#[doc = "SPLLMDIV (rw) register accessor: SPLL M Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllmdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllmdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllmdiv`] module"]
273#[doc(alias = "SPLLMDIV")]
274pub type Spllmdiv = crate::Reg<spllmdiv::SpllmdivSpec>;
275#[doc = "SPLL M Divider Register"]
276pub mod spllmdiv;
277#[doc = "SPLLPDIV (rw) register accessor: SPLL P Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllpdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllpdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllpdiv`] module"]
278#[doc(alias = "SPLLPDIV")]
279pub type Spllpdiv = crate::Reg<spllpdiv::SpllpdivSpec>;
280#[doc = "SPLL P Divider Register"]
281pub mod spllpdiv;
282#[doc = "SPLLLOCK_CNFG (rw) register accessor: SPLL LOCK Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`splllock_cnfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`splllock_cnfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@splllock_cnfg`] module"]
283#[doc(alias = "SPLLLOCK_CNFG")]
284pub type SplllockCnfg = crate::Reg<splllock_cnfg::SplllockCnfgSpec>;
285#[doc = "SPLL LOCK Configuration Register"]
286pub mod splllock_cnfg;
287#[doc = "SPLLSSCGSTAT (r) register accessor: SPLL SSCG Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllsscgstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllsscgstat`] module"]
288#[doc(alias = "SPLLSSCGSTAT")]
289pub type Spllsscgstat = crate::Reg<spllsscgstat::SpllsscgstatSpec>;
290#[doc = "SPLL SSCG Status Register"]
291pub mod spllsscgstat;
292#[doc = "SPLLSSCG0 (rw) register accessor: SPLL Spread Spectrum Control 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllsscg0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllsscg0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllsscg0`] module"]
293#[doc(alias = "SPLLSSCG0")]
294pub type Spllsscg0 = crate::Reg<spllsscg0::Spllsscg0Spec>;
295#[doc = "SPLL Spread Spectrum Control 0 Register"]
296pub mod spllsscg0;
297#[doc = "SPLLSSCG1 (rw) register accessor: SPLL Spread Spectrum Control 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllsscg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllsscg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spllsscg1`] module"]
298#[doc(alias = "SPLLSSCG1")]
299pub type Spllsscg1 = crate::Reg<spllsscg1::Spllsscg1Spec>;
300#[doc = "SPLL Spread Spectrum Control 1 Register"]
301pub mod spllsscg1;
302#[doc = "LDOCSR (rw) register accessor: LDO Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ldocsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ldocsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldocsr`] module"]
303#[doc(alias = "LDOCSR")]
304pub type Ldocsr = crate::Reg<ldocsr::LdocsrSpec>;
305#[doc = "LDO Control and Status Register"]
306pub mod ldocsr;