mcxa_pac/
i3c0.rs

1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    mconfig: Mconfig,
6    sconfig: Sconfig,
7    sstatus: Sstatus,
8    sctrl: Sctrl,
9    sintset: Sintset,
10    sintclr: Sintclr,
11    sintmasked: Sintmasked,
12    serrwarn: Serrwarn,
13    sdmactrl: Sdmactrl,
14    _reserved9: [u8; 0x08],
15    sdatactrl: Sdatactrl,
16    swdatab: Swdatab,
17    swdatabe: Swdatabe,
18    swdatah: Swdatah,
19    swdatahe: Swdatahe,
20    srdatab: Srdatab,
21    _reserved15: [u8; 0x04],
22    srdatah: Srdatah,
23    _reserved16: [u8; 0x08],
24    _reserved_16_swdatab1: [u8; 0x04],
25    _reserved17: [u8; 0x04],
26    scapabilities2: Scapabilities2,
27    scapabilities: Scapabilities,
28    sdynaddr: Sdynaddr,
29    smaxlimits: Smaxlimits,
30    sidpartno: Sidpartno,
31    sidext: Sidext,
32    svendorid: Svendorid,
33    stcclock: Stcclock,
34    smsgmapaddr: Smsgmapaddr,
35    mconfig_ext: MconfigExt,
36    mctrl: Mctrl,
37    mstatus: Mstatus,
38    mibirules: Mibirules,
39    mintset: Mintset,
40    mintclr: Mintclr,
41    mintmasked: Mintmasked,
42    merrwarn: Merrwarn,
43    mdmactrl: Mdmactrl,
44    _reserved35: [u8; 0x08],
45    mdatactrl: Mdatactrl,
46    mwdatab: Mwdatab,
47    mwdatabe: Mwdatabe,
48    mwdatah: Mwdatah,
49    mwdatahe: Mwdatahe,
50    mrdatab: Mrdatab,
51    _reserved41: [u8; 0x04],
52    mrdatah: Mrdatah,
53    _reserved_42_mwdatab1: [u8; 0x04],
54    _reserved_43_mwmsg_sdr: [u8; 0x04],
55    mrmsg_sdr: MrmsgSdr,
56    _reserved_45_mwmsg_ddr: [u8; 0x04],
57    mrmsg_ddr: MrmsgDdr,
58    _reserved47: [u8; 0x04],
59    mdynaddr: Mdynaddr,
60    _reserved48: [u8; 0x34],
61    smapctrl0: Smapctrl0,
62    _reserved49: [u8; 0x20],
63    ibiext1: Ibiext1,
64    ibiext2: Ibiext2,
65    _reserved51: [u8; 0x0eb4],
66    sid: Sid,
67}
68impl RegisterBlock {
69    #[doc = "0x00 - Controller Configuration"]
70    #[inline(always)]
71    pub const fn mconfig(&self) -> &Mconfig {
72        &self.mconfig
73    }
74    #[doc = "0x04 - Target Configuration"]
75    #[inline(always)]
76    pub const fn sconfig(&self) -> &Sconfig {
77        &self.sconfig
78    }
79    #[doc = "0x08 - Target Status"]
80    #[inline(always)]
81    pub const fn sstatus(&self) -> &Sstatus {
82        &self.sstatus
83    }
84    #[doc = "0x0c - Target Control"]
85    #[inline(always)]
86    pub const fn sctrl(&self) -> &Sctrl {
87        &self.sctrl
88    }
89    #[doc = "0x10 - Target Interrupt Set"]
90    #[inline(always)]
91    pub const fn sintset(&self) -> &Sintset {
92        &self.sintset
93    }
94    #[doc = "0x14 - Target Interrupt Clear"]
95    #[inline(always)]
96    pub const fn sintclr(&self) -> &Sintclr {
97        &self.sintclr
98    }
99    #[doc = "0x18 - Target Interrupt Mask"]
100    #[inline(always)]
101    pub const fn sintmasked(&self) -> &Sintmasked {
102        &self.sintmasked
103    }
104    #[doc = "0x1c - Target Errors and Warnings"]
105    #[inline(always)]
106    pub const fn serrwarn(&self) -> &Serrwarn {
107        &self.serrwarn
108    }
109    #[doc = "0x20 - Target DMA Control"]
110    #[inline(always)]
111    pub const fn sdmactrl(&self) -> &Sdmactrl {
112        &self.sdmactrl
113    }
114    #[doc = "0x2c - Target Data Control"]
115    #[inline(always)]
116    pub const fn sdatactrl(&self) -> &Sdatactrl {
117        &self.sdatactrl
118    }
119    #[doc = "0x30 - Target Write Data Byte"]
120    #[inline(always)]
121    pub const fn swdatab(&self) -> &Swdatab {
122        &self.swdatab
123    }
124    #[doc = "0x34 - Target Write Data Byte End"]
125    #[inline(always)]
126    pub const fn swdatabe(&self) -> &Swdatabe {
127        &self.swdatabe
128    }
129    #[doc = "0x38 - Target Write Data Halfword"]
130    #[inline(always)]
131    pub const fn swdatah(&self) -> &Swdatah {
132        &self.swdatah
133    }
134    #[doc = "0x3c - Target Write Data Halfword End"]
135    #[inline(always)]
136    pub const fn swdatahe(&self) -> &Swdatahe {
137        &self.swdatahe
138    }
139    #[doc = "0x40 - Target Read Data Byte"]
140    #[inline(always)]
141    pub const fn srdatab(&self) -> &Srdatab {
142        &self.srdatab
143    }
144    #[doc = "0x48 - Target Read Data Halfword"]
145    #[inline(always)]
146    pub const fn srdatah(&self) -> &Srdatah {
147        &self.srdatah
148    }
149    #[doc = "0x54 - Target Write Data Halfword"]
150    #[inline(always)]
151    pub const fn swdatah1(&self) -> &Swdatah1 {
152        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(84).cast() }
153    }
154    #[doc = "0x54 - Target Write Data Byte"]
155    #[inline(always)]
156    pub const fn swdatab1(&self) -> &Swdatab1 {
157        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(84).cast() }
158    }
159    #[doc = "0x5c - Target Capabilities 2"]
160    #[inline(always)]
161    pub const fn scapabilities2(&self) -> &Scapabilities2 {
162        &self.scapabilities2
163    }
164    #[doc = "0x60 - Target Capabilities"]
165    #[inline(always)]
166    pub const fn scapabilities(&self) -> &Scapabilities {
167        &self.scapabilities
168    }
169    #[doc = "0x64 - Target Dynamic Address"]
170    #[inline(always)]
171    pub const fn sdynaddr(&self) -> &Sdynaddr {
172        &self.sdynaddr
173    }
174    #[doc = "0x68 - Target Maximum Limits"]
175    #[inline(always)]
176    pub const fn smaxlimits(&self) -> &Smaxlimits {
177        &self.smaxlimits
178    }
179    #[doc = "0x6c - Target ID Part Number"]
180    #[inline(always)]
181    pub const fn sidpartno(&self) -> &Sidpartno {
182        &self.sidpartno
183    }
184    #[doc = "0x70 - Target ID Extension"]
185    #[inline(always)]
186    pub const fn sidext(&self) -> &Sidext {
187        &self.sidext
188    }
189    #[doc = "0x74 - Target Vendor ID"]
190    #[inline(always)]
191    pub const fn svendorid(&self) -> &Svendorid {
192        &self.svendorid
193    }
194    #[doc = "0x78 - Target Time Control Clock"]
195    #[inline(always)]
196    pub const fn stcclock(&self) -> &Stcclock {
197        &self.stcclock
198    }
199    #[doc = "0x7c - Target Message Map Address"]
200    #[inline(always)]
201    pub const fn smsgmapaddr(&self) -> &Smsgmapaddr {
202        &self.smsgmapaddr
203    }
204    #[doc = "0x80 - Controller Extended Configuration"]
205    #[inline(always)]
206    pub const fn mconfig_ext(&self) -> &MconfigExt {
207        &self.mconfig_ext
208    }
209    #[doc = "0x84 - Controller Control"]
210    #[inline(always)]
211    pub const fn mctrl(&self) -> &Mctrl {
212        &self.mctrl
213    }
214    #[doc = "0x88 - Controller Status"]
215    #[inline(always)]
216    pub const fn mstatus(&self) -> &Mstatus {
217        &self.mstatus
218    }
219    #[doc = "0x8c - Controller In-band Interrupt Registry and Rules"]
220    #[inline(always)]
221    pub const fn mibirules(&self) -> &Mibirules {
222        &self.mibirules
223    }
224    #[doc = "0x90 - Controller Interrupt Set"]
225    #[inline(always)]
226    pub const fn mintset(&self) -> &Mintset {
227        &self.mintset
228    }
229    #[doc = "0x94 - Controller Interrupt Clear"]
230    #[inline(always)]
231    pub const fn mintclr(&self) -> &Mintclr {
232        &self.mintclr
233    }
234    #[doc = "0x98 - Controller Interrupt Mask"]
235    #[inline(always)]
236    pub const fn mintmasked(&self) -> &Mintmasked {
237        &self.mintmasked
238    }
239    #[doc = "0x9c - Controller Errors and Warnings"]
240    #[inline(always)]
241    pub const fn merrwarn(&self) -> &Merrwarn {
242        &self.merrwarn
243    }
244    #[doc = "0xa0 - Controller DMA Control"]
245    #[inline(always)]
246    pub const fn mdmactrl(&self) -> &Mdmactrl {
247        &self.mdmactrl
248    }
249    #[doc = "0xac - Controller Data Control"]
250    #[inline(always)]
251    pub const fn mdatactrl(&self) -> &Mdatactrl {
252        &self.mdatactrl
253    }
254    #[doc = "0xb0 - Controller Write Data Byte"]
255    #[inline(always)]
256    pub const fn mwdatab(&self) -> &Mwdatab {
257        &self.mwdatab
258    }
259    #[doc = "0xb4 - Controller Write Data Byte End"]
260    #[inline(always)]
261    pub const fn mwdatabe(&self) -> &Mwdatabe {
262        &self.mwdatabe
263    }
264    #[doc = "0xb8 - Controller Write Data Halfword"]
265    #[inline(always)]
266    pub const fn mwdatah(&self) -> &Mwdatah {
267        &self.mwdatah
268    }
269    #[doc = "0xbc - Controller Write Data Halfword End"]
270    #[inline(always)]
271    pub const fn mwdatahe(&self) -> &Mwdatahe {
272        &self.mwdatahe
273    }
274    #[doc = "0xc0 - Controller Read Data Byte"]
275    #[inline(always)]
276    pub const fn mrdatab(&self) -> &Mrdatab {
277        &self.mrdatab
278    }
279    #[doc = "0xc8 - Controller Read Data Halfword"]
280    #[inline(always)]
281    pub const fn mrdatah(&self) -> &Mrdatah {
282        &self.mrdatah
283    }
284    #[doc = "0xcc - Controller Write Halfword Data (to Bus)"]
285    #[inline(always)]
286    pub const fn mwdatah1(&self) -> &Mwdatah1 {
287        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(204).cast() }
288    }
289    #[doc = "0xcc - Controller Write Byte Data 1 (to Bus)"]
290    #[inline(always)]
291    pub const fn mwdatab1(&self) -> &Mwdatab1 {
292        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(204).cast() }
293    }
294    #[doc = "0xd0 - Controller Write Message Data in SDR mode"]
295    #[inline(always)]
296    pub const fn mwmsg_sdr_data(&self) -> &MwmsgSdrData {
297        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(208).cast() }
298    }
299    #[doc = "0xd0 - Controller Write Message Control in SDR mode"]
300    #[inline(always)]
301    pub const fn mwmsg_sdr_control(&self) -> &MwmsgSdrControl {
302        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(208).cast() }
303    }
304    #[doc = "0xd4 - Controller Read Message in SDR mode"]
305    #[inline(always)]
306    pub const fn mrmsg_sdr(&self) -> &MrmsgSdr {
307        &self.mrmsg_sdr
308    }
309    #[doc = "0xd8 - Controller Write Message Data in DDR mode"]
310    #[inline(always)]
311    pub const fn mwmsg_ddr_data(&self) -> &MwmsgDdrData {
312        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(216).cast() }
313    }
314    #[doc = "0xd8 - Controller Write Message in DDR Mode Control 2"]
315    #[inline(always)]
316    pub const fn mwmsg_ddr_control2(&self) -> &MwmsgDdrControl2 {
317        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(216).cast() }
318    }
319    #[doc = "0xd8 - Controller Write Message in DDR mode: First Control Word"]
320    #[inline(always)]
321    pub const fn mwmsg_ddr_control(&self) -> &MwmsgDdrControl {
322        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(216).cast() }
323    }
324    #[doc = "0xdc - Controller Read Message in DDR mode"]
325    #[inline(always)]
326    pub const fn mrmsg_ddr(&self) -> &MrmsgDdr {
327        &self.mrmsg_ddr
328    }
329    #[doc = "0xe4 - Controller Dynamic Address"]
330    #[inline(always)]
331    pub const fn mdynaddr(&self) -> &Mdynaddr {
332        &self.mdynaddr
333    }
334    #[doc = "0x11c - Map Feature Control 0"]
335    #[inline(always)]
336    pub const fn smapctrl0(&self) -> &Smapctrl0 {
337        &self.smapctrl0
338    }
339    #[doc = "0x140 - Extended IBI Data 1"]
340    #[inline(always)]
341    pub const fn ibiext1(&self) -> &Ibiext1 {
342        &self.ibiext1
343    }
344    #[doc = "0x144 - Extended IBI Data 2"]
345    #[inline(always)]
346    pub const fn ibiext2(&self) -> &Ibiext2 {
347        &self.ibiext2
348    }
349    #[doc = "0xffc - Target Module ID"]
350    #[inline(always)]
351    pub const fn sid(&self) -> &Sid {
352        &self.sid
353    }
354}
355#[doc = "MCONFIG (rw) register accessor: Controller Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`mconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mconfig`] module"]
356#[doc(alias = "MCONFIG")]
357pub type Mconfig = crate::Reg<mconfig::MconfigSpec>;
358#[doc = "Controller Configuration"]
359pub mod mconfig;
360#[doc = "SCONFIG (rw) register accessor: Target Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`sconfig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sconfig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sconfig`] module"]
361#[doc(alias = "SCONFIG")]
362pub type Sconfig = crate::Reg<sconfig::SconfigSpec>;
363#[doc = "Target Configuration"]
364pub mod sconfig;
365#[doc = "SSTATUS (rw) register accessor: Target Status\n\nYou can [`read`](crate::Reg::read) this register and get [`sstatus::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sstatus::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstatus`] module"]
366#[doc(alias = "SSTATUS")]
367pub type Sstatus = crate::Reg<sstatus::SstatusSpec>;
368#[doc = "Target Status"]
369pub mod sstatus;
370#[doc = "SCTRL (rw) register accessor: Target Control\n\nYou can [`read`](crate::Reg::read) this register and get [`sctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sctrl`] module"]
371#[doc(alias = "SCTRL")]
372pub type Sctrl = crate::Reg<sctrl::SctrlSpec>;
373#[doc = "Target Control"]
374pub mod sctrl;
375#[doc = "SINTSET (rw) register accessor: Target Interrupt Set\n\nYou can [`read`](crate::Reg::read) this register and get [`sintset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sintset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sintset`] module"]
376#[doc(alias = "SINTSET")]
377pub type Sintset = crate::Reg<sintset::SintsetSpec>;
378#[doc = "Target Interrupt Set"]
379pub mod sintset;
380#[doc = "SINTCLR (rw) register accessor: Target Interrupt Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`sintclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sintclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sintclr`] module"]
381#[doc(alias = "SINTCLR")]
382pub type Sintclr = crate::Reg<sintclr::SintclrSpec>;
383#[doc = "Target Interrupt Clear"]
384pub mod sintclr;
385#[doc = "SINTMASKED (r) register accessor: Target Interrupt Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`sintmasked::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sintmasked`] module"]
386#[doc(alias = "SINTMASKED")]
387pub type Sintmasked = crate::Reg<sintmasked::SintmaskedSpec>;
388#[doc = "Target Interrupt Mask"]
389pub mod sintmasked;
390#[doc = "SERRWARN (rw) register accessor: Target Errors and Warnings\n\nYou can [`read`](crate::Reg::read) this register and get [`serrwarn::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`serrwarn::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@serrwarn`] module"]
391#[doc(alias = "SERRWARN")]
392pub type Serrwarn = crate::Reg<serrwarn::SerrwarnSpec>;
393#[doc = "Target Errors and Warnings"]
394pub mod serrwarn;
395#[doc = "SDMACTRL (rw) register accessor: Target DMA Control\n\nYou can [`read`](crate::Reg::read) this register and get [`sdmactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdmactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdmactrl`] module"]
396#[doc(alias = "SDMACTRL")]
397pub type Sdmactrl = crate::Reg<sdmactrl::SdmactrlSpec>;
398#[doc = "Target DMA Control"]
399pub mod sdmactrl;
400#[doc = "SDATACTRL (rw) register accessor: Target Data Control\n\nYou can [`read`](crate::Reg::read) this register and get [`sdatactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdatactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdatactrl`] module"]
401#[doc(alias = "SDATACTRL")]
402pub type Sdatactrl = crate::Reg<sdatactrl::SdatactrlSpec>;
403#[doc = "Target Data Control"]
404pub mod sdatactrl;
405#[doc = "SWDATAB (w) register accessor: Target Write Data Byte\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatab::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatab`] module"]
406#[doc(alias = "SWDATAB")]
407pub type Swdatab = crate::Reg<swdatab::SwdatabSpec>;
408#[doc = "Target Write Data Byte"]
409pub mod swdatab;
410#[doc = "SWDATABE (w) register accessor: Target Write Data Byte End\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatabe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatabe`] module"]
411#[doc(alias = "SWDATABE")]
412pub type Swdatabe = crate::Reg<swdatabe::SwdatabeSpec>;
413#[doc = "Target Write Data Byte End"]
414pub mod swdatabe;
415#[doc = "SWDATAH (w) register accessor: Target Write Data Halfword\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatah::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatah`] module"]
416#[doc(alias = "SWDATAH")]
417pub type Swdatah = crate::Reg<swdatah::SwdatahSpec>;
418#[doc = "Target Write Data Halfword"]
419pub mod swdatah;
420#[doc = "SWDATAHE (w) register accessor: Target Write Data Halfword End\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatahe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatahe`] module"]
421#[doc(alias = "SWDATAHE")]
422pub type Swdatahe = crate::Reg<swdatahe::SwdataheSpec>;
423#[doc = "Target Write Data Halfword End"]
424pub mod swdatahe;
425#[doc = "SRDATAB (r) register accessor: Target Read Data Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`srdatab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srdatab`] module"]
426#[doc(alias = "SRDATAB")]
427pub type Srdatab = crate::Reg<srdatab::SrdatabSpec>;
428#[doc = "Target Read Data Byte"]
429pub mod srdatab;
430#[doc = "SRDATAH (r) register accessor: Target Read Data Halfword\n\nYou can [`read`](crate::Reg::read) this register and get [`srdatah::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srdatah`] module"]
431#[doc(alias = "SRDATAH")]
432pub type Srdatah = crate::Reg<srdatah::SrdatahSpec>;
433#[doc = "Target Read Data Halfword"]
434pub mod srdatah;
435#[doc = "SWDATAB1 (w) register accessor: Target Write Data Byte\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatab1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatab1`] module"]
436#[doc(alias = "SWDATAB1")]
437pub type Swdatab1 = crate::Reg<swdatab1::Swdatab1Spec>;
438#[doc = "Target Write Data Byte"]
439pub mod swdatab1;
440#[doc = "SWDATAH1 (w) register accessor: Target Write Data Halfword\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swdatah1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swdatah1`] module"]
441#[doc(alias = "SWDATAH1")]
442pub type Swdatah1 = crate::Reg<swdatah1::Swdatah1Spec>;
443#[doc = "Target Write Data Halfword"]
444pub mod swdatah1;
445#[doc = "SCAPABILITIES2 (r) register accessor: Target Capabilities 2\n\nYou can [`read`](crate::Reg::read) this register and get [`scapabilities2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scapabilities2`] module"]
446#[doc(alias = "SCAPABILITIES2")]
447pub type Scapabilities2 = crate::Reg<scapabilities2::Scapabilities2Spec>;
448#[doc = "Target Capabilities 2"]
449pub mod scapabilities2;
450#[doc = "SCAPABILITIES (r) register accessor: Target Capabilities\n\nYou can [`read`](crate::Reg::read) this register and get [`scapabilities::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scapabilities`] module"]
451#[doc(alias = "SCAPABILITIES")]
452pub type Scapabilities = crate::Reg<scapabilities::ScapabilitiesSpec>;
453#[doc = "Target Capabilities"]
454pub mod scapabilities;
455#[doc = "SDYNADDR (rw) register accessor: Target Dynamic Address\n\nYou can [`read`](crate::Reg::read) this register and get [`sdynaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdynaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdynaddr`] module"]
456#[doc(alias = "SDYNADDR")]
457pub type Sdynaddr = crate::Reg<sdynaddr::SdynaddrSpec>;
458#[doc = "Target Dynamic Address"]
459pub mod sdynaddr;
460#[doc = "SMAXLIMITS (rw) register accessor: Target Maximum Limits\n\nYou can [`read`](crate::Reg::read) this register and get [`smaxlimits::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`smaxlimits::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smaxlimits`] module"]
461#[doc(alias = "SMAXLIMITS")]
462pub type Smaxlimits = crate::Reg<smaxlimits::SmaxlimitsSpec>;
463#[doc = "Target Maximum Limits"]
464pub mod smaxlimits;
465#[doc = "SIDPARTNO (rw) register accessor: Target ID Part Number\n\nYou can [`read`](crate::Reg::read) this register and get [`sidpartno::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sidpartno::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sidpartno`] module"]
466#[doc(alias = "SIDPARTNO")]
467pub type Sidpartno = crate::Reg<sidpartno::SidpartnoSpec>;
468#[doc = "Target ID Part Number"]
469pub mod sidpartno;
470#[doc = "SIDEXT (rw) register accessor: Target ID Extension\n\nYou can [`read`](crate::Reg::read) this register and get [`sidext::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sidext::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sidext`] module"]
471#[doc(alias = "SIDEXT")]
472pub type Sidext = crate::Reg<sidext::SidextSpec>;
473#[doc = "Target ID Extension"]
474pub mod sidext;
475#[doc = "SVENDORID (rw) register accessor: Target Vendor ID\n\nYou can [`read`](crate::Reg::read) this register and get [`svendorid::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`svendorid::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@svendorid`] module"]
476#[doc(alias = "SVENDORID")]
477pub type Svendorid = crate::Reg<svendorid::SvendoridSpec>;
478#[doc = "Target Vendor ID"]
479pub mod svendorid;
480#[doc = "STCCLOCK (rw) register accessor: Target Time Control Clock\n\nYou can [`read`](crate::Reg::read) this register and get [`stcclock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stcclock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stcclock`] module"]
481#[doc(alias = "STCCLOCK")]
482pub type Stcclock = crate::Reg<stcclock::StcclockSpec>;
483#[doc = "Target Time Control Clock"]
484pub mod stcclock;
485#[doc = "SMSGMAPADDR (r) register accessor: Target Message Map Address\n\nYou can [`read`](crate::Reg::read) this register and get [`smsgmapaddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smsgmapaddr`] module"]
486#[doc(alias = "SMSGMAPADDR")]
487pub type Smsgmapaddr = crate::Reg<smsgmapaddr::SmsgmapaddrSpec>;
488#[doc = "Target Message Map Address"]
489pub mod smsgmapaddr;
490#[doc = "MCONFIG_EXT (rw) register accessor: Controller Extended Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`mconfig_ext::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mconfig_ext::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mconfig_ext`] module"]
491#[doc(alias = "MCONFIG_EXT")]
492pub type MconfigExt = crate::Reg<mconfig_ext::MconfigExtSpec>;
493#[doc = "Controller Extended Configuration"]
494pub mod mconfig_ext;
495#[doc = "MCTRL (rw) register accessor: Controller Control\n\nYou can [`read`](crate::Reg::read) this register and get [`mctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mctrl`] module"]
496#[doc(alias = "MCTRL")]
497pub type Mctrl = crate::Reg<mctrl::MctrlSpec>;
498#[doc = "Controller Control"]
499pub mod mctrl;
500#[doc = "MSTATUS (rw) register accessor: Controller Status\n\nYou can [`read`](crate::Reg::read) this register and get [`mstatus::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mstatus::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mstatus`] module"]
501#[doc(alias = "MSTATUS")]
502pub type Mstatus = crate::Reg<mstatus::MstatusSpec>;
503#[doc = "Controller Status"]
504pub mod mstatus;
505#[doc = "MIBIRULES (rw) register accessor: Controller In-band Interrupt Registry and Rules\n\nYou can [`read`](crate::Reg::read) this register and get [`mibirules::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mibirules::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mibirules`] module"]
506#[doc(alias = "MIBIRULES")]
507pub type Mibirules = crate::Reg<mibirules::MibirulesSpec>;
508#[doc = "Controller In-band Interrupt Registry and Rules"]
509pub mod mibirules;
510#[doc = "MINTSET (rw) register accessor: Controller Interrupt Set\n\nYou can [`read`](crate::Reg::read) this register and get [`mintset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mintset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mintset`] module"]
511#[doc(alias = "MINTSET")]
512pub type Mintset = crate::Reg<mintset::MintsetSpec>;
513#[doc = "Controller Interrupt Set"]
514pub mod mintset;
515#[doc = "MINTCLR (rw) register accessor: Controller Interrupt Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`mintclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mintclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mintclr`] module"]
516#[doc(alias = "MINTCLR")]
517pub type Mintclr = crate::Reg<mintclr::MintclrSpec>;
518#[doc = "Controller Interrupt Clear"]
519pub mod mintclr;
520#[doc = "MINTMASKED (r) register accessor: Controller Interrupt Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`mintmasked::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mintmasked`] module"]
521#[doc(alias = "MINTMASKED")]
522pub type Mintmasked = crate::Reg<mintmasked::MintmaskedSpec>;
523#[doc = "Controller Interrupt Mask"]
524pub mod mintmasked;
525#[doc = "MERRWARN (rw) register accessor: Controller Errors and Warnings\n\nYou can [`read`](crate::Reg::read) this register and get [`merrwarn::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`merrwarn::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@merrwarn`] module"]
526#[doc(alias = "MERRWARN")]
527pub type Merrwarn = crate::Reg<merrwarn::MerrwarnSpec>;
528#[doc = "Controller Errors and Warnings"]
529pub mod merrwarn;
530#[doc = "MDMACTRL (rw) register accessor: Controller DMA Control\n\nYou can [`read`](crate::Reg::read) this register and get [`mdmactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mdmactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mdmactrl`] module"]
531#[doc(alias = "MDMACTRL")]
532pub type Mdmactrl = crate::Reg<mdmactrl::MdmactrlSpec>;
533#[doc = "Controller DMA Control"]
534pub mod mdmactrl;
535#[doc = "MDATACTRL (rw) register accessor: Controller Data Control\n\nYou can [`read`](crate::Reg::read) this register and get [`mdatactrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mdatactrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mdatactrl`] module"]
536#[doc(alias = "MDATACTRL")]
537pub type Mdatactrl = crate::Reg<mdatactrl::MdatactrlSpec>;
538#[doc = "Controller Data Control"]
539pub mod mdatactrl;
540#[doc = "MWDATAB (w) register accessor: Controller Write Data Byte\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatab::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatab`] module"]
541#[doc(alias = "MWDATAB")]
542pub type Mwdatab = crate::Reg<mwdatab::MwdatabSpec>;
543#[doc = "Controller Write Data Byte"]
544pub mod mwdatab;
545#[doc = "MWDATABE (w) register accessor: Controller Write Data Byte End\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatabe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatabe`] module"]
546#[doc(alias = "MWDATABE")]
547pub type Mwdatabe = crate::Reg<mwdatabe::MwdatabeSpec>;
548#[doc = "Controller Write Data Byte End"]
549pub mod mwdatabe;
550#[doc = "MWDATAH (w) register accessor: Controller Write Data Halfword\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatah::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatah`] module"]
551#[doc(alias = "MWDATAH")]
552pub type Mwdatah = crate::Reg<mwdatah::MwdatahSpec>;
553#[doc = "Controller Write Data Halfword"]
554pub mod mwdatah;
555#[doc = "MWDATAHE (w) register accessor: Controller Write Data Halfword End\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatahe::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatahe`] module"]
556#[doc(alias = "MWDATAHE")]
557pub type Mwdatahe = crate::Reg<mwdatahe::MwdataheSpec>;
558#[doc = "Controller Write Data Halfword End"]
559pub mod mwdatahe;
560#[doc = "MRDATAB (r) register accessor: Controller Read Data Byte\n\nYou can [`read`](crate::Reg::read) this register and get [`mrdatab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrdatab`] module"]
561#[doc(alias = "MRDATAB")]
562pub type Mrdatab = crate::Reg<mrdatab::MrdatabSpec>;
563#[doc = "Controller Read Data Byte"]
564pub mod mrdatab;
565#[doc = "MRDATAH (r) register accessor: Controller Read Data Halfword\n\nYou can [`read`](crate::Reg::read) this register and get [`mrdatah::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrdatah`] module"]
566#[doc(alias = "MRDATAH")]
567pub type Mrdatah = crate::Reg<mrdatah::MrdatahSpec>;
568#[doc = "Controller Read Data Halfword"]
569pub mod mrdatah;
570#[doc = "MWDATAB1 (w) register accessor: Controller Write Byte Data 1 (to Bus)\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatab1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatab1`] module"]
571#[doc(alias = "MWDATAB1")]
572pub type Mwdatab1 = crate::Reg<mwdatab1::Mwdatab1Spec>;
573#[doc = "Controller Write Byte Data 1 (to Bus)"]
574pub mod mwdatab1;
575#[doc = "MWDATAH1 (w) register accessor: Controller Write Halfword Data (to Bus)\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatah1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwdatah1`] module"]
576#[doc(alias = "MWDATAH1")]
577pub type Mwdatah1 = crate::Reg<mwdatah1::Mwdatah1Spec>;
578#[doc = "Controller Write Halfword Data (to Bus)"]
579pub mod mwdatah1;
580#[doc = "MWMSG_SDR_CONTROL (w) register accessor: Controller Write Message Control in SDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_sdr_control::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_sdr_control`] module"]
581#[doc(alias = "MWMSG_SDR_CONTROL")]
582pub type MwmsgSdrControl = crate::Reg<mwmsg_sdr_control::MwmsgSdrControlSpec>;
583#[doc = "Controller Write Message Control in SDR mode"]
584pub mod mwmsg_sdr_control;
585#[doc = "MWMSG_SDR_DATA (w) register accessor: Controller Write Message Data in SDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_sdr_data::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_sdr_data`] module"]
586#[doc(alias = "MWMSG_SDR_DATA")]
587pub type MwmsgSdrData = crate::Reg<mwmsg_sdr_data::MwmsgSdrDataSpec>;
588#[doc = "Controller Write Message Data in SDR mode"]
589pub mod mwmsg_sdr_data;
590#[doc = "MRMSG_SDR (r) register accessor: Controller Read Message in SDR mode\n\nYou can [`read`](crate::Reg::read) this register and get [`mrmsg_sdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrmsg_sdr`] module"]
591#[doc(alias = "MRMSG_SDR")]
592pub type MrmsgSdr = crate::Reg<mrmsg_sdr::MrmsgSdrSpec>;
593#[doc = "Controller Read Message in SDR mode"]
594pub mod mrmsg_sdr;
595#[doc = "MWMSG_DDR_CONTROL (w) register accessor: Controller Write Message in DDR mode: First Control Word\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_ddr_control::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_ddr_control`] module"]
596#[doc(alias = "MWMSG_DDR_CONTROL")]
597pub type MwmsgDdrControl = crate::Reg<mwmsg_ddr_control::MwmsgDdrControlSpec>;
598#[doc = "Controller Write Message in DDR mode: First Control Word"]
599pub mod mwmsg_ddr_control;
600#[doc = "MWMSG_DDR_CONTROL2 (w) register accessor: Controller Write Message in DDR Mode Control 2\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_ddr_control2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_ddr_control2`] module"]
601#[doc(alias = "MWMSG_DDR_CONTROL2")]
602pub type MwmsgDdrControl2 = crate::Reg<mwmsg_ddr_control2::MwmsgDdrControl2Spec>;
603#[doc = "Controller Write Message in DDR Mode Control 2"]
604pub mod mwmsg_ddr_control2;
605#[doc = "MWMSG_DDR_DATA (w) register accessor: Controller Write Message Data in DDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_ddr_data::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mwmsg_ddr_data`] module"]
606#[doc(alias = "MWMSG_DDR_DATA")]
607pub type MwmsgDdrData = crate::Reg<mwmsg_ddr_data::MwmsgDdrDataSpec>;
608#[doc = "Controller Write Message Data in DDR mode"]
609pub mod mwmsg_ddr_data;
610#[doc = "MRMSG_DDR (r) register accessor: Controller Read Message in DDR mode\n\nYou can [`read`](crate::Reg::read) this register and get [`mrmsg_ddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mrmsg_ddr`] module"]
611#[doc(alias = "MRMSG_DDR")]
612pub type MrmsgDdr = crate::Reg<mrmsg_ddr::MrmsgDdrSpec>;
613#[doc = "Controller Read Message in DDR mode"]
614pub mod mrmsg_ddr;
615#[doc = "MDYNADDR (rw) register accessor: Controller Dynamic Address\n\nYou can [`read`](crate::Reg::read) this register and get [`mdynaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mdynaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mdynaddr`] module"]
616#[doc(alias = "MDYNADDR")]
617pub type Mdynaddr = crate::Reg<mdynaddr::MdynaddrSpec>;
618#[doc = "Controller Dynamic Address"]
619pub mod mdynaddr;
620#[doc = "SMAPCTRL0 (r) register accessor: Map Feature Control 0\n\nYou can [`read`](crate::Reg::read) this register and get [`smapctrl0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smapctrl0`] module"]
621#[doc(alias = "SMAPCTRL0")]
622pub type Smapctrl0 = crate::Reg<smapctrl0::Smapctrl0Spec>;
623#[doc = "Map Feature Control 0"]
624pub mod smapctrl0;
625#[doc = "IBIEXT1 (rw) register accessor: Extended IBI Data 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ibiext1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibiext1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibiext1`] module"]
626#[doc(alias = "IBIEXT1")]
627pub type Ibiext1 = crate::Reg<ibiext1::Ibiext1Spec>;
628#[doc = "Extended IBI Data 1"]
629pub mod ibiext1;
630#[doc = "IBIEXT2 (rw) register accessor: Extended IBI Data 2\n\nYou can [`read`](crate::Reg::read) this register and get [`ibiext2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibiext2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibiext2`] module"]
631#[doc(alias = "IBIEXT2")]
632pub type Ibiext2 = crate::Reg<ibiext2::Ibiext2Spec>;
633#[doc = "Extended IBI Data 2"]
634pub mod ibiext2;
635#[doc = "SID (r) register accessor: Target Module ID\n\nYou can [`read`](crate::Reg::read) this register and get [`sid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sid`] module"]
636#[doc(alias = "SID")]
637pub type Sid = crate::Reg<sid::SidSpec>;
638#[doc = "Target Module ID"]
639pub mod sid;
mcxa_pac/i3c0.rs

mcxa_pac/
i3c0.rs
