1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 verid: Verid,
6 param: Param,
7 _reserved2: [u8; 0x38],
8 pdor: Pdor,
9 psor: Psor,
10 pcor: Pcor,
11 ptor: Ptor,
12 pdir: Pdir,
13 pddr: Pddr,
14 pidr: Pidr,
15 _reserved9: [u8; 0x04],
16 pdr: [Pdr; 32],
17 icr: [Icr; 32],
18 giclr: Giclr,
19 gichr: Gichr,
20 _reserved13: [u8; 0x18],
21 isfr0: Isfr0,
22}
23impl RegisterBlock {
24 #[doc = "0x00 - Version ID"]
25 #[inline(always)]
26 pub const fn verid(&self) -> &Verid {
27 &self.verid
28 }
29 #[doc = "0x04 - Parameter"]
30 #[inline(always)]
31 pub const fn param(&self) -> &Param {
32 &self.param
33 }
34 #[doc = "0x40 - Port Data Output"]
35 #[inline(always)]
36 pub const fn pdor(&self) -> &Pdor {
37 &self.pdor
38 }
39 #[doc = "0x44 - Port Set Output"]
40 #[inline(always)]
41 pub const fn psor(&self) -> &Psor {
42 &self.psor
43 }
44 #[doc = "0x48 - Port Clear Output"]
45 #[inline(always)]
46 pub const fn pcor(&self) -> &Pcor {
47 &self.pcor
48 }
49 #[doc = "0x4c - Port Toggle Output"]
50 #[inline(always)]
51 pub const fn ptor(&self) -> &Ptor {
52 &self.ptor
53 }
54 #[doc = "0x50 - Port Data Input"]
55 #[inline(always)]
56 pub const fn pdir(&self) -> &Pdir {
57 &self.pdir
58 }
59 #[doc = "0x54 - Port Data Direction"]
60 #[inline(always)]
61 pub const fn pddr(&self) -> &Pddr {
62 &self.pddr
63 }
64 #[doc = "0x58 - Port Input Disable"]
65 #[inline(always)]
66 pub const fn pidr(&self) -> &Pidr {
67 &self.pidr
68 }
69 #[doc = "0x60..0x80 - Pin Data"]
70 #[inline(always)]
71 pub const fn pdr(&self, n: usize) -> &Pdr {
72 &self.pdr[n]
73 }
74 #[doc = "Iterator for array of:"]
75 #[doc = "0x60..0x80 - Pin Data"]
76 #[inline(always)]
77 pub fn pdr_iter(&self) -> impl Iterator<Item = &Pdr> {
78 self.pdr.iter()
79 }
80 #[doc = "0x80..0x100 - Interrupt Control index"]
81 #[inline(always)]
82 pub const fn icr(&self, n: usize) -> &Icr {
83 &self.icr[n]
84 }
85 #[doc = "Iterator for array of:"]
86 #[doc = "0x80..0x100 - Interrupt Control index"]
87 #[inline(always)]
88 pub fn icr_iter(&self) -> impl Iterator<Item = &Icr> {
89 self.icr.iter()
90 }
91 #[doc = "0x100 - Global Interrupt Control Low"]
92 #[inline(always)]
93 pub const fn giclr(&self) -> &Giclr {
94 &self.giclr
95 }
96 #[doc = "0x104 - Global Interrupt Control High"]
97 #[inline(always)]
98 pub const fn gichr(&self) -> &Gichr {
99 &self.gichr
100 }
101 #[doc = "0x120 - Interrupt Status Flag"]
102 #[inline(always)]
103 pub const fn isfr0(&self) -> &Isfr0 {
104 &self.isfr0
105 }
106}
107#[doc = "VERID (r) register accessor: Version ID\n\nYou can [`read`](crate::Reg::read) this register and get [`verid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@verid`] module"]
108#[doc(alias = "VERID")]
109pub type Verid = crate::Reg<verid::VeridSpec>;
110#[doc = "Version ID"]
111pub mod verid;
112#[doc = "PARAM (r) register accessor: Parameter\n\nYou can [`read`](crate::Reg::read) this register and get [`param::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@param`] module"]
113#[doc(alias = "PARAM")]
114pub type Param = crate::Reg<param::ParamSpec>;
115#[doc = "Parameter"]
116pub mod param;
117#[doc = "PDOR (rw) register accessor: Port Data Output\n\nYou can [`read`](crate::Reg::read) this register and get [`pdor::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdor::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdor`] module"]
118#[doc(alias = "PDOR")]
119pub type Pdor = crate::Reg<pdor::PdorSpec>;
120#[doc = "Port Data Output"]
121pub mod pdor;
122#[doc = "PSOR (rw) register accessor: Port Set Output\n\nYou can [`read`](crate::Reg::read) this register and get [`psor::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psor::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psor`] module"]
123#[doc(alias = "PSOR")]
124pub type Psor = crate::Reg<psor::PsorSpec>;
125#[doc = "Port Set Output"]
126pub mod psor;
127#[doc = "PCOR (rw) register accessor: Port Clear Output\n\nYou can [`read`](crate::Reg::read) this register and get [`pcor::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcor::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcor`] module"]
128#[doc(alias = "PCOR")]
129pub type Pcor = crate::Reg<pcor::PcorSpec>;
130#[doc = "Port Clear Output"]
131pub mod pcor;
132#[doc = "PTOR (rw) register accessor: Port Toggle Output\n\nYou can [`read`](crate::Reg::read) this register and get [`ptor::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ptor::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ptor`] module"]
133#[doc(alias = "PTOR")]
134pub type Ptor = crate::Reg<ptor::PtorSpec>;
135#[doc = "Port Toggle Output"]
136pub mod ptor;
137#[doc = "PDIR (r) register accessor: Port Data Input\n\nYou can [`read`](crate::Reg::read) this register and get [`pdir::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdir`] module"]
138#[doc(alias = "PDIR")]
139pub type Pdir = crate::Reg<pdir::PdirSpec>;
140#[doc = "Port Data Input"]
141pub mod pdir;
142#[doc = "PDDR (rw) register accessor: Port Data Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`pddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pddr`] module"]
143#[doc(alias = "PDDR")]
144pub type Pddr = crate::Reg<pddr::PddrSpec>;
145#[doc = "Port Data Direction"]
146pub mod pddr;
147#[doc = "PIDR (rw) register accessor: Port Input Disable\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pidr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr`] module"]
148#[doc(alias = "PIDR")]
149pub type Pidr = crate::Reg<pidr::PidrSpec>;
150#[doc = "Port Input Disable"]
151pub mod pidr;
152#[doc = "PDR (rw) register accessor: Pin Data\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr`] module"]
153#[doc(alias = "PDR")]
154pub type Pdr = crate::Reg<pdr::PdrSpec>;
155#[doc = "Pin Data"]
156pub mod pdr;
157#[doc = "ICR (rw) register accessor: Interrupt Control index\n\nYou can [`read`](crate::Reg::read) this register and get [`icr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icr`] module"]
158#[doc(alias = "ICR")]
159pub type Icr = crate::Reg<icr::IcrSpec>;
160#[doc = "Interrupt Control index"]
161pub mod icr;
162#[doc = "GICLR (rw) register accessor: Global Interrupt Control Low\n\nYou can [`read`](crate::Reg::read) this register and get [`giclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`giclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@giclr`] module"]
163#[doc(alias = "GICLR")]
164pub type Giclr = crate::Reg<giclr::GiclrSpec>;
165#[doc = "Global Interrupt Control Low"]
166pub mod giclr;
167#[doc = "GICHR (rw) register accessor: Global Interrupt Control High\n\nYou can [`read`](crate::Reg::read) this register and get [`gichr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gichr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gichr`] module"]
168#[doc(alias = "GICHR")]
169pub type Gichr = crate::Reg<gichr::GichrSpec>;
170#[doc = "Global Interrupt Control High"]
171pub mod gichr;
172#[doc = "ISFR0 (rw) register accessor: Interrupt Status Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`isfr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`isfr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isfr0`] module"]
173#[doc(alias = "ISFR0")]
174pub type Isfr0 = crate::Reg<isfr0::Isfr0Spec>;
175#[doc = "Interrupt Status Flag"]
176pub mod isfr0;