1#[repr(C)]
2#[cfg_attr(feature = "debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 sm0cnt: Sm0cnt,
6 sm0init: Sm0init,
7 sm0ctrl2: Sm0ctrl2,
8 sm0ctrl: Sm0ctrl,
9 _reserved4: [u8; 0x02],
10 sm0val0: Sm0val0,
11 _reserved5: [u8; 0x02],
12 sm0val1: Sm0val1,
13 _reserved6: [u8; 0x02],
14 sm0val2: Sm0val2,
15 _reserved7: [u8; 0x02],
16 sm0val3: Sm0val3,
17 _reserved8: [u8; 0x02],
18 sm0val4: Sm0val4,
19 _reserved9: [u8; 0x02],
20 sm0val5: Sm0val5,
21 _reserved10: [u8; 0x02],
22 sm0octrl: Sm0octrl,
23 sm0sts: Sm0sts,
24 sm0inten: Sm0inten,
25 sm0dmaen: Sm0dmaen,
26 sm0tctrl: Sm0tctrl,
27 sm0dismap0: Sm0dismap0,
28 _reserved16: [u8; 0x02],
29 sm0dtcnt0: Sm0dtcnt0,
30 sm0dtcnt1: Sm0dtcnt1,
31 _reserved18: [u8; 0x08],
32 sm0captctrlx: Sm0captctrlx,
33 sm0captcompx: Sm0captcompx,
34 sm0cval0: Sm0cval0,
35 sm0cval0cyc: Sm0cval0cyc,
36 sm0cval1: Sm0cval1,
37 sm0cval1cyc: Sm0cval1cyc,
38 _reserved24: [u8; 0x16],
39 sm0captfiltx: Sm0captfiltx,
40 sm1cnt: Sm1cnt,
41 sm1init: Sm1init,
42 sm1ctrl2: Sm1ctrl2,
43 sm1ctrl: Sm1ctrl,
44 _reserved29: [u8; 0x02],
45 sm1val0: Sm1val0,
46 _reserved30: [u8; 0x02],
47 sm1val1: Sm1val1,
48 _reserved31: [u8; 0x02],
49 sm1val2: Sm1val2,
50 _reserved32: [u8; 0x02],
51 sm1val3: Sm1val3,
52 _reserved33: [u8; 0x02],
53 sm1val4: Sm1val4,
54 _reserved34: [u8; 0x02],
55 sm1val5: Sm1val5,
56 _reserved35: [u8; 0x02],
57 sm1octrl: Sm1octrl,
58 sm1sts: Sm1sts,
59 sm1inten: Sm1inten,
60 sm1dmaen: Sm1dmaen,
61 sm1tctrl: Sm1tctrl,
62 sm1dismap0: Sm1dismap0,
63 _reserved41: [u8; 0x02],
64 sm1dtcnt0: Sm1dtcnt0,
65 sm1dtcnt1: Sm1dtcnt1,
66 _reserved43: [u8; 0x08],
67 sm1captctrlx: Sm1captctrlx,
68 sm1captcompx: Sm1captcompx,
69 sm1cval0: Sm1cval0,
70 sm1cval0cyc: Sm1cval0cyc,
71 sm1cval1: Sm1cval1,
72 sm1cval1cyc: Sm1cval1cyc,
73 _reserved49: [u8; 0x10],
74 sm1phasedly: Sm1phasedly,
75 _reserved50: [u8; 0x04],
76 sm1captfiltx: Sm1captfiltx,
77 sm2cnt: Sm2cnt,
78 sm2init: Sm2init,
79 sm2ctrl2: Sm2ctrl2,
80 sm2ctrl: Sm2ctrl,
81 _reserved55: [u8; 0x02],
82 sm2val0: Sm2val0,
83 _reserved56: [u8; 0x02],
84 sm2val1: Sm2val1,
85 _reserved57: [u8; 0x02],
86 sm2val2: Sm2val2,
87 _reserved58: [u8; 0x02],
88 sm2val3: Sm2val3,
89 _reserved59: [u8; 0x02],
90 sm2val4: Sm2val4,
91 _reserved60: [u8; 0x02],
92 sm2val5: Sm2val5,
93 _reserved61: [u8; 0x02],
94 sm2octrl: Sm2octrl,
95 sm2sts: Sm2sts,
96 sm2inten: Sm2inten,
97 sm2dmaen: Sm2dmaen,
98 sm2tctrl: Sm2tctrl,
99 sm2dismap0: Sm2dismap0,
100 _reserved67: [u8; 0x02],
101 sm2dtcnt0: Sm2dtcnt0,
102 sm2dtcnt1: Sm2dtcnt1,
103 _reserved69: [u8; 0x08],
104 sm2captctrlx: Sm2captctrlx,
105 sm2captcompx: Sm2captcompx,
106 sm2cval0: Sm2cval0,
107 sm2cval0cyc: Sm2cval0cyc,
108 sm2cval1: Sm2cval1,
109 sm2cval1cyc: Sm2cval1cyc,
110 _reserved75: [u8; 0x10],
111 sm2phasedly: Sm2phasedly,
112 _reserved76: [u8; 0x04],
113 sm2captfiltx: Sm2captfiltx,
114 sm3cnt: Sm3cnt,
115 sm3init: Sm3init,
116 sm3ctrl2: Sm3ctrl2,
117 sm3ctrl: Sm3ctrl,
118 _reserved81: [u8; 0x02],
119 sm3val0: Sm3val0,
120 _reserved82: [u8; 0x02],
121 sm3val1: Sm3val1,
122 _reserved83: [u8; 0x02],
123 sm3val2: Sm3val2,
124 _reserved84: [u8; 0x02],
125 sm3val3: Sm3val3,
126 _reserved85: [u8; 0x02],
127 sm3val4: Sm3val4,
128 _reserved86: [u8; 0x02],
129 sm3val5: Sm3val5,
130 _reserved87: [u8; 0x02],
131 sm3octrl: Sm3octrl,
132 sm3sts: Sm3sts,
133 sm3inten: Sm3inten,
134 sm3dmaen: Sm3dmaen,
135 sm3tctrl: Sm3tctrl,
136 sm3dismap0: Sm3dismap0,
137 _reserved93: [u8; 0x02],
138 sm3dtcnt0: Sm3dtcnt0,
139 sm3dtcnt1: Sm3dtcnt1,
140 _reserved95: [u8; 0x08],
141 sm3captctrlx: Sm3captctrlx,
142 sm3captcompx: Sm3captcompx,
143 sm3cval0: Sm3cval0,
144 sm3cval0cyc: Sm3cval0cyc,
145 sm3cval1: Sm3cval1,
146 sm3cval1cyc: Sm3cval1cyc,
147 _reserved101: [u8; 0x10],
148 sm3phasedly: Sm3phasedly,
149 _reserved102: [u8; 0x04],
150 sm3captfiltx: Sm3captfiltx,
151 outen: Outen,
152 mask: Mask,
153 swcout: Swcout,
154 dtsrcsel: Dtsrcsel,
155 mctrl: Mctrl,
156 mctrl2: Mctrl2,
157 fctrl0: Fctrl0,
158 fsts0: Fsts0,
159 ffilt0: Ffilt0,
160 ftst0: Ftst0,
161 fctrl20: Fctrl20,
162}
163impl RegisterBlock {
164 #[doc = "0x00 - Counter Register"]
165 #[inline(always)]
166 pub const fn sm0cnt(&self) -> &Sm0cnt {
167 &self.sm0cnt
168 }
169 #[doc = "0x02 - Initial Count Register"]
170 #[inline(always)]
171 pub const fn sm0init(&self) -> &Sm0init {
172 &self.sm0init
173 }
174 #[doc = "0x04 - Control 2 Register"]
175 #[inline(always)]
176 pub const fn sm0ctrl2(&self) -> &Sm0ctrl2 {
177 &self.sm0ctrl2
178 }
179 #[doc = "0x06 - Control Register"]
180 #[inline(always)]
181 pub const fn sm0ctrl(&self) -> &Sm0ctrl {
182 &self.sm0ctrl
183 }
184 #[doc = "0x0a - Value Register 0"]
185 #[inline(always)]
186 pub const fn sm0val0(&self) -> &Sm0val0 {
187 &self.sm0val0
188 }
189 #[doc = "0x0e - Value Register 1"]
190 #[inline(always)]
191 pub const fn sm0val1(&self) -> &Sm0val1 {
192 &self.sm0val1
193 }
194 #[doc = "0x12 - Value Register 2"]
195 #[inline(always)]
196 pub const fn sm0val2(&self) -> &Sm0val2 {
197 &self.sm0val2
198 }
199 #[doc = "0x16 - Value Register 3"]
200 #[inline(always)]
201 pub const fn sm0val3(&self) -> &Sm0val3 {
202 &self.sm0val3
203 }
204 #[doc = "0x1a - Value Register 4"]
205 #[inline(always)]
206 pub const fn sm0val4(&self) -> &Sm0val4 {
207 &self.sm0val4
208 }
209 #[doc = "0x1e - Value Register 5"]
210 #[inline(always)]
211 pub const fn sm0val5(&self) -> &Sm0val5 {
212 &self.sm0val5
213 }
214 #[doc = "0x22 - Output Control Register"]
215 #[inline(always)]
216 pub const fn sm0octrl(&self) -> &Sm0octrl {
217 &self.sm0octrl
218 }
219 #[doc = "0x24 - Status Register"]
220 #[inline(always)]
221 pub const fn sm0sts(&self) -> &Sm0sts {
222 &self.sm0sts
223 }
224 #[doc = "0x26 - Interrupt Enable Register"]
225 #[inline(always)]
226 pub const fn sm0inten(&self) -> &Sm0inten {
227 &self.sm0inten
228 }
229 #[doc = "0x28 - DMA Enable Register"]
230 #[inline(always)]
231 pub const fn sm0dmaen(&self) -> &Sm0dmaen {
232 &self.sm0dmaen
233 }
234 #[doc = "0x2a - Output Trigger Control Register"]
235 #[inline(always)]
236 pub const fn sm0tctrl(&self) -> &Sm0tctrl {
237 &self.sm0tctrl
238 }
239 #[doc = "0x2c - Fault Disable Mapping Register 0"]
240 #[inline(always)]
241 pub const fn sm0dismap0(&self) -> &Sm0dismap0 {
242 &self.sm0dismap0
243 }
244 #[doc = "0x30 - Deadtime Count Register 0"]
245 #[inline(always)]
246 pub const fn sm0dtcnt0(&self) -> &Sm0dtcnt0 {
247 &self.sm0dtcnt0
248 }
249 #[doc = "0x32 - Deadtime Count Register 1"]
250 #[inline(always)]
251 pub const fn sm0dtcnt1(&self) -> &Sm0dtcnt1 {
252 &self.sm0dtcnt1
253 }
254 #[doc = "0x3c - Capture Control X Register"]
255 #[inline(always)]
256 pub const fn sm0captctrlx(&self) -> &Sm0captctrlx {
257 &self.sm0captctrlx
258 }
259 #[doc = "0x3e - Capture Compare X Register"]
260 #[inline(always)]
261 pub const fn sm0captcompx(&self) -> &Sm0captcompx {
262 &self.sm0captcompx
263 }
264 #[doc = "0x40 - Capture Value 0 Register"]
265 #[inline(always)]
266 pub const fn sm0cval0(&self) -> &Sm0cval0 {
267 &self.sm0cval0
268 }
269 #[doc = "0x42 - Capture Value 0 Cycle Register"]
270 #[inline(always)]
271 pub const fn sm0cval0cyc(&self) -> &Sm0cval0cyc {
272 &self.sm0cval0cyc
273 }
274 #[doc = "0x44 - Capture Value 1 Register"]
275 #[inline(always)]
276 pub const fn sm0cval1(&self) -> &Sm0cval1 {
277 &self.sm0cval1
278 }
279 #[doc = "0x46 - Capture Value 1 Cycle Register"]
280 #[inline(always)]
281 pub const fn sm0cval1cyc(&self) -> &Sm0cval1cyc {
282 &self.sm0cval1cyc
283 }
284 #[doc = "0x5e - Capture PWM_X Input Filter Register"]
285 #[inline(always)]
286 pub const fn sm0captfiltx(&self) -> &Sm0captfiltx {
287 &self.sm0captfiltx
288 }
289 #[doc = "0x60 - Counter Register"]
290 #[inline(always)]
291 pub const fn sm1cnt(&self) -> &Sm1cnt {
292 &self.sm1cnt
293 }
294 #[doc = "0x62 - Initial Count Register"]
295 #[inline(always)]
296 pub const fn sm1init(&self) -> &Sm1init {
297 &self.sm1init
298 }
299 #[doc = "0x64 - Control 2 Register"]
300 #[inline(always)]
301 pub const fn sm1ctrl2(&self) -> &Sm1ctrl2 {
302 &self.sm1ctrl2
303 }
304 #[doc = "0x66 - Control Register"]
305 #[inline(always)]
306 pub const fn sm1ctrl(&self) -> &Sm1ctrl {
307 &self.sm1ctrl
308 }
309 #[doc = "0x6a - Value Register 0"]
310 #[inline(always)]
311 pub const fn sm1val0(&self) -> &Sm1val0 {
312 &self.sm1val0
313 }
314 #[doc = "0x6e - Value Register 1"]
315 #[inline(always)]
316 pub const fn sm1val1(&self) -> &Sm1val1 {
317 &self.sm1val1
318 }
319 #[doc = "0x72 - Value Register 2"]
320 #[inline(always)]
321 pub const fn sm1val2(&self) -> &Sm1val2 {
322 &self.sm1val2
323 }
324 #[doc = "0x76 - Value Register 3"]
325 #[inline(always)]
326 pub const fn sm1val3(&self) -> &Sm1val3 {
327 &self.sm1val3
328 }
329 #[doc = "0x7a - Value Register 4"]
330 #[inline(always)]
331 pub const fn sm1val4(&self) -> &Sm1val4 {
332 &self.sm1val4
333 }
334 #[doc = "0x7e - Value Register 5"]
335 #[inline(always)]
336 pub const fn sm1val5(&self) -> &Sm1val5 {
337 &self.sm1val5
338 }
339 #[doc = "0x82 - Output Control Register"]
340 #[inline(always)]
341 pub const fn sm1octrl(&self) -> &Sm1octrl {
342 &self.sm1octrl
343 }
344 #[doc = "0x84 - Status Register"]
345 #[inline(always)]
346 pub const fn sm1sts(&self) -> &Sm1sts {
347 &self.sm1sts
348 }
349 #[doc = "0x86 - Interrupt Enable Register"]
350 #[inline(always)]
351 pub const fn sm1inten(&self) -> &Sm1inten {
352 &self.sm1inten
353 }
354 #[doc = "0x88 - DMA Enable Register"]
355 #[inline(always)]
356 pub const fn sm1dmaen(&self) -> &Sm1dmaen {
357 &self.sm1dmaen
358 }
359 #[doc = "0x8a - Output Trigger Control Register"]
360 #[inline(always)]
361 pub const fn sm1tctrl(&self) -> &Sm1tctrl {
362 &self.sm1tctrl
363 }
364 #[doc = "0x8c - Fault Disable Mapping Register 0"]
365 #[inline(always)]
366 pub const fn sm1dismap0(&self) -> &Sm1dismap0 {
367 &self.sm1dismap0
368 }
369 #[doc = "0x90 - Deadtime Count Register 0"]
370 #[inline(always)]
371 pub const fn sm1dtcnt0(&self) -> &Sm1dtcnt0 {
372 &self.sm1dtcnt0
373 }
374 #[doc = "0x92 - Deadtime Count Register 1"]
375 #[inline(always)]
376 pub const fn sm1dtcnt1(&self) -> &Sm1dtcnt1 {
377 &self.sm1dtcnt1
378 }
379 #[doc = "0x9c - Capture Control X Register"]
380 #[inline(always)]
381 pub const fn sm1captctrlx(&self) -> &Sm1captctrlx {
382 &self.sm1captctrlx
383 }
384 #[doc = "0x9e - Capture Compare X Register"]
385 #[inline(always)]
386 pub const fn sm1captcompx(&self) -> &Sm1captcompx {
387 &self.sm1captcompx
388 }
389 #[doc = "0xa0 - Capture Value 0 Register"]
390 #[inline(always)]
391 pub const fn sm1cval0(&self) -> &Sm1cval0 {
392 &self.sm1cval0
393 }
394 #[doc = "0xa2 - Capture Value 0 Cycle Register"]
395 #[inline(always)]
396 pub const fn sm1cval0cyc(&self) -> &Sm1cval0cyc {
397 &self.sm1cval0cyc
398 }
399 #[doc = "0xa4 - Capture Value 1 Register"]
400 #[inline(always)]
401 pub const fn sm1cval1(&self) -> &Sm1cval1 {
402 &self.sm1cval1
403 }
404 #[doc = "0xa6 - Capture Value 1 Cycle Register"]
405 #[inline(always)]
406 pub const fn sm1cval1cyc(&self) -> &Sm1cval1cyc {
407 &self.sm1cval1cyc
408 }
409 #[doc = "0xb8 - Phase Delay Register"]
410 #[inline(always)]
411 pub const fn sm1phasedly(&self) -> &Sm1phasedly {
412 &self.sm1phasedly
413 }
414 #[doc = "0xbe - Capture PWM_X Input Filter Register"]
415 #[inline(always)]
416 pub const fn sm1captfiltx(&self) -> &Sm1captfiltx {
417 &self.sm1captfiltx
418 }
419 #[doc = "0xc0 - Counter Register"]
420 #[inline(always)]
421 pub const fn sm2cnt(&self) -> &Sm2cnt {
422 &self.sm2cnt
423 }
424 #[doc = "0xc2 - Initial Count Register"]
425 #[inline(always)]
426 pub const fn sm2init(&self) -> &Sm2init {
427 &self.sm2init
428 }
429 #[doc = "0xc4 - Control 2 Register"]
430 #[inline(always)]
431 pub const fn sm2ctrl2(&self) -> &Sm2ctrl2 {
432 &self.sm2ctrl2
433 }
434 #[doc = "0xc6 - Control Register"]
435 #[inline(always)]
436 pub const fn sm2ctrl(&self) -> &Sm2ctrl {
437 &self.sm2ctrl
438 }
439 #[doc = "0xca - Value Register 0"]
440 #[inline(always)]
441 pub const fn sm2val0(&self) -> &Sm2val0 {
442 &self.sm2val0
443 }
444 #[doc = "0xce - Value Register 1"]
445 #[inline(always)]
446 pub const fn sm2val1(&self) -> &Sm2val1 {
447 &self.sm2val1
448 }
449 #[doc = "0xd2 - Value Register 2"]
450 #[inline(always)]
451 pub const fn sm2val2(&self) -> &Sm2val2 {
452 &self.sm2val2
453 }
454 #[doc = "0xd6 - Value Register 3"]
455 #[inline(always)]
456 pub const fn sm2val3(&self) -> &Sm2val3 {
457 &self.sm2val3
458 }
459 #[doc = "0xda - Value Register 4"]
460 #[inline(always)]
461 pub const fn sm2val4(&self) -> &Sm2val4 {
462 &self.sm2val4
463 }
464 #[doc = "0xde - Value Register 5"]
465 #[inline(always)]
466 pub const fn sm2val5(&self) -> &Sm2val5 {
467 &self.sm2val5
468 }
469 #[doc = "0xe2 - Output Control Register"]
470 #[inline(always)]
471 pub const fn sm2octrl(&self) -> &Sm2octrl {
472 &self.sm2octrl
473 }
474 #[doc = "0xe4 - Status Register"]
475 #[inline(always)]
476 pub const fn sm2sts(&self) -> &Sm2sts {
477 &self.sm2sts
478 }
479 #[doc = "0xe6 - Interrupt Enable Register"]
480 #[inline(always)]
481 pub const fn sm2inten(&self) -> &Sm2inten {
482 &self.sm2inten
483 }
484 #[doc = "0xe8 - DMA Enable Register"]
485 #[inline(always)]
486 pub const fn sm2dmaen(&self) -> &Sm2dmaen {
487 &self.sm2dmaen
488 }
489 #[doc = "0xea - Output Trigger Control Register"]
490 #[inline(always)]
491 pub const fn sm2tctrl(&self) -> &Sm2tctrl {
492 &self.sm2tctrl
493 }
494 #[doc = "0xec - Fault Disable Mapping Register 0"]
495 #[inline(always)]
496 pub const fn sm2dismap0(&self) -> &Sm2dismap0 {
497 &self.sm2dismap0
498 }
499 #[doc = "0xf0 - Deadtime Count Register 0"]
500 #[inline(always)]
501 pub const fn sm2dtcnt0(&self) -> &Sm2dtcnt0 {
502 &self.sm2dtcnt0
503 }
504 #[doc = "0xf2 - Deadtime Count Register 1"]
505 #[inline(always)]
506 pub const fn sm2dtcnt1(&self) -> &Sm2dtcnt1 {
507 &self.sm2dtcnt1
508 }
509 #[doc = "0xfc - Capture Control X Register"]
510 #[inline(always)]
511 pub const fn sm2captctrlx(&self) -> &Sm2captctrlx {
512 &self.sm2captctrlx
513 }
514 #[doc = "0xfe - Capture Compare X Register"]
515 #[inline(always)]
516 pub const fn sm2captcompx(&self) -> &Sm2captcompx {
517 &self.sm2captcompx
518 }
519 #[doc = "0x100 - Capture Value 0 Register"]
520 #[inline(always)]
521 pub const fn sm2cval0(&self) -> &Sm2cval0 {
522 &self.sm2cval0
523 }
524 #[doc = "0x102 - Capture Value 0 Cycle Register"]
525 #[inline(always)]
526 pub const fn sm2cval0cyc(&self) -> &Sm2cval0cyc {
527 &self.sm2cval0cyc
528 }
529 #[doc = "0x104 - Capture Value 1 Register"]
530 #[inline(always)]
531 pub const fn sm2cval1(&self) -> &Sm2cval1 {
532 &self.sm2cval1
533 }
534 #[doc = "0x106 - Capture Value 1 Cycle Register"]
535 #[inline(always)]
536 pub const fn sm2cval1cyc(&self) -> &Sm2cval1cyc {
537 &self.sm2cval1cyc
538 }
539 #[doc = "0x118 - Phase Delay Register"]
540 #[inline(always)]
541 pub const fn sm2phasedly(&self) -> &Sm2phasedly {
542 &self.sm2phasedly
543 }
544 #[doc = "0x11e - Capture PWM_X Input Filter Register"]
545 #[inline(always)]
546 pub const fn sm2captfiltx(&self) -> &Sm2captfiltx {
547 &self.sm2captfiltx
548 }
549 #[doc = "0x120 - Counter Register"]
550 #[inline(always)]
551 pub const fn sm3cnt(&self) -> &Sm3cnt {
552 &self.sm3cnt
553 }
554 #[doc = "0x122 - Initial Count Register"]
555 #[inline(always)]
556 pub const fn sm3init(&self) -> &Sm3init {
557 &self.sm3init
558 }
559 #[doc = "0x124 - Control 2 Register"]
560 #[inline(always)]
561 pub const fn sm3ctrl2(&self) -> &Sm3ctrl2 {
562 &self.sm3ctrl2
563 }
564 #[doc = "0x126 - Control Register"]
565 #[inline(always)]
566 pub const fn sm3ctrl(&self) -> &Sm3ctrl {
567 &self.sm3ctrl
568 }
569 #[doc = "0x12a - Value Register 0"]
570 #[inline(always)]
571 pub const fn sm3val0(&self) -> &Sm3val0 {
572 &self.sm3val0
573 }
574 #[doc = "0x12e - Value Register 1"]
575 #[inline(always)]
576 pub const fn sm3val1(&self) -> &Sm3val1 {
577 &self.sm3val1
578 }
579 #[doc = "0x132 - Value Register 2"]
580 #[inline(always)]
581 pub const fn sm3val2(&self) -> &Sm3val2 {
582 &self.sm3val2
583 }
584 #[doc = "0x136 - Value Register 3"]
585 #[inline(always)]
586 pub const fn sm3val3(&self) -> &Sm3val3 {
587 &self.sm3val3
588 }
589 #[doc = "0x13a - Value Register 4"]
590 #[inline(always)]
591 pub const fn sm3val4(&self) -> &Sm3val4 {
592 &self.sm3val4
593 }
594 #[doc = "0x13e - Value Register 5"]
595 #[inline(always)]
596 pub const fn sm3val5(&self) -> &Sm3val5 {
597 &self.sm3val5
598 }
599 #[doc = "0x142 - Output Control Register"]
600 #[inline(always)]
601 pub const fn sm3octrl(&self) -> &Sm3octrl {
602 &self.sm3octrl
603 }
604 #[doc = "0x144 - Status Register"]
605 #[inline(always)]
606 pub const fn sm3sts(&self) -> &Sm3sts {
607 &self.sm3sts
608 }
609 #[doc = "0x146 - Interrupt Enable Register"]
610 #[inline(always)]
611 pub const fn sm3inten(&self) -> &Sm3inten {
612 &self.sm3inten
613 }
614 #[doc = "0x148 - DMA Enable Register"]
615 #[inline(always)]
616 pub const fn sm3dmaen(&self) -> &Sm3dmaen {
617 &self.sm3dmaen
618 }
619 #[doc = "0x14a - Output Trigger Control Register"]
620 #[inline(always)]
621 pub const fn sm3tctrl(&self) -> &Sm3tctrl {
622 &self.sm3tctrl
623 }
624 #[doc = "0x14c - Fault Disable Mapping Register 0"]
625 #[inline(always)]
626 pub const fn sm3dismap0(&self) -> &Sm3dismap0 {
627 &self.sm3dismap0
628 }
629 #[doc = "0x150 - Deadtime Count Register 0"]
630 #[inline(always)]
631 pub const fn sm3dtcnt0(&self) -> &Sm3dtcnt0 {
632 &self.sm3dtcnt0
633 }
634 #[doc = "0x152 - Deadtime Count Register 1"]
635 #[inline(always)]
636 pub const fn sm3dtcnt1(&self) -> &Sm3dtcnt1 {
637 &self.sm3dtcnt1
638 }
639 #[doc = "0x15c - Capture Control X Register"]
640 #[inline(always)]
641 pub const fn sm3captctrlx(&self) -> &Sm3captctrlx {
642 &self.sm3captctrlx
643 }
644 #[doc = "0x15e - Capture Compare X Register"]
645 #[inline(always)]
646 pub const fn sm3captcompx(&self) -> &Sm3captcompx {
647 &self.sm3captcompx
648 }
649 #[doc = "0x160 - Capture Value 0 Register"]
650 #[inline(always)]
651 pub const fn sm3cval0(&self) -> &Sm3cval0 {
652 &self.sm3cval0
653 }
654 #[doc = "0x162 - Capture Value 0 Cycle Register"]
655 #[inline(always)]
656 pub const fn sm3cval0cyc(&self) -> &Sm3cval0cyc {
657 &self.sm3cval0cyc
658 }
659 #[doc = "0x164 - Capture Value 1 Register"]
660 #[inline(always)]
661 pub const fn sm3cval1(&self) -> &Sm3cval1 {
662 &self.sm3cval1
663 }
664 #[doc = "0x166 - Capture Value 1 Cycle Register"]
665 #[inline(always)]
666 pub const fn sm3cval1cyc(&self) -> &Sm3cval1cyc {
667 &self.sm3cval1cyc
668 }
669 #[doc = "0x178 - Phase Delay Register"]
670 #[inline(always)]
671 pub const fn sm3phasedly(&self) -> &Sm3phasedly {
672 &self.sm3phasedly
673 }
674 #[doc = "0x17e - Capture PWM_X Input Filter Register"]
675 #[inline(always)]
676 pub const fn sm3captfiltx(&self) -> &Sm3captfiltx {
677 &self.sm3captfiltx
678 }
679 #[doc = "0x180 - Output Enable Register"]
680 #[inline(always)]
681 pub const fn outen(&self) -> &Outen {
682 &self.outen
683 }
684 #[doc = "0x182 - Mask Register"]
685 #[inline(always)]
686 pub const fn mask(&self) -> &Mask {
687 &self.mask
688 }
689 #[doc = "0x184 - Software Controlled Output Register"]
690 #[inline(always)]
691 pub const fn swcout(&self) -> &Swcout {
692 &self.swcout
693 }
694 #[doc = "0x186 - PWM Source Select Register"]
695 #[inline(always)]
696 pub const fn dtsrcsel(&self) -> &Dtsrcsel {
697 &self.dtsrcsel
698 }
699 #[doc = "0x188 - Master Control Register"]
700 #[inline(always)]
701 pub const fn mctrl(&self) -> &Mctrl {
702 &self.mctrl
703 }
704 #[doc = "0x18a - Master Control 2 Register"]
705 #[inline(always)]
706 pub const fn mctrl2(&self) -> &Mctrl2 {
707 &self.mctrl2
708 }
709 #[doc = "0x18c - Fault Control Register"]
710 #[inline(always)]
711 pub const fn fctrl0(&self) -> &Fctrl0 {
712 &self.fctrl0
713 }
714 #[doc = "0x18e - Fault Status Register"]
715 #[inline(always)]
716 pub const fn fsts0(&self) -> &Fsts0 {
717 &self.fsts0
718 }
719 #[doc = "0x190 - Fault Filter Register"]
720 #[inline(always)]
721 pub const fn ffilt0(&self) -> &Ffilt0 {
722 &self.ffilt0
723 }
724 #[doc = "0x192 - Fault Test Register"]
725 #[inline(always)]
726 pub const fn ftst0(&self) -> &Ftst0 {
727 &self.ftst0
728 }
729 #[doc = "0x194 - Fault Control 2 Register"]
730 #[inline(always)]
731 pub const fn fctrl20(&self) -> &Fctrl20 {
732 &self.fctrl20
733 }
734}
735#[doc = "SM0CNT (r) register accessor: Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0cnt`] module"]
736#[doc(alias = "SM0CNT")]
737pub type Sm0cnt = crate::Reg<sm0cnt::Sm0cntSpec>;
738#[doc = "Counter Register"]
739pub mod sm0cnt;
740#[doc = "SM0INIT (rw) register accessor: Initial Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0init::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0init::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0init`] module"]
741#[doc(alias = "SM0INIT")]
742pub type Sm0init = crate::Reg<sm0init::Sm0initSpec>;
743#[doc = "Initial Count Register"]
744pub mod sm0init;
745#[doc = "SM0CTRL2 (rw) register accessor: Control 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0ctrl2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0ctrl2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0ctrl2`] module"]
746#[doc(alias = "SM0CTRL2")]
747pub type Sm0ctrl2 = crate::Reg<sm0ctrl2::Sm0ctrl2Spec>;
748#[doc = "Control 2 Register"]
749pub mod sm0ctrl2;
750#[doc = "SM0CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0ctrl`] module"]
751#[doc(alias = "SM0CTRL")]
752pub type Sm0ctrl = crate::Reg<sm0ctrl::Sm0ctrlSpec>;
753#[doc = "Control Register"]
754pub mod sm0ctrl;
755#[doc = "SM0VAL0 (rw) register accessor: Value Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0val0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0val0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0val0`] module"]
756#[doc(alias = "SM0VAL0")]
757pub type Sm0val0 = crate::Reg<sm0val0::Sm0val0Spec>;
758#[doc = "Value Register 0"]
759pub mod sm0val0;
760#[doc = "SM0VAL1 (rw) register accessor: Value Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0val1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0val1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0val1`] module"]
761#[doc(alias = "SM0VAL1")]
762pub type Sm0val1 = crate::Reg<sm0val1::Sm0val1Spec>;
763#[doc = "Value Register 1"]
764pub mod sm0val1;
765#[doc = "SM0VAL2 (rw) register accessor: Value Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0val2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0val2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0val2`] module"]
766#[doc(alias = "SM0VAL2")]
767pub type Sm0val2 = crate::Reg<sm0val2::Sm0val2Spec>;
768#[doc = "Value Register 2"]
769pub mod sm0val2;
770#[doc = "SM0VAL3 (rw) register accessor: Value Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0val3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0val3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0val3`] module"]
771#[doc(alias = "SM0VAL3")]
772pub type Sm0val3 = crate::Reg<sm0val3::Sm0val3Spec>;
773#[doc = "Value Register 3"]
774pub mod sm0val3;
775#[doc = "SM0VAL4 (rw) register accessor: Value Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0val4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0val4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0val4`] module"]
776#[doc(alias = "SM0VAL4")]
777pub type Sm0val4 = crate::Reg<sm0val4::Sm0val4Spec>;
778#[doc = "Value Register 4"]
779pub mod sm0val4;
780#[doc = "SM0VAL5 (rw) register accessor: Value Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0val5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0val5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0val5`] module"]
781#[doc(alias = "SM0VAL5")]
782pub type Sm0val5 = crate::Reg<sm0val5::Sm0val5Spec>;
783#[doc = "Value Register 5"]
784pub mod sm0val5;
785#[doc = "SM0OCTRL (rw) register accessor: Output Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0octrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0octrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0octrl`] module"]
786#[doc(alias = "SM0OCTRL")]
787pub type Sm0octrl = crate::Reg<sm0octrl::Sm0octrlSpec>;
788#[doc = "Output Control Register"]
789pub mod sm0octrl;
790#[doc = "SM0STS (rw) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0sts`] module"]
791#[doc(alias = "SM0STS")]
792pub type Sm0sts = crate::Reg<sm0sts::Sm0stsSpec>;
793#[doc = "Status Register"]
794pub mod sm0sts;
795#[doc = "SM0INTEN (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0inten::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0inten::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0inten`] module"]
796#[doc(alias = "SM0INTEN")]
797pub type Sm0inten = crate::Reg<sm0inten::Sm0intenSpec>;
798#[doc = "Interrupt Enable Register"]
799pub mod sm0inten;
800#[doc = "SM0DMAEN (rw) register accessor: DMA Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0dmaen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0dmaen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0dmaen`] module"]
801#[doc(alias = "SM0DMAEN")]
802pub type Sm0dmaen = crate::Reg<sm0dmaen::Sm0dmaenSpec>;
803#[doc = "DMA Enable Register"]
804pub mod sm0dmaen;
805#[doc = "SM0TCTRL (rw) register accessor: Output Trigger Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0tctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0tctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0tctrl`] module"]
806#[doc(alias = "SM0TCTRL")]
807pub type Sm0tctrl = crate::Reg<sm0tctrl::Sm0tctrlSpec>;
808#[doc = "Output Trigger Control Register"]
809pub mod sm0tctrl;
810#[doc = "SM0DISMAP0 (rw) register accessor: Fault Disable Mapping Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0dismap0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0dismap0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0dismap0`] module"]
811#[doc(alias = "SM0DISMAP0")]
812pub type Sm0dismap0 = crate::Reg<sm0dismap0::Sm0dismap0Spec>;
813#[doc = "Fault Disable Mapping Register 0"]
814pub mod sm0dismap0;
815#[doc = "SM0DTCNT0 (rw) register accessor: Deadtime Count Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0dtcnt0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0dtcnt0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0dtcnt0`] module"]
816#[doc(alias = "SM0DTCNT0")]
817pub type Sm0dtcnt0 = crate::Reg<sm0dtcnt0::Sm0dtcnt0Spec>;
818#[doc = "Deadtime Count Register 0"]
819pub mod sm0dtcnt0;
820#[doc = "SM0DTCNT1 (rw) register accessor: Deadtime Count Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0dtcnt1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0dtcnt1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0dtcnt1`] module"]
821#[doc(alias = "SM0DTCNT1")]
822pub type Sm0dtcnt1 = crate::Reg<sm0dtcnt1::Sm0dtcnt1Spec>;
823#[doc = "Deadtime Count Register 1"]
824pub mod sm0dtcnt1;
825#[doc = "SM0CAPTCTRLX (rw) register accessor: Capture Control X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0captctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0captctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0captctrlx`] module"]
826#[doc(alias = "SM0CAPTCTRLX")]
827pub type Sm0captctrlx = crate::Reg<sm0captctrlx::Sm0captctrlxSpec>;
828#[doc = "Capture Control X Register"]
829pub mod sm0captctrlx;
830#[doc = "SM0CAPTCOMPX (rw) register accessor: Capture Compare X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0captcompx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0captcompx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0captcompx`] module"]
831#[doc(alias = "SM0CAPTCOMPX")]
832pub type Sm0captcompx = crate::Reg<sm0captcompx::Sm0captcompxSpec>;
833#[doc = "Capture Compare X Register"]
834pub mod sm0captcompx;
835#[doc = "SM0CVAL0 (r) register accessor: Capture Value 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0cval0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0cval0`] module"]
836#[doc(alias = "SM0CVAL0")]
837pub type Sm0cval0 = crate::Reg<sm0cval0::Sm0cval0Spec>;
838#[doc = "Capture Value 0 Register"]
839pub mod sm0cval0;
840#[doc = "SM0CVAL0CYC (r) register accessor: Capture Value 0 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0cval0cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0cval0cyc`] module"]
841#[doc(alias = "SM0CVAL0CYC")]
842pub type Sm0cval0cyc = crate::Reg<sm0cval0cyc::Sm0cval0cycSpec>;
843#[doc = "Capture Value 0 Cycle Register"]
844pub mod sm0cval0cyc;
845#[doc = "SM0CVAL1 (r) register accessor: Capture Value 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0cval1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0cval1`] module"]
846#[doc(alias = "SM0CVAL1")]
847pub type Sm0cval1 = crate::Reg<sm0cval1::Sm0cval1Spec>;
848#[doc = "Capture Value 1 Register"]
849pub mod sm0cval1;
850#[doc = "SM0CVAL1CYC (r) register accessor: Capture Value 1 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0cval1cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0cval1cyc`] module"]
851#[doc(alias = "SM0CVAL1CYC")]
852pub type Sm0cval1cyc = crate::Reg<sm0cval1cyc::Sm0cval1cycSpec>;
853#[doc = "Capture Value 1 Cycle Register"]
854pub mod sm0cval1cyc;
855#[doc = "SM0CAPTFILTX (rw) register accessor: Capture PWM_X Input Filter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0captfiltx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0captfiltx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm0captfiltx`] module"]
856#[doc(alias = "SM0CAPTFILTX")]
857pub type Sm0captfiltx = crate::Reg<sm0captfiltx::Sm0captfiltxSpec>;
858#[doc = "Capture PWM_X Input Filter Register"]
859pub mod sm0captfiltx;
860#[doc = "SM1CNT (r) register accessor: Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1cnt`] module"]
861#[doc(alias = "SM1CNT")]
862pub type Sm1cnt = crate::Reg<sm1cnt::Sm1cntSpec>;
863#[doc = "Counter Register"]
864pub mod sm1cnt;
865#[doc = "SM1INIT (rw) register accessor: Initial Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1init::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1init::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1init`] module"]
866#[doc(alias = "SM1INIT")]
867pub type Sm1init = crate::Reg<sm1init::Sm1initSpec>;
868#[doc = "Initial Count Register"]
869pub mod sm1init;
870#[doc = "SM1CTRL2 (rw) register accessor: Control 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1ctrl2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1ctrl2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1ctrl2`] module"]
871#[doc(alias = "SM1CTRL2")]
872pub type Sm1ctrl2 = crate::Reg<sm1ctrl2::Sm1ctrl2Spec>;
873#[doc = "Control 2 Register"]
874pub mod sm1ctrl2;
875#[doc = "SM1CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1ctrl`] module"]
876#[doc(alias = "SM1CTRL")]
877pub type Sm1ctrl = crate::Reg<sm1ctrl::Sm1ctrlSpec>;
878#[doc = "Control Register"]
879pub mod sm1ctrl;
880#[doc = "SM1VAL0 (rw) register accessor: Value Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1val0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1val0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1val0`] module"]
881#[doc(alias = "SM1VAL0")]
882pub type Sm1val0 = crate::Reg<sm1val0::Sm1val0Spec>;
883#[doc = "Value Register 0"]
884pub mod sm1val0;
885#[doc = "SM1VAL1 (rw) register accessor: Value Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1val1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1val1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1val1`] module"]
886#[doc(alias = "SM1VAL1")]
887pub type Sm1val1 = crate::Reg<sm1val1::Sm1val1Spec>;
888#[doc = "Value Register 1"]
889pub mod sm1val1;
890#[doc = "SM1VAL2 (rw) register accessor: Value Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1val2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1val2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1val2`] module"]
891#[doc(alias = "SM1VAL2")]
892pub type Sm1val2 = crate::Reg<sm1val2::Sm1val2Spec>;
893#[doc = "Value Register 2"]
894pub mod sm1val2;
895#[doc = "SM1VAL3 (rw) register accessor: Value Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1val3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1val3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1val3`] module"]
896#[doc(alias = "SM1VAL3")]
897pub type Sm1val3 = crate::Reg<sm1val3::Sm1val3Spec>;
898#[doc = "Value Register 3"]
899pub mod sm1val3;
900#[doc = "SM1VAL4 (rw) register accessor: Value Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1val4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1val4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1val4`] module"]
901#[doc(alias = "SM1VAL4")]
902pub type Sm1val4 = crate::Reg<sm1val4::Sm1val4Spec>;
903#[doc = "Value Register 4"]
904pub mod sm1val4;
905#[doc = "SM1VAL5 (rw) register accessor: Value Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1val5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1val5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1val5`] module"]
906#[doc(alias = "SM1VAL5")]
907pub type Sm1val5 = crate::Reg<sm1val5::Sm1val5Spec>;
908#[doc = "Value Register 5"]
909pub mod sm1val5;
910#[doc = "SM1OCTRL (rw) register accessor: Output Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1octrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1octrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1octrl`] module"]
911#[doc(alias = "SM1OCTRL")]
912pub type Sm1octrl = crate::Reg<sm1octrl::Sm1octrlSpec>;
913#[doc = "Output Control Register"]
914pub mod sm1octrl;
915#[doc = "SM1STS (rw) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1sts`] module"]
916#[doc(alias = "SM1STS")]
917pub type Sm1sts = crate::Reg<sm1sts::Sm1stsSpec>;
918#[doc = "Status Register"]
919pub mod sm1sts;
920#[doc = "SM1INTEN (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1inten::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1inten::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1inten`] module"]
921#[doc(alias = "SM1INTEN")]
922pub type Sm1inten = crate::Reg<sm1inten::Sm1intenSpec>;
923#[doc = "Interrupt Enable Register"]
924pub mod sm1inten;
925#[doc = "SM1DMAEN (rw) register accessor: DMA Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1dmaen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1dmaen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1dmaen`] module"]
926#[doc(alias = "SM1DMAEN")]
927pub type Sm1dmaen = crate::Reg<sm1dmaen::Sm1dmaenSpec>;
928#[doc = "DMA Enable Register"]
929pub mod sm1dmaen;
930#[doc = "SM1TCTRL (rw) register accessor: Output Trigger Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1tctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1tctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1tctrl`] module"]
931#[doc(alias = "SM1TCTRL")]
932pub type Sm1tctrl = crate::Reg<sm1tctrl::Sm1tctrlSpec>;
933#[doc = "Output Trigger Control Register"]
934pub mod sm1tctrl;
935#[doc = "SM1DISMAP0 (rw) register accessor: Fault Disable Mapping Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1dismap0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1dismap0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1dismap0`] module"]
936#[doc(alias = "SM1DISMAP0")]
937pub type Sm1dismap0 = crate::Reg<sm1dismap0::Sm1dismap0Spec>;
938#[doc = "Fault Disable Mapping Register 0"]
939pub mod sm1dismap0;
940#[doc = "SM1DTCNT0 (rw) register accessor: Deadtime Count Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1dtcnt0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1dtcnt0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1dtcnt0`] module"]
941#[doc(alias = "SM1DTCNT0")]
942pub type Sm1dtcnt0 = crate::Reg<sm1dtcnt0::Sm1dtcnt0Spec>;
943#[doc = "Deadtime Count Register 0"]
944pub mod sm1dtcnt0;
945#[doc = "SM1DTCNT1 (rw) register accessor: Deadtime Count Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1dtcnt1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1dtcnt1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1dtcnt1`] module"]
946#[doc(alias = "SM1DTCNT1")]
947pub type Sm1dtcnt1 = crate::Reg<sm1dtcnt1::Sm1dtcnt1Spec>;
948#[doc = "Deadtime Count Register 1"]
949pub mod sm1dtcnt1;
950#[doc = "SM1CAPTCTRLX (rw) register accessor: Capture Control X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1captctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1captctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1captctrlx`] module"]
951#[doc(alias = "SM1CAPTCTRLX")]
952pub type Sm1captctrlx = crate::Reg<sm1captctrlx::Sm1captctrlxSpec>;
953#[doc = "Capture Control X Register"]
954pub mod sm1captctrlx;
955#[doc = "SM1CAPTCOMPX (rw) register accessor: Capture Compare X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1captcompx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1captcompx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1captcompx`] module"]
956#[doc(alias = "SM1CAPTCOMPX")]
957pub type Sm1captcompx = crate::Reg<sm1captcompx::Sm1captcompxSpec>;
958#[doc = "Capture Compare X Register"]
959pub mod sm1captcompx;
960#[doc = "SM1CVAL0 (r) register accessor: Capture Value 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1cval0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1cval0`] module"]
961#[doc(alias = "SM1CVAL0")]
962pub type Sm1cval0 = crate::Reg<sm1cval0::Sm1cval0Spec>;
963#[doc = "Capture Value 0 Register"]
964pub mod sm1cval0;
965#[doc = "SM1CVAL0CYC (r) register accessor: Capture Value 0 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1cval0cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1cval0cyc`] module"]
966#[doc(alias = "SM1CVAL0CYC")]
967pub type Sm1cval0cyc = crate::Reg<sm1cval0cyc::Sm1cval0cycSpec>;
968#[doc = "Capture Value 0 Cycle Register"]
969pub mod sm1cval0cyc;
970#[doc = "SM1CVAL1 (r) register accessor: Capture Value 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1cval1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1cval1`] module"]
971#[doc(alias = "SM1CVAL1")]
972pub type Sm1cval1 = crate::Reg<sm1cval1::Sm1cval1Spec>;
973#[doc = "Capture Value 1 Register"]
974pub mod sm1cval1;
975#[doc = "SM1CVAL1CYC (r) register accessor: Capture Value 1 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1cval1cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1cval1cyc`] module"]
976#[doc(alias = "SM1CVAL1CYC")]
977pub type Sm1cval1cyc = crate::Reg<sm1cval1cyc::Sm1cval1cycSpec>;
978#[doc = "Capture Value 1 Cycle Register"]
979pub mod sm1cval1cyc;
980#[doc = "SM1PHASEDLY (rw) register accessor: Phase Delay Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1phasedly::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1phasedly::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1phasedly`] module"]
981#[doc(alias = "SM1PHASEDLY")]
982pub type Sm1phasedly = crate::Reg<sm1phasedly::Sm1phasedlySpec>;
983#[doc = "Phase Delay Register"]
984pub mod sm1phasedly;
985#[doc = "SM1CAPTFILTX (rw) register accessor: Capture PWM_X Input Filter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1captfiltx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm1captfiltx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm1captfiltx`] module"]
986#[doc(alias = "SM1CAPTFILTX")]
987pub type Sm1captfiltx = crate::Reg<sm1captfiltx::Sm1captfiltxSpec>;
988#[doc = "Capture PWM_X Input Filter Register"]
989pub mod sm1captfiltx;
990#[doc = "SM2CNT (r) register accessor: Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2cnt`] module"]
991#[doc(alias = "SM2CNT")]
992pub type Sm2cnt = crate::Reg<sm2cnt::Sm2cntSpec>;
993#[doc = "Counter Register"]
994pub mod sm2cnt;
995#[doc = "SM2INIT (rw) register accessor: Initial Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2init::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2init::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2init`] module"]
996#[doc(alias = "SM2INIT")]
997pub type Sm2init = crate::Reg<sm2init::Sm2initSpec>;
998#[doc = "Initial Count Register"]
999pub mod sm2init;
1000#[doc = "SM2CTRL2 (rw) register accessor: Control 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2ctrl2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2ctrl2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2ctrl2`] module"]
1001#[doc(alias = "SM2CTRL2")]
1002pub type Sm2ctrl2 = crate::Reg<sm2ctrl2::Sm2ctrl2Spec>;
1003#[doc = "Control 2 Register"]
1004pub mod sm2ctrl2;
1005#[doc = "SM2CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2ctrl`] module"]
1006#[doc(alias = "SM2CTRL")]
1007pub type Sm2ctrl = crate::Reg<sm2ctrl::Sm2ctrlSpec>;
1008#[doc = "Control Register"]
1009pub mod sm2ctrl;
1010#[doc = "SM2VAL0 (rw) register accessor: Value Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2val0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2val0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2val0`] module"]
1011#[doc(alias = "SM2VAL0")]
1012pub type Sm2val0 = crate::Reg<sm2val0::Sm2val0Spec>;
1013#[doc = "Value Register 0"]
1014pub mod sm2val0;
1015#[doc = "SM2VAL1 (rw) register accessor: Value Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2val1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2val1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2val1`] module"]
1016#[doc(alias = "SM2VAL1")]
1017pub type Sm2val1 = crate::Reg<sm2val1::Sm2val1Spec>;
1018#[doc = "Value Register 1"]
1019pub mod sm2val1;
1020#[doc = "SM2VAL2 (rw) register accessor: Value Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2val2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2val2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2val2`] module"]
1021#[doc(alias = "SM2VAL2")]
1022pub type Sm2val2 = crate::Reg<sm2val2::Sm2val2Spec>;
1023#[doc = "Value Register 2"]
1024pub mod sm2val2;
1025#[doc = "SM2VAL3 (rw) register accessor: Value Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2val3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2val3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2val3`] module"]
1026#[doc(alias = "SM2VAL3")]
1027pub type Sm2val3 = crate::Reg<sm2val3::Sm2val3Spec>;
1028#[doc = "Value Register 3"]
1029pub mod sm2val3;
1030#[doc = "SM2VAL4 (rw) register accessor: Value Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2val4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2val4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2val4`] module"]
1031#[doc(alias = "SM2VAL4")]
1032pub type Sm2val4 = crate::Reg<sm2val4::Sm2val4Spec>;
1033#[doc = "Value Register 4"]
1034pub mod sm2val4;
1035#[doc = "SM2VAL5 (rw) register accessor: Value Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2val5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2val5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2val5`] module"]
1036#[doc(alias = "SM2VAL5")]
1037pub type Sm2val5 = crate::Reg<sm2val5::Sm2val5Spec>;
1038#[doc = "Value Register 5"]
1039pub mod sm2val5;
1040#[doc = "SM2OCTRL (rw) register accessor: Output Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2octrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2octrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2octrl`] module"]
1041#[doc(alias = "SM2OCTRL")]
1042pub type Sm2octrl = crate::Reg<sm2octrl::Sm2octrlSpec>;
1043#[doc = "Output Control Register"]
1044pub mod sm2octrl;
1045#[doc = "SM2STS (rw) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2sts`] module"]
1046#[doc(alias = "SM2STS")]
1047pub type Sm2sts = crate::Reg<sm2sts::Sm2stsSpec>;
1048#[doc = "Status Register"]
1049pub mod sm2sts;
1050#[doc = "SM2INTEN (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2inten::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2inten::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2inten`] module"]
1051#[doc(alias = "SM2INTEN")]
1052pub type Sm2inten = crate::Reg<sm2inten::Sm2intenSpec>;
1053#[doc = "Interrupt Enable Register"]
1054pub mod sm2inten;
1055#[doc = "SM2DMAEN (rw) register accessor: DMA Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2dmaen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2dmaen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2dmaen`] module"]
1056#[doc(alias = "SM2DMAEN")]
1057pub type Sm2dmaen = crate::Reg<sm2dmaen::Sm2dmaenSpec>;
1058#[doc = "DMA Enable Register"]
1059pub mod sm2dmaen;
1060#[doc = "SM2TCTRL (rw) register accessor: Output Trigger Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2tctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2tctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2tctrl`] module"]
1061#[doc(alias = "SM2TCTRL")]
1062pub type Sm2tctrl = crate::Reg<sm2tctrl::Sm2tctrlSpec>;
1063#[doc = "Output Trigger Control Register"]
1064pub mod sm2tctrl;
1065#[doc = "SM2DISMAP0 (rw) register accessor: Fault Disable Mapping Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2dismap0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2dismap0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2dismap0`] module"]
1066#[doc(alias = "SM2DISMAP0")]
1067pub type Sm2dismap0 = crate::Reg<sm2dismap0::Sm2dismap0Spec>;
1068#[doc = "Fault Disable Mapping Register 0"]
1069pub mod sm2dismap0;
1070#[doc = "SM2DTCNT0 (rw) register accessor: Deadtime Count Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2dtcnt0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2dtcnt0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2dtcnt0`] module"]
1071#[doc(alias = "SM2DTCNT0")]
1072pub type Sm2dtcnt0 = crate::Reg<sm2dtcnt0::Sm2dtcnt0Spec>;
1073#[doc = "Deadtime Count Register 0"]
1074pub mod sm2dtcnt0;
1075#[doc = "SM2DTCNT1 (rw) register accessor: Deadtime Count Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2dtcnt1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2dtcnt1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2dtcnt1`] module"]
1076#[doc(alias = "SM2DTCNT1")]
1077pub type Sm2dtcnt1 = crate::Reg<sm2dtcnt1::Sm2dtcnt1Spec>;
1078#[doc = "Deadtime Count Register 1"]
1079pub mod sm2dtcnt1;
1080#[doc = "SM2CAPTCTRLX (rw) register accessor: Capture Control X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2captctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2captctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2captctrlx`] module"]
1081#[doc(alias = "SM2CAPTCTRLX")]
1082pub type Sm2captctrlx = crate::Reg<sm2captctrlx::Sm2captctrlxSpec>;
1083#[doc = "Capture Control X Register"]
1084pub mod sm2captctrlx;
1085#[doc = "SM2CAPTCOMPX (rw) register accessor: Capture Compare X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2captcompx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2captcompx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2captcompx`] module"]
1086#[doc(alias = "SM2CAPTCOMPX")]
1087pub type Sm2captcompx = crate::Reg<sm2captcompx::Sm2captcompxSpec>;
1088#[doc = "Capture Compare X Register"]
1089pub mod sm2captcompx;
1090#[doc = "SM2CVAL0 (r) register accessor: Capture Value 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2cval0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2cval0`] module"]
1091#[doc(alias = "SM2CVAL0")]
1092pub type Sm2cval0 = crate::Reg<sm2cval0::Sm2cval0Spec>;
1093#[doc = "Capture Value 0 Register"]
1094pub mod sm2cval0;
1095#[doc = "SM2CVAL0CYC (r) register accessor: Capture Value 0 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2cval0cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2cval0cyc`] module"]
1096#[doc(alias = "SM2CVAL0CYC")]
1097pub type Sm2cval0cyc = crate::Reg<sm2cval0cyc::Sm2cval0cycSpec>;
1098#[doc = "Capture Value 0 Cycle Register"]
1099pub mod sm2cval0cyc;
1100#[doc = "SM2CVAL1 (r) register accessor: Capture Value 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2cval1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2cval1`] module"]
1101#[doc(alias = "SM2CVAL1")]
1102pub type Sm2cval1 = crate::Reg<sm2cval1::Sm2cval1Spec>;
1103#[doc = "Capture Value 1 Register"]
1104pub mod sm2cval1;
1105#[doc = "SM2CVAL1CYC (r) register accessor: Capture Value 1 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2cval1cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2cval1cyc`] module"]
1106#[doc(alias = "SM2CVAL1CYC")]
1107pub type Sm2cval1cyc = crate::Reg<sm2cval1cyc::Sm2cval1cycSpec>;
1108#[doc = "Capture Value 1 Cycle Register"]
1109pub mod sm2cval1cyc;
1110#[doc = "SM2PHASEDLY (rw) register accessor: Phase Delay Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2phasedly::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2phasedly::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2phasedly`] module"]
1111#[doc(alias = "SM2PHASEDLY")]
1112pub type Sm2phasedly = crate::Reg<sm2phasedly::Sm2phasedlySpec>;
1113#[doc = "Phase Delay Register"]
1114pub mod sm2phasedly;
1115#[doc = "SM2CAPTFILTX (rw) register accessor: Capture PWM_X Input Filter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm2captfiltx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm2captfiltx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm2captfiltx`] module"]
1116#[doc(alias = "SM2CAPTFILTX")]
1117pub type Sm2captfiltx = crate::Reg<sm2captfiltx::Sm2captfiltxSpec>;
1118#[doc = "Capture PWM_X Input Filter Register"]
1119pub mod sm2captfiltx;
1120#[doc = "SM3CNT (r) register accessor: Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3cnt`] module"]
1121#[doc(alias = "SM3CNT")]
1122pub type Sm3cnt = crate::Reg<sm3cnt::Sm3cntSpec>;
1123#[doc = "Counter Register"]
1124pub mod sm3cnt;
1125#[doc = "SM3INIT (rw) register accessor: Initial Count Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3init::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3init::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3init`] module"]
1126#[doc(alias = "SM3INIT")]
1127pub type Sm3init = crate::Reg<sm3init::Sm3initSpec>;
1128#[doc = "Initial Count Register"]
1129pub mod sm3init;
1130#[doc = "SM3CTRL2 (rw) register accessor: Control 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3ctrl2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3ctrl2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3ctrl2`] module"]
1131#[doc(alias = "SM3CTRL2")]
1132pub type Sm3ctrl2 = crate::Reg<sm3ctrl2::Sm3ctrl2Spec>;
1133#[doc = "Control 2 Register"]
1134pub mod sm3ctrl2;
1135#[doc = "SM3CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3ctrl`] module"]
1136#[doc(alias = "SM3CTRL")]
1137pub type Sm3ctrl = crate::Reg<sm3ctrl::Sm3ctrlSpec>;
1138#[doc = "Control Register"]
1139pub mod sm3ctrl;
1140#[doc = "SM3VAL0 (rw) register accessor: Value Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3val0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3val0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3val0`] module"]
1141#[doc(alias = "SM3VAL0")]
1142pub type Sm3val0 = crate::Reg<sm3val0::Sm3val0Spec>;
1143#[doc = "Value Register 0"]
1144pub mod sm3val0;
1145#[doc = "SM3VAL1 (rw) register accessor: Value Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3val1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3val1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3val1`] module"]
1146#[doc(alias = "SM3VAL1")]
1147pub type Sm3val1 = crate::Reg<sm3val1::Sm3val1Spec>;
1148#[doc = "Value Register 1"]
1149pub mod sm3val1;
1150#[doc = "SM3VAL2 (rw) register accessor: Value Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3val2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3val2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3val2`] module"]
1151#[doc(alias = "SM3VAL2")]
1152pub type Sm3val2 = crate::Reg<sm3val2::Sm3val2Spec>;
1153#[doc = "Value Register 2"]
1154pub mod sm3val2;
1155#[doc = "SM3VAL3 (rw) register accessor: Value Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3val3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3val3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3val3`] module"]
1156#[doc(alias = "SM3VAL3")]
1157pub type Sm3val3 = crate::Reg<sm3val3::Sm3val3Spec>;
1158#[doc = "Value Register 3"]
1159pub mod sm3val3;
1160#[doc = "SM3VAL4 (rw) register accessor: Value Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3val4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3val4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3val4`] module"]
1161#[doc(alias = "SM3VAL4")]
1162pub type Sm3val4 = crate::Reg<sm3val4::Sm3val4Spec>;
1163#[doc = "Value Register 4"]
1164pub mod sm3val4;
1165#[doc = "SM3VAL5 (rw) register accessor: Value Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3val5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3val5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3val5`] module"]
1166#[doc(alias = "SM3VAL5")]
1167pub type Sm3val5 = crate::Reg<sm3val5::Sm3val5Spec>;
1168#[doc = "Value Register 5"]
1169pub mod sm3val5;
1170#[doc = "SM3OCTRL (rw) register accessor: Output Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3octrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3octrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3octrl`] module"]
1171#[doc(alias = "SM3OCTRL")]
1172pub type Sm3octrl = crate::Reg<sm3octrl::Sm3octrlSpec>;
1173#[doc = "Output Control Register"]
1174pub mod sm3octrl;
1175#[doc = "SM3STS (rw) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3sts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3sts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3sts`] module"]
1176#[doc(alias = "SM3STS")]
1177pub type Sm3sts = crate::Reg<sm3sts::Sm3stsSpec>;
1178#[doc = "Status Register"]
1179pub mod sm3sts;
1180#[doc = "SM3INTEN (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3inten::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3inten::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3inten`] module"]
1181#[doc(alias = "SM3INTEN")]
1182pub type Sm3inten = crate::Reg<sm3inten::Sm3intenSpec>;
1183#[doc = "Interrupt Enable Register"]
1184pub mod sm3inten;
1185#[doc = "SM3DMAEN (rw) register accessor: DMA Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3dmaen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3dmaen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3dmaen`] module"]
1186#[doc(alias = "SM3DMAEN")]
1187pub type Sm3dmaen = crate::Reg<sm3dmaen::Sm3dmaenSpec>;
1188#[doc = "DMA Enable Register"]
1189pub mod sm3dmaen;
1190#[doc = "SM3TCTRL (rw) register accessor: Output Trigger Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3tctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3tctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3tctrl`] module"]
1191#[doc(alias = "SM3TCTRL")]
1192pub type Sm3tctrl = crate::Reg<sm3tctrl::Sm3tctrlSpec>;
1193#[doc = "Output Trigger Control Register"]
1194pub mod sm3tctrl;
1195#[doc = "SM3DISMAP0 (rw) register accessor: Fault Disable Mapping Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3dismap0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3dismap0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3dismap0`] module"]
1196#[doc(alias = "SM3DISMAP0")]
1197pub type Sm3dismap0 = crate::Reg<sm3dismap0::Sm3dismap0Spec>;
1198#[doc = "Fault Disable Mapping Register 0"]
1199pub mod sm3dismap0;
1200#[doc = "SM3DTCNT0 (rw) register accessor: Deadtime Count Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3dtcnt0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3dtcnt0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3dtcnt0`] module"]
1201#[doc(alias = "SM3DTCNT0")]
1202pub type Sm3dtcnt0 = crate::Reg<sm3dtcnt0::Sm3dtcnt0Spec>;
1203#[doc = "Deadtime Count Register 0"]
1204pub mod sm3dtcnt0;
1205#[doc = "SM3DTCNT1 (rw) register accessor: Deadtime Count Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3dtcnt1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3dtcnt1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3dtcnt1`] module"]
1206#[doc(alias = "SM3DTCNT1")]
1207pub type Sm3dtcnt1 = crate::Reg<sm3dtcnt1::Sm3dtcnt1Spec>;
1208#[doc = "Deadtime Count Register 1"]
1209pub mod sm3dtcnt1;
1210#[doc = "SM3CAPTCTRLX (rw) register accessor: Capture Control X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3captctrlx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3captctrlx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3captctrlx`] module"]
1211#[doc(alias = "SM3CAPTCTRLX")]
1212pub type Sm3captctrlx = crate::Reg<sm3captctrlx::Sm3captctrlxSpec>;
1213#[doc = "Capture Control X Register"]
1214pub mod sm3captctrlx;
1215#[doc = "SM3CAPTCOMPX (rw) register accessor: Capture Compare X Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3captcompx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3captcompx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3captcompx`] module"]
1216#[doc(alias = "SM3CAPTCOMPX")]
1217pub type Sm3captcompx = crate::Reg<sm3captcompx::Sm3captcompxSpec>;
1218#[doc = "Capture Compare X Register"]
1219pub mod sm3captcompx;
1220#[doc = "SM3CVAL0 (r) register accessor: Capture Value 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3cval0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3cval0`] module"]
1221#[doc(alias = "SM3CVAL0")]
1222pub type Sm3cval0 = crate::Reg<sm3cval0::Sm3cval0Spec>;
1223#[doc = "Capture Value 0 Register"]
1224pub mod sm3cval0;
1225#[doc = "SM3CVAL0CYC (r) register accessor: Capture Value 0 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3cval0cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3cval0cyc`] module"]
1226#[doc(alias = "SM3CVAL0CYC")]
1227pub type Sm3cval0cyc = crate::Reg<sm3cval0cyc::Sm3cval0cycSpec>;
1228#[doc = "Capture Value 0 Cycle Register"]
1229pub mod sm3cval0cyc;
1230#[doc = "SM3CVAL1 (r) register accessor: Capture Value 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3cval1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3cval1`] module"]
1231#[doc(alias = "SM3CVAL1")]
1232pub type Sm3cval1 = crate::Reg<sm3cval1::Sm3cval1Spec>;
1233#[doc = "Capture Value 1 Register"]
1234pub mod sm3cval1;
1235#[doc = "SM3CVAL1CYC (r) register accessor: Capture Value 1 Cycle Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3cval1cyc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3cval1cyc`] module"]
1236#[doc(alias = "SM3CVAL1CYC")]
1237pub type Sm3cval1cyc = crate::Reg<sm3cval1cyc::Sm3cval1cycSpec>;
1238#[doc = "Capture Value 1 Cycle Register"]
1239pub mod sm3cval1cyc;
1240#[doc = "SM3PHASEDLY (rw) register accessor: Phase Delay Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3phasedly::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3phasedly::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3phasedly`] module"]
1241#[doc(alias = "SM3PHASEDLY")]
1242pub type Sm3phasedly = crate::Reg<sm3phasedly::Sm3phasedlySpec>;
1243#[doc = "Phase Delay Register"]
1244pub mod sm3phasedly;
1245#[doc = "SM3CAPTFILTX (rw) register accessor: Capture PWM_X Input Filter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm3captfiltx::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm3captfiltx::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm3captfiltx`] module"]
1246#[doc(alias = "SM3CAPTFILTX")]
1247pub type Sm3captfiltx = crate::Reg<sm3captfiltx::Sm3captfiltxSpec>;
1248#[doc = "Capture PWM_X Input Filter Register"]
1249pub mod sm3captfiltx;
1250#[doc = "OUTEN (rw) register accessor: Output Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`outen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outen`] module"]
1251#[doc(alias = "OUTEN")]
1252pub type Outen = crate::Reg<outen::OutenSpec>;
1253#[doc = "Output Enable Register"]
1254pub mod outen;
1255#[doc = "MASK (rw) register accessor: Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mask`] module"]
1256#[doc(alias = "MASK")]
1257pub type Mask = crate::Reg<mask::MaskSpec>;
1258#[doc = "Mask Register"]
1259pub mod mask;
1260#[doc = "SWCOUT (rw) register accessor: Software Controlled Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`swcout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swcout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swcout`] module"]
1261#[doc(alias = "SWCOUT")]
1262pub type Swcout = crate::Reg<swcout::SwcoutSpec>;
1263#[doc = "Software Controlled Output Register"]
1264pub mod swcout;
1265#[doc = "DTSRCSEL (rw) register accessor: PWM Source Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtsrcsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtsrcsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtsrcsel`] module"]
1266#[doc(alias = "DTSRCSEL")]
1267pub type Dtsrcsel = crate::Reg<dtsrcsel::DtsrcselSpec>;
1268#[doc = "PWM Source Select Register"]
1269pub mod dtsrcsel;
1270#[doc = "MCTRL (rw) register accessor: Master Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mctrl`] module"]
1271#[doc(alias = "MCTRL")]
1272pub type Mctrl = crate::Reg<mctrl::MctrlSpec>;
1273#[doc = "Master Control Register"]
1274pub mod mctrl;
1275#[doc = "MCTRL2 (rw) register accessor: Master Control 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mctrl2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mctrl2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mctrl2`] module"]
1276#[doc(alias = "MCTRL2")]
1277pub type Mctrl2 = crate::Reg<mctrl2::Mctrl2Spec>;
1278#[doc = "Master Control 2 Register"]
1279pub mod mctrl2;
1280#[doc = "FCTRL0 (rw) register accessor: Fault Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fctrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fctrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fctrl0`] module"]
1281#[doc(alias = "FCTRL0")]
1282pub type Fctrl0 = crate::Reg<fctrl0::Fctrl0Spec>;
1283#[doc = "Fault Control Register"]
1284pub mod fctrl0;
1285#[doc = "FSTS0 (rw) register accessor: Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fsts0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fsts0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsts0`] module"]
1286#[doc(alias = "FSTS0")]
1287pub type Fsts0 = crate::Reg<fsts0::Fsts0Spec>;
1288#[doc = "Fault Status Register"]
1289pub mod fsts0;
1290#[doc = "FFILT0 (rw) register accessor: Fault Filter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ffilt0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ffilt0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ffilt0`] module"]
1291#[doc(alias = "FFILT0")]
1292pub type Ffilt0 = crate::Reg<ffilt0::Ffilt0Spec>;
1293#[doc = "Fault Filter Register"]
1294pub mod ffilt0;
1295#[doc = "FTST0 (rw) register accessor: Fault Test Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ftst0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ftst0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ftst0`] module"]
1296#[doc(alias = "FTST0")]
1297pub type Ftst0 = crate::Reg<ftst0::Ftst0Spec>;
1298#[doc = "Fault Test Register"]
1299pub mod ftst0;
1300#[doc = "FCTRL20 (rw) register accessor: Fault Control 2 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fctrl20::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fctrl20::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fctrl20`] module"]
1301#[doc(alias = "FCTRL20")]
1302pub type Fctrl20 = crate::Reg<fctrl20::Fctrl20Spec>;
1303#[doc = "Fault Control 2 Register"]
1304pub mod fctrl20;