max78000_pac/spi0/
ctrl2.rs

1#[doc = "Register `CTRL2` reader"]
2pub type R = crate::R<Ctrl2Spec>;
3#[doc = "Register `CTRL2` writer"]
4pub type W = crate::W<Ctrl2Spec>;
5#[doc = "Clock Phase.\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Clkpha {
8    #[doc = "0: Data Sampled on clock rising edge. Use when in SPI Mode 0 and Mode 2"]
9    RisingEdge = 0,
10    #[doc = "1: Data Sampled on clock falling edge. Use when in SPI Mode 1 and Mode 3"]
11    FallingEdge = 1,
12}
13impl From<Clkpha> for bool {
14    #[inline(always)]
15    fn from(variant: Clkpha) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `CLKPHA` reader - Clock Phase."]
20pub type ClkphaR = crate::BitReader<Clkpha>;
21impl ClkphaR {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> Clkpha {
25        match self.bits {
26            false => Clkpha::RisingEdge,
27            true => Clkpha::FallingEdge,
28        }
29    }
30    #[doc = "Data Sampled on clock rising edge. Use when in SPI Mode 0 and Mode 2"]
31    #[inline(always)]
32    pub fn is_rising_edge(&self) -> bool {
33        *self == Clkpha::RisingEdge
34    }
35    #[doc = "Data Sampled on clock falling edge. Use when in SPI Mode 1 and Mode 3"]
36    #[inline(always)]
37    pub fn is_falling_edge(&self) -> bool {
38        *self == Clkpha::FallingEdge
39    }
40}
41#[doc = "Field `CLKPHA` writer - Clock Phase."]
42pub type ClkphaW<'a, REG> = crate::BitWriter<'a, REG, Clkpha>;
43impl<'a, REG> ClkphaW<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Data Sampled on clock rising edge. Use when in SPI Mode 0 and Mode 2"]
48    #[inline(always)]
49    pub fn rising_edge(self) -> &'a mut crate::W<REG> {
50        self.variant(Clkpha::RisingEdge)
51    }
52    #[doc = "Data Sampled on clock falling edge. Use when in SPI Mode 1 and Mode 3"]
53    #[inline(always)]
54    pub fn falling_edge(self) -> &'a mut crate::W<REG> {
55        self.variant(Clkpha::FallingEdge)
56    }
57}
58#[doc = "Clock Polarity.\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum Clkpol {
61    #[doc = "0: Normal Clock. Use when in SPI Mode 0 and Mode 1"]
62    Normal = 0,
63    #[doc = "1: Inverted Clock. Use when in SPI Mode 2 and Mode 3"]
64    Inverted = 1,
65}
66impl From<Clkpol> for bool {
67    #[inline(always)]
68    fn from(variant: Clkpol) -> Self {
69        variant as u8 != 0
70    }
71}
72#[doc = "Field `CLKPOL` reader - Clock Polarity."]
73pub type ClkpolR = crate::BitReader<Clkpol>;
74impl ClkpolR {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> Clkpol {
78        match self.bits {
79            false => Clkpol::Normal,
80            true => Clkpol::Inverted,
81        }
82    }
83    #[doc = "Normal Clock. Use when in SPI Mode 0 and Mode 1"]
84    #[inline(always)]
85    pub fn is_normal(&self) -> bool {
86        *self == Clkpol::Normal
87    }
88    #[doc = "Inverted Clock. Use when in SPI Mode 2 and Mode 3"]
89    #[inline(always)]
90    pub fn is_inverted(&self) -> bool {
91        *self == Clkpol::Inverted
92    }
93}
94#[doc = "Field `CLKPOL` writer - Clock Polarity."]
95pub type ClkpolW<'a, REG> = crate::BitWriter<'a, REG, Clkpol>;
96impl<'a, REG> ClkpolW<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Normal Clock. Use when in SPI Mode 0 and Mode 1"]
101    #[inline(always)]
102    pub fn normal(self) -> &'a mut crate::W<REG> {
103        self.variant(Clkpol::Normal)
104    }
105    #[doc = "Inverted Clock. Use when in SPI Mode 2 and Mode 3"]
106    #[inline(always)]
107    pub fn inverted(self) -> &'a mut crate::W<REG> {
108        self.variant(Clkpol::Inverted)
109    }
110}
111#[doc = "Number of Bits per character.\n\nValue on reset: 0"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113#[repr(u8)]
114pub enum Numbits {
115    #[doc = "0: 16 bits per character."]
116    _16 = 0,
117    #[doc = "1: 1 bits per character."]
118    _1 = 1,
119    #[doc = "2: 2 bits per character."]
120    _2 = 2,
121    #[doc = "3: 3 bits per character."]
122    _3 = 3,
123    #[doc = "4: 4 bits per character."]
124    _4 = 4,
125    #[doc = "5: 5 bits per character."]
126    _5 = 5,
127    #[doc = "6: 6 bits per character."]
128    _6 = 6,
129    #[doc = "7: 7 bits per character."]
130    _7 = 7,
131    #[doc = "8: 8 bits per character."]
132    _8 = 8,
133    #[doc = "9: 9 bits per character."]
134    _9 = 9,
135    #[doc = "10: 10 bits per character."]
136    _10 = 10,
137    #[doc = "11: 11 bits per character."]
138    _11 = 11,
139    #[doc = "12: 12 bits per character."]
140    _12 = 12,
141    #[doc = "13: 13 bits per character."]
142    _13 = 13,
143    #[doc = "14: 14 bits per character."]
144    _14 = 14,
145    #[doc = "15: 15 bits per character."]
146    _15 = 15,
147}
148impl From<Numbits> for u8 {
149    #[inline(always)]
150    fn from(variant: Numbits) -> Self {
151        variant as _
152    }
153}
154impl crate::FieldSpec for Numbits {
155    type Ux = u8;
156}
157impl crate::IsEnum for Numbits {}
158#[doc = "Field `NUMBITS` reader - Number of Bits per character."]
159pub type NumbitsR = crate::FieldReader<Numbits>;
160impl NumbitsR {
161    #[doc = "Get enumerated values variant"]
162    #[inline(always)]
163    pub const fn variant(&self) -> Numbits {
164        match self.bits {
165            0 => Numbits::_16,
166            1 => Numbits::_1,
167            2 => Numbits::_2,
168            3 => Numbits::_3,
169            4 => Numbits::_4,
170            5 => Numbits::_5,
171            6 => Numbits::_6,
172            7 => Numbits::_7,
173            8 => Numbits::_8,
174            9 => Numbits::_9,
175            10 => Numbits::_10,
176            11 => Numbits::_11,
177            12 => Numbits::_12,
178            13 => Numbits::_13,
179            14 => Numbits::_14,
180            15 => Numbits::_15,
181            _ => unreachable!(),
182        }
183    }
184    #[doc = "16 bits per character."]
185    #[inline(always)]
186    pub fn is_16(&self) -> bool {
187        *self == Numbits::_16
188    }
189    #[doc = "1 bits per character."]
190    #[inline(always)]
191    pub fn is_1(&self) -> bool {
192        *self == Numbits::_1
193    }
194    #[doc = "2 bits per character."]
195    #[inline(always)]
196    pub fn is_2(&self) -> bool {
197        *self == Numbits::_2
198    }
199    #[doc = "3 bits per character."]
200    #[inline(always)]
201    pub fn is_3(&self) -> bool {
202        *self == Numbits::_3
203    }
204    #[doc = "4 bits per character."]
205    #[inline(always)]
206    pub fn is_4(&self) -> bool {
207        *self == Numbits::_4
208    }
209    #[doc = "5 bits per character."]
210    #[inline(always)]
211    pub fn is_5(&self) -> bool {
212        *self == Numbits::_5
213    }
214    #[doc = "6 bits per character."]
215    #[inline(always)]
216    pub fn is_6(&self) -> bool {
217        *self == Numbits::_6
218    }
219    #[doc = "7 bits per character."]
220    #[inline(always)]
221    pub fn is_7(&self) -> bool {
222        *self == Numbits::_7
223    }
224    #[doc = "8 bits per character."]
225    #[inline(always)]
226    pub fn is_8(&self) -> bool {
227        *self == Numbits::_8
228    }
229    #[doc = "9 bits per character."]
230    #[inline(always)]
231    pub fn is_9(&self) -> bool {
232        *self == Numbits::_9
233    }
234    #[doc = "10 bits per character."]
235    #[inline(always)]
236    pub fn is_10(&self) -> bool {
237        *self == Numbits::_10
238    }
239    #[doc = "11 bits per character."]
240    #[inline(always)]
241    pub fn is_11(&self) -> bool {
242        *self == Numbits::_11
243    }
244    #[doc = "12 bits per character."]
245    #[inline(always)]
246    pub fn is_12(&self) -> bool {
247        *self == Numbits::_12
248    }
249    #[doc = "13 bits per character."]
250    #[inline(always)]
251    pub fn is_13(&self) -> bool {
252        *self == Numbits::_13
253    }
254    #[doc = "14 bits per character."]
255    #[inline(always)]
256    pub fn is_14(&self) -> bool {
257        *self == Numbits::_14
258    }
259    #[doc = "15 bits per character."]
260    #[inline(always)]
261    pub fn is_15(&self) -> bool {
262        *self == Numbits::_15
263    }
264}
265#[doc = "Field `NUMBITS` writer - Number of Bits per character."]
266pub type NumbitsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Numbits, crate::Safe>;
267impl<'a, REG> NumbitsW<'a, REG>
268where
269    REG: crate::Writable + crate::RegisterSpec,
270    REG::Ux: From<u8>,
271{
272    #[doc = "16 bits per character."]
273    #[inline(always)]
274    pub fn _16(self) -> &'a mut crate::W<REG> {
275        self.variant(Numbits::_16)
276    }
277    #[doc = "1 bits per character."]
278    #[inline(always)]
279    pub fn _1(self) -> &'a mut crate::W<REG> {
280        self.variant(Numbits::_1)
281    }
282    #[doc = "2 bits per character."]
283    #[inline(always)]
284    pub fn _2(self) -> &'a mut crate::W<REG> {
285        self.variant(Numbits::_2)
286    }
287    #[doc = "3 bits per character."]
288    #[inline(always)]
289    pub fn _3(self) -> &'a mut crate::W<REG> {
290        self.variant(Numbits::_3)
291    }
292    #[doc = "4 bits per character."]
293    #[inline(always)]
294    pub fn _4(self) -> &'a mut crate::W<REG> {
295        self.variant(Numbits::_4)
296    }
297    #[doc = "5 bits per character."]
298    #[inline(always)]
299    pub fn _5(self) -> &'a mut crate::W<REG> {
300        self.variant(Numbits::_5)
301    }
302    #[doc = "6 bits per character."]
303    #[inline(always)]
304    pub fn _6(self) -> &'a mut crate::W<REG> {
305        self.variant(Numbits::_6)
306    }
307    #[doc = "7 bits per character."]
308    #[inline(always)]
309    pub fn _7(self) -> &'a mut crate::W<REG> {
310        self.variant(Numbits::_7)
311    }
312    #[doc = "8 bits per character."]
313    #[inline(always)]
314    pub fn _8(self) -> &'a mut crate::W<REG> {
315        self.variant(Numbits::_8)
316    }
317    #[doc = "9 bits per character."]
318    #[inline(always)]
319    pub fn _9(self) -> &'a mut crate::W<REG> {
320        self.variant(Numbits::_9)
321    }
322    #[doc = "10 bits per character."]
323    #[inline(always)]
324    pub fn _10(self) -> &'a mut crate::W<REG> {
325        self.variant(Numbits::_10)
326    }
327    #[doc = "11 bits per character."]
328    #[inline(always)]
329    pub fn _11(self) -> &'a mut crate::W<REG> {
330        self.variant(Numbits::_11)
331    }
332    #[doc = "12 bits per character."]
333    #[inline(always)]
334    pub fn _12(self) -> &'a mut crate::W<REG> {
335        self.variant(Numbits::_12)
336    }
337    #[doc = "13 bits per character."]
338    #[inline(always)]
339    pub fn _13(self) -> &'a mut crate::W<REG> {
340        self.variant(Numbits::_13)
341    }
342    #[doc = "14 bits per character."]
343    #[inline(always)]
344    pub fn _14(self) -> &'a mut crate::W<REG> {
345        self.variant(Numbits::_14)
346    }
347    #[doc = "15 bits per character."]
348    #[inline(always)]
349    pub fn _15(self) -> &'a mut crate::W<REG> {
350        self.variant(Numbits::_15)
351    }
352}
353#[doc = "SPI Data width.\n\nValue on reset: 0"]
354#[derive(Clone, Copy, Debug, PartialEq, Eq)]
355#[repr(u8)]
356pub enum DataWidth {
357    #[doc = "0: 1 data pin."]
358    Mono = 0,
359    #[doc = "1: 2 data pins."]
360    Dual = 1,
361    #[doc = "2: 4 data pins."]
362    Quad = 2,
363}
364impl From<DataWidth> for u8 {
365    #[inline(always)]
366    fn from(variant: DataWidth) -> Self {
367        variant as _
368    }
369}
370impl crate::FieldSpec for DataWidth {
371    type Ux = u8;
372}
373impl crate::IsEnum for DataWidth {}
374#[doc = "Field `DATA_WIDTH` reader - SPI Data width."]
375pub type DataWidthR = crate::FieldReader<DataWidth>;
376impl DataWidthR {
377    #[doc = "Get enumerated values variant"]
378    #[inline(always)]
379    pub const fn variant(&self) -> Option<DataWidth> {
380        match self.bits {
381            0 => Some(DataWidth::Mono),
382            1 => Some(DataWidth::Dual),
383            2 => Some(DataWidth::Quad),
384            _ => None,
385        }
386    }
387    #[doc = "1 data pin."]
388    #[inline(always)]
389    pub fn is_mono(&self) -> bool {
390        *self == DataWidth::Mono
391    }
392    #[doc = "2 data pins."]
393    #[inline(always)]
394    pub fn is_dual(&self) -> bool {
395        *self == DataWidth::Dual
396    }
397    #[doc = "4 data pins."]
398    #[inline(always)]
399    pub fn is_quad(&self) -> bool {
400        *self == DataWidth::Quad
401    }
402}
403#[doc = "Field `DATA_WIDTH` writer - SPI Data width."]
404pub type DataWidthW<'a, REG> = crate::FieldWriter<'a, REG, 2, DataWidth>;
405impl<'a, REG> DataWidthW<'a, REG>
406where
407    REG: crate::Writable + crate::RegisterSpec,
408    REG::Ux: From<u8>,
409{
410    #[doc = "1 data pin."]
411    #[inline(always)]
412    pub fn mono(self) -> &'a mut crate::W<REG> {
413        self.variant(DataWidth::Mono)
414    }
415    #[doc = "2 data pins."]
416    #[inline(always)]
417    pub fn dual(self) -> &'a mut crate::W<REG> {
418        self.variant(DataWidth::Dual)
419    }
420    #[doc = "4 data pins."]
421    #[inline(always)]
422    pub fn quad(self) -> &'a mut crate::W<REG> {
423        self.variant(DataWidth::Quad)
424    }
425}
426#[doc = "Three Wire mode. MOSI/MISO pin (s) shared. Only Mono mode suports Four-Wire.\n\nValue on reset: 0"]
427#[derive(Clone, Copy, Debug, PartialEq, Eq)]
428pub enum ThreeWire {
429    #[doc = "0: Use four wire mode (Mono only)."]
430    Dis = 0,
431    #[doc = "1: Use three wire mode."]
432    En = 1,
433}
434impl From<ThreeWire> for bool {
435    #[inline(always)]
436    fn from(variant: ThreeWire) -> Self {
437        variant as u8 != 0
438    }
439}
440#[doc = "Field `THREE_WIRE` reader - Three Wire mode. MOSI/MISO pin (s) shared. Only Mono mode suports Four-Wire."]
441pub type ThreeWireR = crate::BitReader<ThreeWire>;
442impl ThreeWireR {
443    #[doc = "Get enumerated values variant"]
444    #[inline(always)]
445    pub const fn variant(&self) -> ThreeWire {
446        match self.bits {
447            false => ThreeWire::Dis,
448            true => ThreeWire::En,
449        }
450    }
451    #[doc = "Use four wire mode (Mono only)."]
452    #[inline(always)]
453    pub fn is_dis(&self) -> bool {
454        *self == ThreeWire::Dis
455    }
456    #[doc = "Use three wire mode."]
457    #[inline(always)]
458    pub fn is_en(&self) -> bool {
459        *self == ThreeWire::En
460    }
461}
462#[doc = "Field `THREE_WIRE` writer - Three Wire mode. MOSI/MISO pin (s) shared. Only Mono mode suports Four-Wire."]
463pub type ThreeWireW<'a, REG> = crate::BitWriter<'a, REG, ThreeWire>;
464impl<'a, REG> ThreeWireW<'a, REG>
465where
466    REG: crate::Writable + crate::RegisterSpec,
467{
468    #[doc = "Use four wire mode (Mono only)."]
469    #[inline(always)]
470    pub fn dis(self) -> &'a mut crate::W<REG> {
471        self.variant(ThreeWire::Dis)
472    }
473    #[doc = "Use three wire mode."]
474    #[inline(always)]
475    pub fn en(self) -> &'a mut crate::W<REG> {
476        self.variant(ThreeWire::En)
477    }
478}
479#[doc = "Slave Select Polarity, each Slave Select can have unique polarity.\n\nValue on reset: 0"]
480#[derive(Clone, Copy, Debug, PartialEq, Eq)]
481#[repr(u8)]
482pub enum SsPol {
483    #[doc = "1: SS0 active high."]
484    Ss0High = 1,
485    #[doc = "2: SS1 active high."]
486    Ss1High = 2,
487    #[doc = "4: SS2 active high."]
488    Ss2High = 4,
489    #[doc = "8: SS3 active high."]
490    Ss3High = 8,
491}
492impl From<SsPol> for u8 {
493    #[inline(always)]
494    fn from(variant: SsPol) -> Self {
495        variant as _
496    }
497}
498impl crate::FieldSpec for SsPol {
499    type Ux = u8;
500}
501impl crate::IsEnum for SsPol {}
502#[doc = "Field `SS_POL` reader - Slave Select Polarity, each Slave Select can have unique polarity."]
503pub type SsPolR = crate::FieldReader<SsPol>;
504impl SsPolR {
505    #[doc = "Get enumerated values variant"]
506    #[inline(always)]
507    pub const fn variant(&self) -> Option<SsPol> {
508        match self.bits {
509            1 => Some(SsPol::Ss0High),
510            2 => Some(SsPol::Ss1High),
511            4 => Some(SsPol::Ss2High),
512            8 => Some(SsPol::Ss3High),
513            _ => None,
514        }
515    }
516    #[doc = "SS0 active high."]
517    #[inline(always)]
518    pub fn is_ss0_high(&self) -> bool {
519        *self == SsPol::Ss0High
520    }
521    #[doc = "SS1 active high."]
522    #[inline(always)]
523    pub fn is_ss1_high(&self) -> bool {
524        *self == SsPol::Ss1High
525    }
526    #[doc = "SS2 active high."]
527    #[inline(always)]
528    pub fn is_ss2_high(&self) -> bool {
529        *self == SsPol::Ss2High
530    }
531    #[doc = "SS3 active high."]
532    #[inline(always)]
533    pub fn is_ss3_high(&self) -> bool {
534        *self == SsPol::Ss3High
535    }
536}
537#[doc = "Field `SS_POL` writer - Slave Select Polarity, each Slave Select can have unique polarity."]
538pub type SsPolW<'a, REG> = crate::FieldWriter<'a, REG, 8, SsPol>;
539impl<'a, REG> SsPolW<'a, REG>
540where
541    REG: crate::Writable + crate::RegisterSpec,
542    REG::Ux: From<u8>,
543{
544    #[doc = "SS0 active high."]
545    #[inline(always)]
546    pub fn ss0_high(self) -> &'a mut crate::W<REG> {
547        self.variant(SsPol::Ss0High)
548    }
549    #[doc = "SS1 active high."]
550    #[inline(always)]
551    pub fn ss1_high(self) -> &'a mut crate::W<REG> {
552        self.variant(SsPol::Ss1High)
553    }
554    #[doc = "SS2 active high."]
555    #[inline(always)]
556    pub fn ss2_high(self) -> &'a mut crate::W<REG> {
557        self.variant(SsPol::Ss2High)
558    }
559    #[doc = "SS3 active high."]
560    #[inline(always)]
561    pub fn ss3_high(self) -> &'a mut crate::W<REG> {
562        self.variant(SsPol::Ss3High)
563    }
564}
565impl R {
566    #[doc = "Bit 0 - Clock Phase."]
567    #[inline(always)]
568    pub fn clkpha(&self) -> ClkphaR {
569        ClkphaR::new((self.bits & 1) != 0)
570    }
571    #[doc = "Bit 1 - Clock Polarity."]
572    #[inline(always)]
573    pub fn clkpol(&self) -> ClkpolR {
574        ClkpolR::new(((self.bits >> 1) & 1) != 0)
575    }
576    #[doc = "Bits 8:11 - Number of Bits per character."]
577    #[inline(always)]
578    pub fn numbits(&self) -> NumbitsR {
579        NumbitsR::new(((self.bits >> 8) & 0x0f) as u8)
580    }
581    #[doc = "Bits 12:13 - SPI Data width."]
582    #[inline(always)]
583    pub fn data_width(&self) -> DataWidthR {
584        DataWidthR::new(((self.bits >> 12) & 3) as u8)
585    }
586    #[doc = "Bit 15 - Three Wire mode. MOSI/MISO pin (s) shared. Only Mono mode suports Four-Wire."]
587    #[inline(always)]
588    pub fn three_wire(&self) -> ThreeWireR {
589        ThreeWireR::new(((self.bits >> 15) & 1) != 0)
590    }
591    #[doc = "Bits 16:23 - Slave Select Polarity, each Slave Select can have unique polarity."]
592    #[inline(always)]
593    pub fn ss_pol(&self) -> SsPolR {
594        SsPolR::new(((self.bits >> 16) & 0xff) as u8)
595    }
596}
597impl W {
598    #[doc = "Bit 0 - Clock Phase."]
599    #[inline(always)]
600    pub fn clkpha(&mut self) -> ClkphaW<Ctrl2Spec> {
601        ClkphaW::new(self, 0)
602    }
603    #[doc = "Bit 1 - Clock Polarity."]
604    #[inline(always)]
605    pub fn clkpol(&mut self) -> ClkpolW<Ctrl2Spec> {
606        ClkpolW::new(self, 1)
607    }
608    #[doc = "Bits 8:11 - Number of Bits per character."]
609    #[inline(always)]
610    pub fn numbits(&mut self) -> NumbitsW<Ctrl2Spec> {
611        NumbitsW::new(self, 8)
612    }
613    #[doc = "Bits 12:13 - SPI Data width."]
614    #[inline(always)]
615    pub fn data_width(&mut self) -> DataWidthW<Ctrl2Spec> {
616        DataWidthW::new(self, 12)
617    }
618    #[doc = "Bit 15 - Three Wire mode. MOSI/MISO pin (s) shared. Only Mono mode suports Four-Wire."]
619    #[inline(always)]
620    pub fn three_wire(&mut self) -> ThreeWireW<Ctrl2Spec> {
621        ThreeWireW::new(self, 15)
622    }
623    #[doc = "Bits 16:23 - Slave Select Polarity, each Slave Select can have unique polarity."]
624    #[inline(always)]
625    pub fn ss_pol(&mut self) -> SsPolW<Ctrl2Spec> {
626        SsPolW::new(self, 16)
627    }
628}
629#[doc = "Register for controlling SPI peripheral.\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
630pub struct Ctrl2Spec;
631impl crate::RegisterSpec for Ctrl2Spec {
632    type Ux = u32;
633}
634#[doc = "`read()` method returns [`ctrl2::R`](R) reader structure"]
635impl crate::Readable for Ctrl2Spec {}
636#[doc = "`write(|w| ..)` method takes [`ctrl2::W`](W) writer structure"]
637impl crate::Writable for Ctrl2Spec {
638    type Safety = crate::Unsafe;
639    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
640    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
641}
642#[doc = "`reset()` method sets CTRL2 to value 0"]
643impl crate::Resettable for Ctrl2Spec {
644    const RESET_VALUE: u32 = 0;
645}
max78000_pac/spi0/ctrl2.rs

max78000_pac/spi0/
ctrl2.rs
