1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 inten: Inten,
5 intfl: Intfl,
6 _reserved2: [u8; 0xf8],
7 ch: [Ch; 4],
8}
9impl RegisterBlock {
10 #[doc = "0x00 - DMA Control Register."]
11 #[inline(always)]
12 pub const fn inten(&self) -> &Inten {
13 &self.inten
14 }
15 #[doc = "0x04 - DMA Interrupt Register."]
16 #[inline(always)]
17 pub const fn intfl(&self) -> &Intfl {
18 &self.intfl
19 }
20 #[doc = "0x100..0x180 - DMA Channel registers."]
21 #[inline(always)]
22 pub const fn ch(&self, n: usize) -> &Ch {
23 &self.ch[n]
24 }
25 #[doc = "Iterator for array of:"]
26 #[doc = "0x100..0x180 - DMA Channel registers."]
27 #[inline(always)]
28 pub fn ch_iter(&self) -> impl Iterator<Item = &Ch> {
29 self.ch.iter()
30 }
31}
32#[doc = "INTEN (rw) register accessor: DMA Control Register.\n\nYou can [`read`](crate::Reg::read) this register and get [`inten::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inten::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inten`]
33module"]
34#[doc(alias = "INTEN")]
35pub type Inten = crate::Reg<inten::IntenSpec>;
36#[doc = "DMA Control Register."]
37pub mod inten;
38#[doc = "INTFL (r) register accessor: DMA Interrupt Register.\n\nYou can [`read`](crate::Reg::read) this register and get [`intfl::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intfl`]
39module"]
40#[doc(alias = "INTFL")]
41pub type Intfl = crate::Reg<intfl::IntflSpec>;
42#[doc = "DMA Interrupt Register."]
43pub mod intfl;
44#[doc = "DMA Channel registers."]
45pub use self::ch::Ch;
46#[doc = r"Cluster"]
47#[doc = "DMA Channel registers."]
48pub mod ch;