max78000_pac/rtc/
oscctrl.rs

1#[doc = "Register `OSCCTRL` reader"]
2pub type R = crate::R<OscctrlSpec>;
3#[doc = "Register `OSCCTRL` writer"]
4pub type W = crate::W<OscctrlSpec>;
5#[doc = "Field `FILTER_EN` reader - Enables analog deglitch filter."]
6pub type FilterEnR = crate::BitReader;
7#[doc = "Field `FILTER_EN` writer - Enables analog deglitch filter."]
8pub type FilterEnW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `IBIAS_SEL` reader - If IBIAS_EN is 1, selects 4x,2x mode."]
10pub type IbiasSelR = crate::BitReader;
11#[doc = "Field `IBIAS_SEL` writer - If IBIAS_EN is 1, selects 4x,2x mode."]
12pub type IbiasSelW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `HYST_EN` reader - Enables high current hysteresis buffer."]
14pub type HystEnR = crate::BitReader;
15#[doc = "Field `HYST_EN` writer - Enables high current hysteresis buffer."]
16pub type HystEnW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `IBIAS_EN` reader - Enables higher 4x,2x current modes."]
18pub type IbiasEnR = crate::BitReader;
19#[doc = "Field `IBIAS_EN` writer - Enables higher 4x,2x current modes."]
20pub type IbiasEnW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BYPASS` reader - RTC Crystal Bypass"]
22pub type BypassR = crate::BitReader;
23#[doc = "Field `BYPASS` writer - RTC Crystal Bypass"]
24pub type BypassW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `SQW_32K` reader - RTC 32kHz Square Wave Output"]
26pub type Sqw32kR = crate::BitReader;
27#[doc = "Field `SQW_32K` writer - RTC 32kHz Square Wave Output"]
28pub type Sqw32kW<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30    #[doc = "Bit 0 - Enables analog deglitch filter."]
31    #[inline(always)]
32    pub fn filter_en(&self) -> FilterEnR {
33        FilterEnR::new((self.bits & 1) != 0)
34    }
35    #[doc = "Bit 1 - If IBIAS_EN is 1, selects 4x,2x mode."]
36    #[inline(always)]
37    pub fn ibias_sel(&self) -> IbiasSelR {
38        IbiasSelR::new(((self.bits >> 1) & 1) != 0)
39    }
40    #[doc = "Bit 2 - Enables high current hysteresis buffer."]
41    #[inline(always)]
42    pub fn hyst_en(&self) -> HystEnR {
43        HystEnR::new(((self.bits >> 2) & 1) != 0)
44    }
45    #[doc = "Bit 3 - Enables higher 4x,2x current modes."]
46    #[inline(always)]
47    pub fn ibias_en(&self) -> IbiasEnR {
48        IbiasEnR::new(((self.bits >> 3) & 1) != 0)
49    }
50    #[doc = "Bit 4 - RTC Crystal Bypass"]
51    #[inline(always)]
52    pub fn bypass(&self) -> BypassR {
53        BypassR::new(((self.bits >> 4) & 1) != 0)
54    }
55    #[doc = "Bit 5 - RTC 32kHz Square Wave Output"]
56    #[inline(always)]
57    pub fn sqw_32k(&self) -> Sqw32kR {
58        Sqw32kR::new(((self.bits >> 5) & 1) != 0)
59    }
60}
61impl W {
62    #[doc = "Bit 0 - Enables analog deglitch filter."]
63    #[inline(always)]
64    pub fn filter_en(&mut self) -> FilterEnW<OscctrlSpec> {
65        FilterEnW::new(self, 0)
66    }
67    #[doc = "Bit 1 - If IBIAS_EN is 1, selects 4x,2x mode."]
68    #[inline(always)]
69    pub fn ibias_sel(&mut self) -> IbiasSelW<OscctrlSpec> {
70        IbiasSelW::new(self, 1)
71    }
72    #[doc = "Bit 2 - Enables high current hysteresis buffer."]
73    #[inline(always)]
74    pub fn hyst_en(&mut self) -> HystEnW<OscctrlSpec> {
75        HystEnW::new(self, 2)
76    }
77    #[doc = "Bit 3 - Enables higher 4x,2x current modes."]
78    #[inline(always)]
79    pub fn ibias_en(&mut self) -> IbiasEnW<OscctrlSpec> {
80        IbiasEnW::new(self, 3)
81    }
82    #[doc = "Bit 4 - RTC Crystal Bypass"]
83    #[inline(always)]
84    pub fn bypass(&mut self) -> BypassW<OscctrlSpec> {
85        BypassW::new(self, 4)
86    }
87    #[doc = "Bit 5 - RTC 32kHz Square Wave Output"]
88    #[inline(always)]
89    pub fn sqw_32k(&mut self) -> Sqw32kW<OscctrlSpec> {
90        Sqw32kW::new(self, 5)
91    }
92}
93#[doc = "RTC Oscillator Control Register.\n\nYou can [`read`](crate::Reg::read) this register and get [`oscctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`oscctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
94pub struct OscctrlSpec;
95impl crate::RegisterSpec for OscctrlSpec {
96    type Ux = u32;
97}
98#[doc = "`read()` method returns [`oscctrl::R`](R) reader structure"]
99impl crate::Readable for OscctrlSpec {}
100#[doc = "`write(|w| ..)` method takes [`oscctrl::W`](W) writer structure"]
101impl crate::Writable for OscctrlSpec {
102    type Safety = crate::Unsafe;
103    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
104    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
105}
106#[doc = "`reset()` method sets OSCCTRL to value 0"]
107impl crate::Resettable for OscctrlSpec {
108    const RESET_VALUE: u32 = 0;
109}
max78000_pac/rtc/oscctrl.rs

max78000_pac/rtc/
oscctrl.rs
