1#[doc = "Register `RXCTRL0` reader"]
2pub type R = crate::R<RXCTRL0_SPEC>;
3#[doc = "Register `RXCTRL0` writer"]
4pub type W = crate::W<RXCTRL0_SPEC>;
5#[doc = "Field `DNR` reader - Do Not Respond."]
6pub type DNR_R = crate::BitReader<DNR_A>;
7#[doc = "Do Not Respond.\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum DNR_A {
10 #[doc = "0: Always respond to address match."]
11 RESPOND = 0,
12 #[doc = "1: Do not respond to address match when RX_FIFO is not empty."]
13 NOT_RESPOND_RX_FIFO_EMPTY = 1,
14}
15impl From<DNR_A> for bool {
16 #[inline(always)]
17 fn from(variant: DNR_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl DNR_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub fn variant(&self) -> DNR_A {
25 match self.bits {
26 false => DNR_A::RESPOND,
27 true => DNR_A::NOT_RESPOND_RX_FIFO_EMPTY,
28 }
29 }
30 #[doc = "Always respond to address match."]
31 #[inline(always)]
32 pub fn is_respond(&self) -> bool {
33 *self == DNR_A::RESPOND
34 }
35 #[doc = "Do not respond to address match when RX_FIFO is not empty."]
36 #[inline(always)]
37 pub fn is_not_respond_rx_fifo_empty(&self) -> bool {
38 *self == DNR_A::NOT_RESPOND_RX_FIFO_EMPTY
39 }
40}
41#[doc = "Field `DNR` writer - Do Not Respond."]
42pub type DNR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, DNR_A>;
43impl<'a, REG, const O: u8> DNR_W<'a, REG, O>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "Always respond to address match."]
48 #[inline(always)]
49 pub fn respond(self) -> &'a mut crate::W<REG> {
50 self.variant(DNR_A::RESPOND)
51 }
52 #[doc = "Do not respond to address match when RX_FIFO is not empty."]
53 #[inline(always)]
54 pub fn not_respond_rx_fifo_empty(self) -> &'a mut crate::W<REG> {
55 self.variant(DNR_A::NOT_RESPOND_RX_FIFO_EMPTY)
56 }
57}
58#[doc = "Field `RXFSH` reader - Receive FIFO Flush."]
59pub type RXFSH_R = crate::BitReader<RXFSH_A>;
60#[doc = "Receive FIFO Flush.\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RXFSH_A {
63 #[doc = "0: FIFO not flushed."]
64 NOT_FLUSHED = 0,
65 #[doc = "1: Flush RX_FIFO."]
66 FLUSH = 1,
67}
68impl From<RXFSH_A> for bool {
69 #[inline(always)]
70 fn from(variant: RXFSH_A) -> Self {
71 variant as u8 != 0
72 }
73}
74impl RXFSH_R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub fn variant(&self) -> RXFSH_A {
78 match self.bits {
79 false => RXFSH_A::NOT_FLUSHED,
80 true => RXFSH_A::FLUSH,
81 }
82 }
83 #[doc = "FIFO not flushed."]
84 #[inline(always)]
85 pub fn is_not_flushed(&self) -> bool {
86 *self == RXFSH_A::NOT_FLUSHED
87 }
88 #[doc = "Flush RX_FIFO."]
89 #[inline(always)]
90 pub fn is_flush(&self) -> bool {
91 *self == RXFSH_A::FLUSH
92 }
93}
94#[doc = "Field `RXFSH` writer - Receive FIFO Flush."]
95pub type RXFSH_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, RXFSH_A>;
96impl<'a, REG, const O: u8> RXFSH_W<'a, REG, O>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "FIFO not flushed."]
101 #[inline(always)]
102 pub fn not_flushed(self) -> &'a mut crate::W<REG> {
103 self.variant(RXFSH_A::NOT_FLUSHED)
104 }
105 #[doc = "Flush RX_FIFO."]
106 #[inline(always)]
107 pub fn flush(self) -> &'a mut crate::W<REG> {
108 self.variant(RXFSH_A::FLUSH)
109 }
110}
111#[doc = "Field `RXTH` reader - Receive FIFO Threshold."]
112pub type RXTH_R = crate::FieldReader;
113#[doc = "Field `RXTH` writer - Receive FIFO Threshold."]
114pub type RXTH_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>;
115impl R {
116 #[doc = "Bit 0 - Do Not Respond."]
117 #[inline(always)]
118 pub fn dnr(&self) -> DNR_R {
119 DNR_R::new((self.bits & 1) != 0)
120 }
121 #[doc = "Bit 7 - Receive FIFO Flush."]
122 #[inline(always)]
123 pub fn rxfsh(&self) -> RXFSH_R {
124 RXFSH_R::new(((self.bits >> 7) & 1) != 0)
125 }
126 #[doc = "Bits 8:11 - Receive FIFO Threshold."]
127 #[inline(always)]
128 pub fn rxth(&self) -> RXTH_R {
129 RXTH_R::new(((self.bits >> 8) & 0x0f) as u8)
130 }
131}
132impl W {
133 #[doc = "Bit 0 - Do Not Respond."]
134 #[inline(always)]
135 #[must_use]
136 pub fn dnr(&mut self) -> DNR_W<RXCTRL0_SPEC, 0> {
137 DNR_W::new(self)
138 }
139 #[doc = "Bit 7 - Receive FIFO Flush."]
140 #[inline(always)]
141 #[must_use]
142 pub fn rxfsh(&mut self) -> RXFSH_W<RXCTRL0_SPEC, 7> {
143 RXFSH_W::new(self)
144 }
145 #[doc = "Bits 8:11 - Receive FIFO Threshold."]
146 #[inline(always)]
147 #[must_use]
148 pub fn rxth(&mut self) -> RXTH_W<RXCTRL0_SPEC, 8> {
149 RXTH_W::new(self)
150 }
151 #[doc = r" Writes raw bits to the register."]
152 #[doc = r""]
153 #[doc = r" # Safety"]
154 #[doc = r""]
155 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
156 #[inline(always)]
157 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
158 self.bits = bits;
159 self
160 }
161}
162#[doc = "Receive Control Register 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
163pub struct RXCTRL0_SPEC;
164impl crate::RegisterSpec for RXCTRL0_SPEC {
165 type Ux = u32;
166}
167#[doc = "`read()` method returns [`rxctrl0::R`](R) reader structure"]
168impl crate::Readable for RXCTRL0_SPEC {}
169#[doc = "`write(|w| ..)` method takes [`rxctrl0::W`](W) writer structure"]
170impl crate::Writable for RXCTRL0_SPEC {
171 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
172 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
173}
174#[doc = "`reset()` method sets RXCTRL0 to value 0"]
175impl crate::Resettable for RXCTRL0_SPEC {
176 const RESET_VALUE: Self::Ux = 0;
177}