max32660/gcr/
rst1.rs

1#[doc = "Register `RST1` reader"]
2pub type R = crate::R<RST1_SPEC>;
3#[doc = "Register `RST1` writer"]
4pub type W = crate::W<RST1_SPEC>;
5#[doc = "Field `I2C1` reader - I2C1 Reset."]
6pub type I2C1_R = crate::BitReader<I2C1_A>;
7#[doc = "I2C1 Reset.\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum I2C1_A {
10    #[doc = "0: Reset complete."]
11    RESET_DONE = 0,
12    #[doc = "1: Reset in progress."]
13    BUSY = 1,
14}
15impl From<I2C1_A> for bool {
16    #[inline(always)]
17    fn from(variant: I2C1_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl I2C1_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub fn variant(&self) -> I2C1_A {
25        match self.bits {
26            false => I2C1_A::RESET_DONE,
27            true => I2C1_A::BUSY,
28        }
29    }
30    #[doc = "Reset complete."]
31    #[inline(always)]
32    pub fn is_reset_done(&self) -> bool {
33        *self == I2C1_A::RESET_DONE
34    }
35    #[doc = "Reset in progress."]
36    #[inline(always)]
37    pub fn is_busy(&self) -> bool {
38        *self == I2C1_A::BUSY
39    }
40}
41#[doc = "I2C1 Reset.\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq, Eq)]
43pub enum I2C1_AW {
44    #[doc = "1: Starts reset operation."]
45    RESET = 1,
46}
47impl From<I2C1_AW> for bool {
48    #[inline(always)]
49    fn from(variant: I2C1_AW) -> Self {
50        variant as u8 != 0
51    }
52}
53#[doc = "Field `I2C1` writer - I2C1 Reset."]
54pub type I2C1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, I2C1_AW>;
55impl<'a, REG, const O: u8> I2C1_W<'a, REG, O>
56where
57    REG: crate::Writable + crate::RegisterSpec,
58{
59    #[doc = "Starts reset operation."]
60    #[inline(always)]
61    pub fn reset(self) -> &'a mut crate::W<REG> {
62        self.variant(I2C1_AW::RESET)
63    }
64}
65impl R {
66    #[doc = "Bit 0 - I2C1 Reset."]
67    #[inline(always)]
68    pub fn i2c1(&self) -> I2C1_R {
69        I2C1_R::new((self.bits & 1) != 0)
70    }
71}
72impl W {
73    #[doc = "Bit 0 - I2C1 Reset."]
74    #[inline(always)]
75    #[must_use]
76    pub fn i2c1(&mut self) -> I2C1_W<RST1_SPEC, 0> {
77        I2C1_W::new(self)
78    }
79    #[doc = r" Writes raw bits to the register."]
80    #[doc = r""]
81    #[doc = r" # Safety"]
82    #[doc = r""]
83    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
84    #[inline(always)]
85    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
86        self.bits = bits;
87        self
88    }
89}
90#[doc = "Reset 1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
91pub struct RST1_SPEC;
92impl crate::RegisterSpec for RST1_SPEC {
93    type Ux = u32;
94}
95#[doc = "`read()` method returns [`rst1::R`](R) reader structure"]
96impl crate::Readable for RST1_SPEC {}
97#[doc = "`write(|w| ..)` method takes [`rst1::W`](W) writer structure"]
98impl crate::Writable for RST1_SPEC {
99    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
100    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
101}
102#[doc = "`reset()` method sets RST1 to value 0"]
103impl crate::Resettable for RST1_SPEC {
104    const RESET_VALUE: Self::Ux = 0;
105}
max32660/gcr/rst1.rs

max32660/gcr/
rst1.rs
