max3263x/uart0/
tx_fifo_ctrl.rs

1#[doc = "Register `TX_FIFO_CTRL` reader"]
2pub struct R(crate::R<TX_FIFO_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TX_FIFO_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TX_FIFO_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TX_FIFO_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TX_FIFO_CTRL` writer"]
17pub struct W(crate::W<TX_FIFO_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TX_FIFO_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TX_FIFO_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TX_FIFO_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `fifo_entry` reader - TX FIFO Entries"]
38pub type FIFO_ENTRY_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `fifo_ae_lvl` reader - TX FIFO AE Level"]
40pub type FIFO_AE_LVL_R = crate::FieldReader<u8, u8>;
41#[doc = "Field `fifo_ae_lvl` writer - TX FIFO AE Level"]
42pub type FIFO_AE_LVL_W<'a> = crate::FieldWriter<'a, u32, TX_FIFO_CTRL_SPEC, u8, u8, 6, 16>;
43impl R {
44    #[doc = "Bits 0:4 - TX FIFO Entries"]
45    #[inline(always)]
46    pub fn fifo_entry(&self) -> FIFO_ENTRY_R {
47        FIFO_ENTRY_R::new((self.bits & 0x1f) as u8)
48    }
49    #[doc = "Bits 16:21 - TX FIFO AE Level"]
50    #[inline(always)]
51    pub fn fifo_ae_lvl(&self) -> FIFO_AE_LVL_R {
52        FIFO_AE_LVL_R::new(((self.bits >> 16) & 0x3f) as u8)
53    }
54}
55impl W {
56    #[doc = "Bits 16:21 - TX FIFO AE Level"]
57    #[inline(always)]
58    pub fn fifo_ae_lvl(&mut self) -> FIFO_AE_LVL_W {
59        FIFO_AE_LVL_W::new(self)
60    }
61    #[doc = "Writes raw bits to the register."]
62    #[inline(always)]
63    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
64        self.0.bits(bits);
65        self
66    }
67}
68#[doc = "UART TX Fifo Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_fifo_ctrl](index.html) module"]
69pub struct TX_FIFO_CTRL_SPEC;
70impl crate::RegisterSpec for TX_FIFO_CTRL_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [tx_fifo_ctrl::R](R) reader structure"]
74impl crate::Readable for TX_FIFO_CTRL_SPEC {
75    type Reader = R;
76}
77#[doc = "`write(|w| ..)` method takes [tx_fifo_ctrl::W](W) writer structure"]
78impl crate::Writable for TX_FIFO_CTRL_SPEC {
79    type Writer = W;
80}
81#[doc = "`reset()` method sets TX_FIFO_CTRL to value 0"]
82impl crate::Resettable for TX_FIFO_CTRL_SPEC {
83    #[inline(always)]
84    fn reset_value() -> Self::Ux {
85        0
86    }
87}
max3263x/uart0/tx_fifo_ctrl.rs

max3263x/uart0/
tx_fifo_ctrl.rs
