max3263x/ioman/
spi2_ack.rs1#[doc = "Register `SPI2_ACK` reader"]
2pub struct R(crate::R<SPI2_ACK_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SPI2_ACK_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SPI2_ACK_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SPI2_ACK_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SPI2_ACK` writer"]
17pub struct W(crate::W<SPI2_ACK_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SPI2_ACK_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SPI2_ACK_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SPI2_ACK_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `mapping_ack` reader - SPI Master 2 I/O Mapping Acknowledge"]
38pub type MAPPING_ACK_R = crate::BitReader<bool>;
39#[doc = "Field `core_io_ack` reader - SPI Master 2 Core I/O Acknowledge"]
40pub type CORE_IO_ACK_R = crate::BitReader<bool>;
41#[doc = "Field `ss0_io_ack` reader - SPI Master 2 SS\\[0\\]
42I/O Acknowledge"]
43pub type SS0_IO_ACK_R = crate::BitReader<bool>;
44#[doc = "Field `ss1_io_ack` reader - SPI Master 2 SS\\[1\\]
45I/O Acknowledge"]
46pub type SS1_IO_ACK_R = crate::BitReader<bool>;
47#[doc = "Field `ss2_io_ack` reader - SPI Master 2 SS\\[2\\]
48I/O Acknowledge"]
49pub type SS2_IO_ACK_R = crate::BitReader<bool>;
50#[doc = "Field `sr0_io_req` reader - SPI Master 2 SR\\[0\\]
51I/O Acknowledge"]
52pub type SR0_IO_REQ_R = crate::BitReader<bool>;
53#[doc = "Field `sr1_io_req` reader - SPI Master 2 SR\\[1\\]
54I/O Acknowledge"]
55pub type SR1_IO_REQ_R = crate::BitReader<bool>;
56#[doc = "Field `quad_io_ack` reader - SPI Master 2 Quad I/O Acknowledge"]
57pub type QUAD_IO_ACK_R = crate::BitReader<bool>;
58#[doc = "Field `fast_mode` reader - SPI Master 2 Fast Mode Acknowledge"]
59pub type FAST_MODE_R = crate::BitReader<bool>;
60impl R {
61 #[doc = "Bit 0 - SPI Master 2 I/O Mapping Acknowledge"]
62 #[inline(always)]
63 pub fn mapping_ack(&self) -> MAPPING_ACK_R {
64 MAPPING_ACK_R::new((self.bits & 1) != 0)
65 }
66 #[doc = "Bit 4 - SPI Master 2 Core I/O Acknowledge"]
67 #[inline(always)]
68 pub fn core_io_ack(&self) -> CORE_IO_ACK_R {
69 CORE_IO_ACK_R::new(((self.bits >> 4) & 1) != 0)
70 }
71 #[doc = "Bit 8 - SPI Master 2 SS\\[0\\]
72I/O Acknowledge"]
73 #[inline(always)]
74 pub fn ss0_io_ack(&self) -> SS0_IO_ACK_R {
75 SS0_IO_ACK_R::new(((self.bits >> 8) & 1) != 0)
76 }
77 #[doc = "Bit 9 - SPI Master 2 SS\\[1\\]
78I/O Acknowledge"]
79 #[inline(always)]
80 pub fn ss1_io_ack(&self) -> SS1_IO_ACK_R {
81 SS1_IO_ACK_R::new(((self.bits >> 9) & 1) != 0)
82 }
83 #[doc = "Bit 10 - SPI Master 2 SS\\[2\\]
84I/O Acknowledge"]
85 #[inline(always)]
86 pub fn ss2_io_ack(&self) -> SS2_IO_ACK_R {
87 SS2_IO_ACK_R::new(((self.bits >> 10) & 1) != 0)
88 }
89 #[doc = "Bit 16 - SPI Master 2 SR\\[0\\]
90I/O Acknowledge"]
91 #[inline(always)]
92 pub fn sr0_io_req(&self) -> SR0_IO_REQ_R {
93 SR0_IO_REQ_R::new(((self.bits >> 16) & 1) != 0)
94 }
95 #[doc = "Bit 17 - SPI Master 2 SR\\[1\\]
96I/O Acknowledge"]
97 #[inline(always)]
98 pub fn sr1_io_req(&self) -> SR1_IO_REQ_R {
99 SR1_IO_REQ_R::new(((self.bits >> 17) & 1) != 0)
100 }
101 #[doc = "Bit 20 - SPI Master 2 Quad I/O Acknowledge"]
102 #[inline(always)]
103 pub fn quad_io_ack(&self) -> QUAD_IO_ACK_R {
104 QUAD_IO_ACK_R::new(((self.bits >> 20) & 1) != 0)
105 }
106 #[doc = "Bit 24 - SPI Master 2 Fast Mode Acknowledge"]
107 #[inline(always)]
108 pub fn fast_mode(&self) -> FAST_MODE_R {
109 FAST_MODE_R::new(((self.bits >> 24) & 1) != 0)
110 }
111}
112impl W {
113 #[doc = "Writes raw bits to the register."]
114 #[inline(always)]
115 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
116 self.0.bits(bits);
117 self
118 }
119}
120#[doc = "SPI Master 2 I/O Mode Acknowledge\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi2_ack](index.html) module"]
121pub struct SPI2_ACK_SPEC;
122impl crate::RegisterSpec for SPI2_ACK_SPEC {
123 type Ux = u32;
124}
125#[doc = "`read()` method returns [spi2_ack::R](R) reader structure"]
126impl crate::Readable for SPI2_ACK_SPEC {
127 type Reader = R;
128}
129#[doc = "`write(|w| ..)` method takes [spi2_ack::W](W) writer structure"]
130impl crate::Writable for SPI2_ACK_SPEC {
131 type Writer = W;
132}
133#[doc = "`reset()` method sets SPI2_ACK to value 0"]
134impl crate::Resettable for SPI2_ACK_SPEC {
135 #[inline(always)]
136 fn reset_value() -> Self::Ux {
137 0
138 }
139}