max3263x/spis/
gen_ctrl.rs1#[doc = "Register `GEN_CTRL` reader"]
2pub struct R(crate::R<GEN_CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<GEN_CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<GEN_CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<GEN_CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `GEN_CTRL` writer"]
17pub struct W(crate::W<GEN_CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<GEN_CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<GEN_CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<GEN_CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "SPI Slave Enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum SPI_SLAVE_EN_A {
40 #[doc = "0: Disable SPI Slave"]
41 DISABLED = 0,
42 #[doc = "1: Enable SPI Slave"]
43 ENABLED = 1,
44}
45impl From<SPI_SLAVE_EN_A> for bool {
46 #[inline(always)]
47 fn from(variant: SPI_SLAVE_EN_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `spi_slave_en` reader - SPI Slave Enable"]
52pub type SPI_SLAVE_EN_R = crate::BitReader<SPI_SLAVE_EN_A>;
53impl SPI_SLAVE_EN_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> SPI_SLAVE_EN_A {
57 match self.bits {
58 false => SPI_SLAVE_EN_A::DISABLED,
59 true => SPI_SLAVE_EN_A::ENABLED,
60 }
61 }
62 #[doc = "Checks if the value of the field is `DISABLED`"]
63 #[inline(always)]
64 pub fn is_disabled(&self) -> bool {
65 *self == SPI_SLAVE_EN_A::DISABLED
66 }
67 #[doc = "Checks if the value of the field is `ENABLED`"]
68 #[inline(always)]
69 pub fn is_enabled(&self) -> bool {
70 *self == SPI_SLAVE_EN_A::ENABLED
71 }
72}
73#[doc = "Field `spi_slave_en` writer - SPI Slave Enable"]
74pub type SPI_SLAVE_EN_W<'a> = crate::BitWriter<'a, u32, GEN_CTRL_SPEC, SPI_SLAVE_EN_A, 0>;
75impl<'a> SPI_SLAVE_EN_W<'a> {
76 #[doc = "Disable SPI Slave"]
77 #[inline(always)]
78 pub fn disabled(self) -> &'a mut W {
79 self.variant(SPI_SLAVE_EN_A::DISABLED)
80 }
81 #[doc = "Enable SPI Slave"]
82 #[inline(always)]
83 pub fn enabled(self) -> &'a mut W {
84 self.variant(SPI_SLAVE_EN_A::ENABLED)
85 }
86}
87#[doc = "TX FIFO Enable\n\nValue on reset: 0"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum TX_FIFO_EN_A {
90 #[doc = "0: Disable SPI Slave TX FIFO"]
91 DISABLED = 0,
92 #[doc = "1: Enable SPI Slave TX FIFO"]
93 ENABLED = 1,
94}
95impl From<TX_FIFO_EN_A> for bool {
96 #[inline(always)]
97 fn from(variant: TX_FIFO_EN_A) -> Self {
98 variant as u8 != 0
99 }
100}
101#[doc = "Field `tx_fifo_en` reader - TX FIFO Enable"]
102pub type TX_FIFO_EN_R = crate::BitReader<TX_FIFO_EN_A>;
103impl TX_FIFO_EN_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> TX_FIFO_EN_A {
107 match self.bits {
108 false => TX_FIFO_EN_A::DISABLED,
109 true => TX_FIFO_EN_A::ENABLED,
110 }
111 }
112 #[doc = "Checks if the value of the field is `DISABLED`"]
113 #[inline(always)]
114 pub fn is_disabled(&self) -> bool {
115 *self == TX_FIFO_EN_A::DISABLED
116 }
117 #[doc = "Checks if the value of the field is `ENABLED`"]
118 #[inline(always)]
119 pub fn is_enabled(&self) -> bool {
120 *self == TX_FIFO_EN_A::ENABLED
121 }
122}
123#[doc = "Field `tx_fifo_en` writer - TX FIFO Enable"]
124pub type TX_FIFO_EN_W<'a> = crate::BitWriter<'a, u32, GEN_CTRL_SPEC, TX_FIFO_EN_A, 1>;
125impl<'a> TX_FIFO_EN_W<'a> {
126 #[doc = "Disable SPI Slave TX FIFO"]
127 #[inline(always)]
128 pub fn disabled(self) -> &'a mut W {
129 self.variant(TX_FIFO_EN_A::DISABLED)
130 }
131 #[doc = "Enable SPI Slave TX FIFO"]
132 #[inline(always)]
133 pub fn enabled(self) -> &'a mut W {
134 self.variant(TX_FIFO_EN_A::ENABLED)
135 }
136}
137#[doc = "SPI RX FIFO Enable\n\nValue on reset: 0"]
138#[derive(Clone, Copy, Debug, PartialEq)]
139pub enum RX_FIFO_EN_A {
140 #[doc = "0: Disable SPI Slave RX FIFO"]
141 DISABLED = 0,
142 #[doc = "1: Enable SPI Slave RX FIFO"]
143 ENABLED = 1,
144}
145impl From<RX_FIFO_EN_A> for bool {
146 #[inline(always)]
147 fn from(variant: RX_FIFO_EN_A) -> Self {
148 variant as u8 != 0
149 }
150}
151#[doc = "Field `rx_fifo_en` reader - SPI RX FIFO Enable"]
152pub type RX_FIFO_EN_R = crate::BitReader<RX_FIFO_EN_A>;
153impl RX_FIFO_EN_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> RX_FIFO_EN_A {
157 match self.bits {
158 false => RX_FIFO_EN_A::DISABLED,
159 true => RX_FIFO_EN_A::ENABLED,
160 }
161 }
162 #[doc = "Checks if the value of the field is `DISABLED`"]
163 #[inline(always)]
164 pub fn is_disabled(&self) -> bool {
165 *self == RX_FIFO_EN_A::DISABLED
166 }
167 #[doc = "Checks if the value of the field is `ENABLED`"]
168 #[inline(always)]
169 pub fn is_enabled(&self) -> bool {
170 *self == RX_FIFO_EN_A::ENABLED
171 }
172}
173#[doc = "Field `rx_fifo_en` writer - SPI RX FIFO Enable"]
174pub type RX_FIFO_EN_W<'a> = crate::BitWriter<'a, u32, GEN_CTRL_SPEC, RX_FIFO_EN_A, 2>;
175impl<'a> RX_FIFO_EN_W<'a> {
176 #[doc = "Disable SPI Slave RX FIFO"]
177 #[inline(always)]
178 pub fn disabled(self) -> &'a mut W {
179 self.variant(RX_FIFO_EN_A::DISABLED)
180 }
181 #[doc = "Enable SPI Slave RX FIFO"]
182 #[inline(always)]
183 pub fn enabled(self) -> &'a mut W {
184 self.variant(RX_FIFO_EN_A::ENABLED)
185 }
186}
187#[doc = "Width of SPI Slave Data Transfers\n\nValue on reset: 0"]
188#[derive(Clone, Copy, Debug, PartialEq)]
189#[repr(u8)]
190pub enum DATA_WIDTH_A {
191 #[doc = "0: 1-bit Wide"]
192 X1 = 0,
193 #[doc = "1: 2-bit Wide/Dual"]
194 X2 = 1,
195 #[doc = "2: 4-bit Wide/Quad"]
196 X4 = 2,
197 #[doc = "3: Reserved for future use. Do not use."]
198 INVALID = 3,
199}
200impl From<DATA_WIDTH_A> for u8 {
201 #[inline(always)]
202 fn from(variant: DATA_WIDTH_A) -> Self {
203 variant as _
204 }
205}
206#[doc = "Field `data_width` reader - Width of SPI Slave Data Transfers"]
207pub type DATA_WIDTH_R = crate::FieldReader<u8, DATA_WIDTH_A>;
208impl DATA_WIDTH_R {
209 #[doc = "Get enumerated values variant"]
210 #[inline(always)]
211 pub fn variant(&self) -> DATA_WIDTH_A {
212 match self.bits {
213 0 => DATA_WIDTH_A::X1,
214 1 => DATA_WIDTH_A::X2,
215 2 => DATA_WIDTH_A::X4,
216 3 => DATA_WIDTH_A::INVALID,
217 _ => unreachable!(),
218 }
219 }
220 #[doc = "Checks if the value of the field is `X1`"]
221 #[inline(always)]
222 pub fn is_x1(&self) -> bool {
223 *self == DATA_WIDTH_A::X1
224 }
225 #[doc = "Checks if the value of the field is `X2`"]
226 #[inline(always)]
227 pub fn is_x2(&self) -> bool {
228 *self == DATA_WIDTH_A::X2
229 }
230 #[doc = "Checks if the value of the field is `X4`"]
231 #[inline(always)]
232 pub fn is_x4(&self) -> bool {
233 *self == DATA_WIDTH_A::X4
234 }
235 #[doc = "Checks if the value of the field is `INVALID`"]
236 #[inline(always)]
237 pub fn is_invalid(&self) -> bool {
238 *self == DATA_WIDTH_A::INVALID
239 }
240}
241#[doc = "Field `data_width` writer - Width of SPI Slave Data Transfers"]
242pub type DATA_WIDTH_W<'a> = crate::FieldWriterSafe<'a, u32, GEN_CTRL_SPEC, u8, DATA_WIDTH_A, 2, 4>;
243impl<'a> DATA_WIDTH_W<'a> {
244 #[doc = "1-bit Wide"]
245 #[inline(always)]
246 pub fn x1(self) -> &'a mut W {
247 self.variant(DATA_WIDTH_A::X1)
248 }
249 #[doc = "2-bit Wide/Dual"]
250 #[inline(always)]
251 pub fn x2(self) -> &'a mut W {
252 self.variant(DATA_WIDTH_A::X2)
253 }
254 #[doc = "4-bit Wide/Quad"]
255 #[inline(always)]
256 pub fn x4(self) -> &'a mut W {
257 self.variant(DATA_WIDTH_A::X4)
258 }
259 #[doc = "Reserved for future use. Do not use."]
260 #[inline(always)]
261 pub fn invalid(self) -> &'a mut W {
262 self.variant(DATA_WIDTH_A::INVALID)
263 }
264}
265#[doc = "Field `spi_mode` reader - Defines Clock Polarity (bit 17) and Clock Phase (bit 16), collectively referred to as SPI Mode."]
266pub type SPI_MODE_R = crate::FieldReader<u8, u8>;
267#[doc = "Field `spi_mode` writer - Defines Clock Polarity (bit 17) and Clock Phase (bit 16), collectively referred to as SPI Mode."]
268pub type SPI_MODE_W<'a> = crate::FieldWriter<'a, u32, GEN_CTRL_SPEC, u8, u8, 2, 16>;
269#[doc = "Invert TX Clock\n\nValue on reset: 0"]
270#[derive(Clone, Copy, Debug, PartialEq)]
271pub enum TX_CLK_INVERT_A {
272 #[doc = "0: No Effect"]
273 NO_EFFECT = 0,
274 #[doc = "1: Inverts the TX transmit clock such that outgoing data is updated on the opposite clock edge from that specified by spi_mode. Effectively, this inverts the value of the Clock Polarity bit from the value specified in spi_mode."]
275 INVERT = 1,
276}
277impl From<TX_CLK_INVERT_A> for bool {
278 #[inline(always)]
279 fn from(variant: TX_CLK_INVERT_A) -> Self {
280 variant as u8 != 0
281 }
282}
283#[doc = "Field `tx_clk_invert` reader - Invert TX Clock"]
284pub type TX_CLK_INVERT_R = crate::BitReader<TX_CLK_INVERT_A>;
285impl TX_CLK_INVERT_R {
286 #[doc = "Get enumerated values variant"]
287 #[inline(always)]
288 pub fn variant(&self) -> TX_CLK_INVERT_A {
289 match self.bits {
290 false => TX_CLK_INVERT_A::NO_EFFECT,
291 true => TX_CLK_INVERT_A::INVERT,
292 }
293 }
294 #[doc = "Checks if the value of the field is `NO_EFFECT`"]
295 #[inline(always)]
296 pub fn is_no_effect(&self) -> bool {
297 *self == TX_CLK_INVERT_A::NO_EFFECT
298 }
299 #[doc = "Checks if the value of the field is `INVERT`"]
300 #[inline(always)]
301 pub fn is_invert(&self) -> bool {
302 *self == TX_CLK_INVERT_A::INVERT
303 }
304}
305#[doc = "Field `tx_clk_invert` writer - Invert TX Clock"]
306pub type TX_CLK_INVERT_W<'a> = crate::BitWriter<'a, u32, GEN_CTRL_SPEC, TX_CLK_INVERT_A, 20>;
307impl<'a> TX_CLK_INVERT_W<'a> {
308 #[doc = "No Effect"]
309 #[inline(always)]
310 pub fn no_effect(self) -> &'a mut W {
311 self.variant(TX_CLK_INVERT_A::NO_EFFECT)
312 }
313 #[doc = "Inverts the TX transmit clock such that outgoing data is updated on the opposite clock edge from that specified by spi_mode. Effectively, this inverts the value of the Clock Polarity bit from the value specified in spi_mode."]
314 #[inline(always)]
315 pub fn invert(self) -> &'a mut W {
316 self.variant(TX_CLK_INVERT_A::INVERT)
317 }
318}
319#[doc = "Field `disable_parking` reader - Disable automatic resetting of SPI Slave on exit from LP Modes"]
320pub type DISABLE_PARKING_R = crate::BitReader<bool>;
321#[doc = "Field `disable_parking` writer - Disable automatic resetting of SPI Slave on exit from LP Modes"]
322pub type DISABLE_PARKING_W<'a> = crate::BitWriter<'a, u32, GEN_CTRL_SPEC, bool, 31>;
323impl R {
324 #[doc = "Bit 0 - SPI Slave Enable"]
325 #[inline(always)]
326 pub fn spi_slave_en(&self) -> SPI_SLAVE_EN_R {
327 SPI_SLAVE_EN_R::new((self.bits & 1) != 0)
328 }
329 #[doc = "Bit 1 - TX FIFO Enable"]
330 #[inline(always)]
331 pub fn tx_fifo_en(&self) -> TX_FIFO_EN_R {
332 TX_FIFO_EN_R::new(((self.bits >> 1) & 1) != 0)
333 }
334 #[doc = "Bit 2 - SPI RX FIFO Enable"]
335 #[inline(always)]
336 pub fn rx_fifo_en(&self) -> RX_FIFO_EN_R {
337 RX_FIFO_EN_R::new(((self.bits >> 2) & 1) != 0)
338 }
339 #[doc = "Bits 4:5 - Width of SPI Slave Data Transfers"]
340 #[inline(always)]
341 pub fn data_width(&self) -> DATA_WIDTH_R {
342 DATA_WIDTH_R::new(((self.bits >> 4) & 3) as u8)
343 }
344 #[doc = "Bits 16:17 - Defines Clock Polarity (bit 17) and Clock Phase (bit 16), collectively referred to as SPI Mode."]
345 #[inline(always)]
346 pub fn spi_mode(&self) -> SPI_MODE_R {
347 SPI_MODE_R::new(((self.bits >> 16) & 3) as u8)
348 }
349 #[doc = "Bit 20 - Invert TX Clock"]
350 #[inline(always)]
351 pub fn tx_clk_invert(&self) -> TX_CLK_INVERT_R {
352 TX_CLK_INVERT_R::new(((self.bits >> 20) & 1) != 0)
353 }
354 #[doc = "Bit 31 - Disable automatic resetting of SPI Slave on exit from LP Modes"]
355 #[inline(always)]
356 pub fn disable_parking(&self) -> DISABLE_PARKING_R {
357 DISABLE_PARKING_R::new(((self.bits >> 31) & 1) != 0)
358 }
359}
360impl W {
361 #[doc = "Bit 0 - SPI Slave Enable"]
362 #[inline(always)]
363 pub fn spi_slave_en(&mut self) -> SPI_SLAVE_EN_W {
364 SPI_SLAVE_EN_W::new(self)
365 }
366 #[doc = "Bit 1 - TX FIFO Enable"]
367 #[inline(always)]
368 pub fn tx_fifo_en(&mut self) -> TX_FIFO_EN_W {
369 TX_FIFO_EN_W::new(self)
370 }
371 #[doc = "Bit 2 - SPI RX FIFO Enable"]
372 #[inline(always)]
373 pub fn rx_fifo_en(&mut self) -> RX_FIFO_EN_W {
374 RX_FIFO_EN_W::new(self)
375 }
376 #[doc = "Bits 4:5 - Width of SPI Slave Data Transfers"]
377 #[inline(always)]
378 pub fn data_width(&mut self) -> DATA_WIDTH_W {
379 DATA_WIDTH_W::new(self)
380 }
381 #[doc = "Bits 16:17 - Defines Clock Polarity (bit 17) and Clock Phase (bit 16), collectively referred to as SPI Mode."]
382 #[inline(always)]
383 pub fn spi_mode(&mut self) -> SPI_MODE_W {
384 SPI_MODE_W::new(self)
385 }
386 #[doc = "Bit 20 - Invert TX Clock"]
387 #[inline(always)]
388 pub fn tx_clk_invert(&mut self) -> TX_CLK_INVERT_W {
389 TX_CLK_INVERT_W::new(self)
390 }
391 #[doc = "Bit 31 - Disable automatic resetting of SPI Slave on exit from LP Modes"]
392 #[inline(always)]
393 pub fn disable_parking(&mut self) -> DISABLE_PARKING_W {
394 DISABLE_PARKING_W::new(self)
395 }
396 #[doc = "Writes raw bits to the register."]
397 #[inline(always)]
398 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
399 self.0.bits(bits);
400 self
401 }
402}
403#[doc = "SPI Slave General Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gen_ctrl](index.html) module"]
404pub struct GEN_CTRL_SPEC;
405impl crate::RegisterSpec for GEN_CTRL_SPEC {
406 type Ux = u32;
407}
408#[doc = "`read()` method returns [gen_ctrl::R](R) reader structure"]
409impl crate::Readable for GEN_CTRL_SPEC {
410 type Reader = R;
411}
412#[doc = "`write(|w| ..)` method takes [gen_ctrl::W](W) writer structure"]
413impl crate::Writable for GEN_CTRL_SPEC {
414 type Writer = W;
415}
416#[doc = "`reset()` method sets GEN_CTRL to value 0"]
417impl crate::Resettable for GEN_CTRL_SPEC {
418 #[inline(always)]
419 fn reset_value() -> Self::Ux {
420 0
421 }
422}