max3263x/ioman/
spi1_req.rs1#[doc = "Register `SPI1_REQ` reader"]
2pub struct R(crate::R<SPI1_REQ_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SPI1_REQ_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SPI1_REQ_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SPI1_REQ_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SPI1_REQ` writer"]
17pub struct W(crate::W<SPI1_REQ_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SPI1_REQ_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SPI1_REQ_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SPI1_REQ_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `core_io_req` reader - SPI Master 1 Core I/O Request"]
38pub type CORE_IO_REQ_R = crate::BitReader<bool>;
39#[doc = "Field `core_io_req` writer - SPI Master 1 Core I/O Request"]
40pub type CORE_IO_REQ_W<'a> = crate::BitWriter<'a, u32, SPI1_REQ_SPEC, bool, 4>;
41#[doc = "Field `ss0_io_req` reader - SPI Master 1 SS\\[0\\]
42I/O Request"]
43pub type SS0_IO_REQ_R = crate::BitReader<bool>;
44#[doc = "Field `ss0_io_req` writer - SPI Master 1 SS\\[0\\]
45I/O Request"]
46pub type SS0_IO_REQ_W<'a> = crate::BitWriter<'a, u32, SPI1_REQ_SPEC, bool, 8>;
47#[doc = "Field `ss1_io_req` reader - SPI Master 1 SS\\[1\\]
48I/O Request"]
49pub type SS1_IO_REQ_R = crate::BitReader<bool>;
50#[doc = "Field `ss1_io_req` writer - SPI Master 1 SS\\[1\\]
51I/O Request"]
52pub type SS1_IO_REQ_W<'a> = crate::BitWriter<'a, u32, SPI1_REQ_SPEC, bool, 9>;
53#[doc = "Field `ss2_io_req` reader - SPI Master 1 SS\\[2\\]
54I/O Request"]
55pub type SS2_IO_REQ_R = crate::BitReader<bool>;
56#[doc = "Field `ss2_io_req` writer - SPI Master 1 SS\\[2\\]
57I/O Request"]
58pub type SS2_IO_REQ_W<'a> = crate::BitWriter<'a, u32, SPI1_REQ_SPEC, bool, 10>;
59#[doc = "Field `quad_io_req` reader - SPI Master 1 Quad I/O Request"]
60pub type QUAD_IO_REQ_R = crate::BitReader<bool>;
61#[doc = "Field `quad_io_req` writer - SPI Master 1 Quad I/O Request"]
62pub type QUAD_IO_REQ_W<'a> = crate::BitWriter<'a, u32, SPI1_REQ_SPEC, bool, 20>;
63#[doc = "Field `fast_mode` reader - SPI Master 1 Fast Mode Request"]
64pub type FAST_MODE_R = crate::BitReader<bool>;
65#[doc = "Field `fast_mode` writer - SPI Master 1 Fast Mode Request"]
66pub type FAST_MODE_W<'a> = crate::BitWriter<'a, u32, SPI1_REQ_SPEC, bool, 24>;
67impl R {
68 #[doc = "Bit 4 - SPI Master 1 Core I/O Request"]
69 #[inline(always)]
70 pub fn core_io_req(&self) -> CORE_IO_REQ_R {
71 CORE_IO_REQ_R::new(((self.bits >> 4) & 1) != 0)
72 }
73 #[doc = "Bit 8 - SPI Master 1 SS\\[0\\]
74I/O Request"]
75 #[inline(always)]
76 pub fn ss0_io_req(&self) -> SS0_IO_REQ_R {
77 SS0_IO_REQ_R::new(((self.bits >> 8) & 1) != 0)
78 }
79 #[doc = "Bit 9 - SPI Master 1 SS\\[1\\]
80I/O Request"]
81 #[inline(always)]
82 pub fn ss1_io_req(&self) -> SS1_IO_REQ_R {
83 SS1_IO_REQ_R::new(((self.bits >> 9) & 1) != 0)
84 }
85 #[doc = "Bit 10 - SPI Master 1 SS\\[2\\]
86I/O Request"]
87 #[inline(always)]
88 pub fn ss2_io_req(&self) -> SS2_IO_REQ_R {
89 SS2_IO_REQ_R::new(((self.bits >> 10) & 1) != 0)
90 }
91 #[doc = "Bit 20 - SPI Master 1 Quad I/O Request"]
92 #[inline(always)]
93 pub fn quad_io_req(&self) -> QUAD_IO_REQ_R {
94 QUAD_IO_REQ_R::new(((self.bits >> 20) & 1) != 0)
95 }
96 #[doc = "Bit 24 - SPI Master 1 Fast Mode Request"]
97 #[inline(always)]
98 pub fn fast_mode(&self) -> FAST_MODE_R {
99 FAST_MODE_R::new(((self.bits >> 24) & 1) != 0)
100 }
101}
102impl W {
103 #[doc = "Bit 4 - SPI Master 1 Core I/O Request"]
104 #[inline(always)]
105 pub fn core_io_req(&mut self) -> CORE_IO_REQ_W {
106 CORE_IO_REQ_W::new(self)
107 }
108 #[doc = "Bit 8 - SPI Master 1 SS\\[0\\]
109I/O Request"]
110 #[inline(always)]
111 pub fn ss0_io_req(&mut self) -> SS0_IO_REQ_W {
112 SS0_IO_REQ_W::new(self)
113 }
114 #[doc = "Bit 9 - SPI Master 1 SS\\[1\\]
115I/O Request"]
116 #[inline(always)]
117 pub fn ss1_io_req(&mut self) -> SS1_IO_REQ_W {
118 SS1_IO_REQ_W::new(self)
119 }
120 #[doc = "Bit 10 - SPI Master 1 SS\\[2\\]
121I/O Request"]
122 #[inline(always)]
123 pub fn ss2_io_req(&mut self) -> SS2_IO_REQ_W {
124 SS2_IO_REQ_W::new(self)
125 }
126 #[doc = "Bit 20 - SPI Master 1 Quad I/O Request"]
127 #[inline(always)]
128 pub fn quad_io_req(&mut self) -> QUAD_IO_REQ_W {
129 QUAD_IO_REQ_W::new(self)
130 }
131 #[doc = "Bit 24 - SPI Master 1 Fast Mode Request"]
132 #[inline(always)]
133 pub fn fast_mode(&mut self) -> FAST_MODE_W {
134 FAST_MODE_W::new(self)
135 }
136 #[doc = "Writes raw bits to the register."]
137 #[inline(always)]
138 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
139 self.0.bits(bits);
140 self
141 }
142}
143#[doc = "SPI Master 1 I/O Mode Request\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi1_req](index.html) module"]
144pub struct SPI1_REQ_SPEC;
145impl crate::RegisterSpec for SPI1_REQ_SPEC {
146 type Ux = u32;
147}
148#[doc = "`read()` method returns [spi1_req::R](R) reader structure"]
149impl crate::Readable for SPI1_REQ_SPEC {
150 type Reader = R;
151}
152#[doc = "`write(|w| ..)` method takes [spi1_req::W](W) writer structure"]
153impl crate::Writable for SPI1_REQ_SPEC {
154 type Writer = W;
155}
156#[doc = "`reset()` method sets SPI1_REQ to value 0"]
157impl crate::Resettable for SPI1_REQ_SPEC {
158 #[inline(always)]
159 fn reset_value() -> Self::Ux {
160 0
161 }
162}