// SPDX-License-Identifier: MIT OR Apache-2.0
//! Board support crate for the **M5Stack Fire27** (ESP32) and **CoreS3**
//! (ESP32-S3).
//!
//! Provides chip-agnostic peripheral drivers ([`driver`]), a shared async I2C
//! bus and reusable `embassy`-based IO task loops ([`io`]), board bring-up
//! helpers ([`board`]), and optional external-PSRAM heap integration ([`mem`],
//! behind the `psram` feature).
//!
//! Exactly one board feature must be enabled: `fire27` (xtensa-esp32) or
//! `cores3` (xtensa-esp32s3). Radio support (`ble`, `wifi`, `wifi-sta`, `coex`)
//! and `psram` are orthogonal opt-ins. See the README for the full feature
//! matrix and usage examples.
// `PsramSafe` (mem::) is a Send/Sync-style auto trait with negative impls for
// the atomic types — only pulled in when the PSRAM API is enabled.
// Link-only: pins esp-rom-sys to the version esp-hal's code actually needs
// (esp-hal 1.1.x under-constrains it to ~0.1 but calls a 0.1.4 API). Referenced
// here so the pin in Cargo.toml survives `cargo package` rather than being
// dropped as an unused dependency.
use esp_rom_sys as _;