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luaur-code-gen-0.1.3
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x86_64-unknown-linux-gnu
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luaur-code-gen 0.1.3
Native (A64/X64) code generation for Luau (Rust).
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avx_3_1.rs
avx_3_2.rs
avx_3_3.rs
avx_b.rs
avx_r.rs
avx_w.rs
avx_x.rs
call_fallback_yield.rs
codegen_assert.rs
codegen_target_a_64.rs
codegen_target_x_64.rs
dw_cf_a_advance_loc.rs
dw_cf_a_advance_loc_1.rs
dw_cf_a_advance_loc_2.rs
dw_cf_a_advance_loc_4.rs
dw_cf_a_def_cfa.rs
dw_cf_a_def_cfa_expression.rs
dw_cf_a_def_cfa_offset.rs
dw_cf_a_def_cfa_register.rs
dw_cf_a_hi_user.rs
dw_cf_a_lo_user.rs
dw_cf_a_nop.rs
dw_cf_a_offset.rs
dw_cf_a_offset_extended.rs
dw_cf_a_register.rs
dw_cf_a_remember_state.rs
dw_cf_a_restore.rs
dw_cf_a_restore_extended.rs
dw_cf_a_restore_state.rs
dw_cf_a_same_value.rs
dw_cf_a_set_loc.rs
dw_cf_a_undefined.rs
dw_reg_a_64_fp.rs
dw_reg_a_64_lr.rs
dw_reg_a_64_sp.rs
dw_reg_x_64_ra.rs
dw_reg_x_64_rax.rs
dw_reg_x_64_rbp.rs
dw_reg_x_64_rbx.rs
dw_reg_x_64_rcx.rs
dw_reg_x_64_rdi.rs
dw_reg_x_64_rdx.rs
dw_reg_x_64_rsi.rs
dw_reg_x_64_rsp.rs
has_op_a.rs
has_op_b.rs
has_op_c.rs
has_op_d.rs
has_op_e.rs
has_op_f.rs
has_op_g.rs
luacodegen_api.rs
mod.rs
mod_rm.rs
nominmax_code_allocator.rs
nominmax_code_block_unwind.rs
op_a.rs
op_b.rs
op_c.rs
op_d.rs
op_e.rs
op_f.rs
op_g.rs
op_plus_cc.rs
op_plus_reg.rs
opt_op_a.rs
opt_op_b.rs
opt_op_c.rs
opt_op_d.rs
opt_op_e.rs
opt_op_f.rs
opt_op_g.rs
register_frame_weak.rs
rex_b.rs
rex_force.rs
rex_r.rs
rex_w.rs
rex_w_bit.rs
rex_x.rs
sib.rs
uwop_alloc_large.rs
uwop_alloc_small.rs
uwop_push_machframe.rs
uwop_push_nonvol.rs
uwop_save_nonvol.rs
uwop_save_nonvol_far.rs
uwop_save_xmm_128.rs
uwop_save_xmm_128_far.rs
uwop_set_fpreg.rs
vm_interrupt.rs
vm_kv.rs
vm_patch_c.rs
vm_patch_e.rs
vm_protect.rs
vm_protect_pc.rs
vm_reg.rs
vm_uv.rs
win_32_lean_and_mean_code_allocator.rs
win_32_lean_and_mean_code_block_unwind.rs
1
pub
const
DW_REG_A64_LR
:
i32
=
30
;