[−][src]Crate ls7366
LS7366 Buffer encoder interface using embedded_hal
.
This driver should work with any SPI interface as long as it implements
the blocking embedded_hal
SPI traits
.
The library is built with no_std
.
Examples
Bare-minimum boilerplate to read from the buffer:
use ls7366::Ls7366; // --- snip --- // Construct a driver instance from the SPI interface, using default chip configurations. let mut spi_driver = Ls7366::new(some_hal_spi_object).unwrap(); // Loop and read the counter. loop { let result = spi_driver.get_count().unwrap(); sleep(Duration::from_secs(1)); println!("read data:= {:?}", result); } // --- snip ---
Advanced configuration
The LS7366 has two registers dedicated to configuring the chip's various functions:
Mdr0
and Mdr1
.
Configuring the chip can be accomplished by writing into these two registers.
Manually configuring these registers is not required when using Ls7366::new
.
- Build an instance of
Mdr0
andMdr1
with the desired configuration. - Write these instances into the relevant registers.
use ls7366::mdr0::{QuadCountMode, CycleCountMode, FilterClockDivisionFactor,IndexMode, Mdr0}; use ls7366::mdr1::{CounterMode, Mdr1}; use ls7366::{Ls7366, Target, Encodable}; use embedded_hal_mock::spi::Mock; use embedded_hal_mock::spi::Transaction as SpiTransaction; // --- snip --- let mdr0_configuration = Mdr0{ quad_count_mode: QuadCountMode::Quad2x, filter_clock : FilterClockDivisionFactor::Two, index_mode: IndexMode::ClearCntr, cycle_count_mode: CycleCountMode::SingleCycle, is_index_inverted: false }; let mdr1_configuration = Mdr1{ counter_mode: CounterMode::Byte3, // --- Snip --- }; driver.write_register(Target::Mdr0, &[mdr0_configuration.encode()]).unwrap(); driver.write_register(Target::Mdr1, &[mdr1_configuration.encode()]).unwrap();
Re-exports
pub use crate::ir::Action; |
pub use crate::ir::Target; |
Modules
ir | Instruction register. Performing any actions against the chip require writing into the IR at the start of the transaction. |
mdr0 | Primary configuration |
mdr1 | Secondary 8 bit configuration register. Holds configurations for the Counter Size, and the various occurrence flags. See datasheet for details. |
str_register | the Str register houses the chip's status. This register is Read only. |
Structs
Ls7366 | An LS8366 Quadrature encoder buffer |
Enums
Error |
Traits
Encodable | Any field that may be encoded into a u8 byte |