Struct lpc845_pac::usart0::cfg::CLKPOL_W

pub struct CLKPOL_W<'a> { /* fields omitted */ }

Field CLKPOL writer - Selects the clock polarity and sampling edge of received data in synchronous mode.

Implementations

impl<'a> CLKPOL_W<'a>

pub fn variant(self, variant: CLKPOL_A) -> &'a mut W

Writes variant to the field

pub fn falling_edge(self) -> &'a mut W

Falling edge. Un_RXD is sampled on the falling edge of SCLK.

pub fn rising_edge(self) -> &'a mut W

Rising edge. Un_RXD is sampled on the rising edge of SCLK.

pub fn set_bit(self) -> &'a mut W

Sets the field bit

pub fn clear_bit(self) -> &'a mut W

Clears the field bit

pub fn bit(self, value: bool) -> &'a mut W

Writes raw bits to the field