Struct lpc845_pac::i2c0::RegisterBlock[−][src]

#[repr(C)]
pub struct RegisterBlock {Show 15 fields
    pub cfg: Reg<CFG_SPEC>,
    pub stat: Reg<STAT_SPEC>,
    pub intenset: Reg<INTENSET_SPEC>,
    pub intenclr: Reg<INTENCLR_SPEC>,
    pub timeout: Reg<TIMEOUT_SPEC>,
    pub clkdiv: Reg<CLKDIV_SPEC>,
    pub intstat: Reg<INTSTAT_SPEC>,
    pub mstctl: Reg<MSTCTL_SPEC>,
    pub msttime: Reg<MSTTIME_SPEC>,
    pub mstdat: Reg<MSTDAT_SPEC>,
    pub slvctl: Reg<SLVCTL_SPEC>,
    pub slvdat: Reg<SLVDAT_SPEC>,
    pub slvadr: [Reg<SLVADR_SPEC>; 4],
    pub slvqual0: Reg<SLVQUAL0_SPEC>,
    pub monrxdat: Reg<MONRXDAT_SPEC>,
    // some fields omitted
}

Expand description

Register block

Fields

cfg: Reg<CFG_SPEC>

0x00 - Configuration for shared functions.

stat: Reg<STAT_SPEC>

0x04 - Status register for Master, Slave, and Monitor functions.

intenset: Reg<INTENSET_SPEC>

0x08 - Interrupt Enable Set and read register.

intenclr: Reg<INTENCLR_SPEC>

0x0c - Interrupt Enable Clear register.

timeout: Reg<TIMEOUT_SPEC>

0x10 - Time-out value register.

clkdiv: Reg<CLKDIV_SPEC>

0x14 - Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function.

intstat: Reg<INTSTAT_SPEC>

0x18 - Interrupt Status register for Master, Slave, and Monitor functions.

mstctl: Reg<MSTCTL_SPEC>

0x20 - Master control register.

msttime: Reg<MSTTIME_SPEC>

0x24 - Master timing configuration.

mstdat: Reg<MSTDAT_SPEC>

0x28 - Combined Master receiver and transmitter data register.

slvctl: Reg<SLVCTL_SPEC>

0x40 - Slave control register.

slvdat: Reg<SLVDAT_SPEC>

0x44 - Combined Slave receiver and transmitter data register.