Struct lpc845_pac::dma0::intenset0::W [−][src]
pub struct W(_);
Expand description
Register INTENSET0
writer
Implementations
Bits 0:24 - Interrupt Enable read and set for DMA channel n. Bit n corresponds to DMA channel n. The number of bits = number of DMA channels in this device. Other bits are reserved. 0 = interrupt for DMA channel is disabled. 1 = interrupt for DMA channel is enabled.
Methods from Deref<Target = W<INTENSET0_SPEC>>
Trait Implementations
Performs the conversion.