Struct lpc845_pac::dma0::intenset0::INTENSET0_SPEC

pub struct INTENSET0_SPEC;

Interrupt Enable read and Set for all DMA channels.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see intenset0 module

Trait Implementations

impl Readable for INTENSET0_SPEC

read() method returns intenset0::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for INTENSET0_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for INTENSET0_SPEC

reset() method sets INTENSET0 to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for INTENSET0_SPEC

write(|w| ..) method takes intenset0::W writer structure

type Writer = W

Writer type argument to write, et al.