lpc845_pac/ctimer0/
pwmc.rs1#[doc = "Register `PWMC` reader"]
2pub struct R(crate::R<PWMC_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PWMC_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PWMC_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PWMC_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PWMC` writer"]
17pub struct W(crate::W<PWMC_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PWMC_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PWMC_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PWMC_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "PWM mode enable for channel0.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum PWMEN0_A {
40 #[doc = "0: Match. CTIMERn_MAT0 is controlled by EM0."]
41 MATCH = 0,
42 #[doc = "1: PWM. PWM mode is enabled for CTIMERn_MAT0."]
43 PWM = 1,
44}
45impl From<PWMEN0_A> for bool {
46 #[inline(always)]
47 fn from(variant: PWMEN0_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `PWMEN0` reader - PWM mode enable for channel0."]
52pub struct PWMEN0_R(crate::FieldReader<bool, PWMEN0_A>);
53impl PWMEN0_R {
54 pub(crate) fn new(bits: bool) -> Self {
55 PWMEN0_R(crate::FieldReader::new(bits))
56 }
57 #[doc = r"Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> PWMEN0_A {
60 match self.bits {
61 false => PWMEN0_A::MATCH,
62 true => PWMEN0_A::PWM,
63 }
64 }
65 #[doc = "Checks if the value of the field is `MATCH`"]
66 #[inline(always)]
67 pub fn is_match(&self) -> bool {
68 **self == PWMEN0_A::MATCH
69 }
70 #[doc = "Checks if the value of the field is `PWM`"]
71 #[inline(always)]
72 pub fn is_pwm(&self) -> bool {
73 **self == PWMEN0_A::PWM
74 }
75}
76impl core::ops::Deref for PWMEN0_R {
77 type Target = crate::FieldReader<bool, PWMEN0_A>;
78 #[inline(always)]
79 fn deref(&self) -> &Self::Target {
80 &self.0
81 }
82}
83#[doc = "Field `PWMEN0` writer - PWM mode enable for channel0."]
84pub struct PWMEN0_W<'a> {
85 w: &'a mut W,
86}
87impl<'a> PWMEN0_W<'a> {
88 #[doc = r"Writes `variant` to the field"]
89 #[inline(always)]
90 pub fn variant(self, variant: PWMEN0_A) -> &'a mut W {
91 self.bit(variant.into())
92 }
93 #[doc = "Match. CTIMERn_MAT0 is controlled by EM0."]
94 #[inline(always)]
95 pub fn match_(self) -> &'a mut W {
96 self.variant(PWMEN0_A::MATCH)
97 }
98 #[doc = "PWM. PWM mode is enabled for CTIMERn_MAT0."]
99 #[inline(always)]
100 pub fn pwm(self) -> &'a mut W {
101 self.variant(PWMEN0_A::PWM)
102 }
103 #[doc = r"Sets the field bit"]
104 #[inline(always)]
105 pub fn set_bit(self) -> &'a mut W {
106 self.bit(true)
107 }
108 #[doc = r"Clears the field bit"]
109 #[inline(always)]
110 pub fn clear_bit(self) -> &'a mut W {
111 self.bit(false)
112 }
113 #[doc = r"Writes raw bits to the field"]
114 #[inline(always)]
115 pub fn bit(self, value: bool) -> &'a mut W {
116 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
117 self.w
118 }
119}
120#[doc = "PWM mode enable for channel1.\n\nValue on reset: 0"]
121#[derive(Clone, Copy, Debug, PartialEq)]
122pub enum PWMEN1_A {
123 #[doc = "0: Match. CTIMERn_MAT01 is controlled by EM1."]
124 MATCH = 0,
125 #[doc = "1: PWM. PWM mode is enabled for CTIMERn_MAT1."]
126 PWM = 1,
127}
128impl From<PWMEN1_A> for bool {
129 #[inline(always)]
130 fn from(variant: PWMEN1_A) -> Self {
131 variant as u8 != 0
132 }
133}
134#[doc = "Field `PWMEN1` reader - PWM mode enable for channel1."]
135pub struct PWMEN1_R(crate::FieldReader<bool, PWMEN1_A>);
136impl PWMEN1_R {
137 pub(crate) fn new(bits: bool) -> Self {
138 PWMEN1_R(crate::FieldReader::new(bits))
139 }
140 #[doc = r"Get enumerated values variant"]
141 #[inline(always)]
142 pub fn variant(&self) -> PWMEN1_A {
143 match self.bits {
144 false => PWMEN1_A::MATCH,
145 true => PWMEN1_A::PWM,
146 }
147 }
148 #[doc = "Checks if the value of the field is `MATCH`"]
149 #[inline(always)]
150 pub fn is_match(&self) -> bool {
151 **self == PWMEN1_A::MATCH
152 }
153 #[doc = "Checks if the value of the field is `PWM`"]
154 #[inline(always)]
155 pub fn is_pwm(&self) -> bool {
156 **self == PWMEN1_A::PWM
157 }
158}
159impl core::ops::Deref for PWMEN1_R {
160 type Target = crate::FieldReader<bool, PWMEN1_A>;
161 #[inline(always)]
162 fn deref(&self) -> &Self::Target {
163 &self.0
164 }
165}
166#[doc = "Field `PWMEN1` writer - PWM mode enable for channel1."]
167pub struct PWMEN1_W<'a> {
168 w: &'a mut W,
169}
170impl<'a> PWMEN1_W<'a> {
171 #[doc = r"Writes `variant` to the field"]
172 #[inline(always)]
173 pub fn variant(self, variant: PWMEN1_A) -> &'a mut W {
174 self.bit(variant.into())
175 }
176 #[doc = "Match. CTIMERn_MAT01 is controlled by EM1."]
177 #[inline(always)]
178 pub fn match_(self) -> &'a mut W {
179 self.variant(PWMEN1_A::MATCH)
180 }
181 #[doc = "PWM. PWM mode is enabled for CTIMERn_MAT1."]
182 #[inline(always)]
183 pub fn pwm(self) -> &'a mut W {
184 self.variant(PWMEN1_A::PWM)
185 }
186 #[doc = r"Sets the field bit"]
187 #[inline(always)]
188 pub fn set_bit(self) -> &'a mut W {
189 self.bit(true)
190 }
191 #[doc = r"Clears the field bit"]
192 #[inline(always)]
193 pub fn clear_bit(self) -> &'a mut W {
194 self.bit(false)
195 }
196 #[doc = r"Writes raw bits to the field"]
197 #[inline(always)]
198 pub fn bit(self, value: bool) -> &'a mut W {
199 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
200 self.w
201 }
202}
203#[doc = "PWM mode enable for channel2.\n\nValue on reset: 0"]
204#[derive(Clone, Copy, Debug, PartialEq)]
205pub enum PWMEN2_A {
206 #[doc = "0: Match. CTIMERn_MAT2 is controlled by EM2."]
207 MATCH = 0,
208 #[doc = "1: PWM. PWM mode is enabled for CTIMERn_MAT2."]
209 PWM = 1,
210}
211impl From<PWMEN2_A> for bool {
212 #[inline(always)]
213 fn from(variant: PWMEN2_A) -> Self {
214 variant as u8 != 0
215 }
216}
217#[doc = "Field `PWMEN2` reader - PWM mode enable for channel2."]
218pub struct PWMEN2_R(crate::FieldReader<bool, PWMEN2_A>);
219impl PWMEN2_R {
220 pub(crate) fn new(bits: bool) -> Self {
221 PWMEN2_R(crate::FieldReader::new(bits))
222 }
223 #[doc = r"Get enumerated values variant"]
224 #[inline(always)]
225 pub fn variant(&self) -> PWMEN2_A {
226 match self.bits {
227 false => PWMEN2_A::MATCH,
228 true => PWMEN2_A::PWM,
229 }
230 }
231 #[doc = "Checks if the value of the field is `MATCH`"]
232 #[inline(always)]
233 pub fn is_match(&self) -> bool {
234 **self == PWMEN2_A::MATCH
235 }
236 #[doc = "Checks if the value of the field is `PWM`"]
237 #[inline(always)]
238 pub fn is_pwm(&self) -> bool {
239 **self == PWMEN2_A::PWM
240 }
241}
242impl core::ops::Deref for PWMEN2_R {
243 type Target = crate::FieldReader<bool, PWMEN2_A>;
244 #[inline(always)]
245 fn deref(&self) -> &Self::Target {
246 &self.0
247 }
248}
249#[doc = "Field `PWMEN2` writer - PWM mode enable for channel2."]
250pub struct PWMEN2_W<'a> {
251 w: &'a mut W,
252}
253impl<'a> PWMEN2_W<'a> {
254 #[doc = r"Writes `variant` to the field"]
255 #[inline(always)]
256 pub fn variant(self, variant: PWMEN2_A) -> &'a mut W {
257 self.bit(variant.into())
258 }
259 #[doc = "Match. CTIMERn_MAT2 is controlled by EM2."]
260 #[inline(always)]
261 pub fn match_(self) -> &'a mut W {
262 self.variant(PWMEN2_A::MATCH)
263 }
264 #[doc = "PWM. PWM mode is enabled for CTIMERn_MAT2."]
265 #[inline(always)]
266 pub fn pwm(self) -> &'a mut W {
267 self.variant(PWMEN2_A::PWM)
268 }
269 #[doc = r"Sets the field bit"]
270 #[inline(always)]
271 pub fn set_bit(self) -> &'a mut W {
272 self.bit(true)
273 }
274 #[doc = r"Clears the field bit"]
275 #[inline(always)]
276 pub fn clear_bit(self) -> &'a mut W {
277 self.bit(false)
278 }
279 #[doc = r"Writes raw bits to the field"]
280 #[inline(always)]
281 pub fn bit(self, value: bool) -> &'a mut W {
282 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
283 self.w
284 }
285}
286#[doc = "PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle.\n\nValue on reset: 0"]
287#[derive(Clone, Copy, Debug, PartialEq)]
288pub enum PWMEN3_A {
289 #[doc = "0: Match. CTIMERn_MAT3 is controlled by EM3."]
290 MATCH = 0,
291 #[doc = "1: PWM. PWM mode is enabled for CT132Bn_MAT3."]
292 PWM = 1,
293}
294impl From<PWMEN3_A> for bool {
295 #[inline(always)]
296 fn from(variant: PWMEN3_A) -> Self {
297 variant as u8 != 0
298 }
299}
300#[doc = "Field `PWMEN3` reader - PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle."]
301pub struct PWMEN3_R(crate::FieldReader<bool, PWMEN3_A>);
302impl PWMEN3_R {
303 pub(crate) fn new(bits: bool) -> Self {
304 PWMEN3_R(crate::FieldReader::new(bits))
305 }
306 #[doc = r"Get enumerated values variant"]
307 #[inline(always)]
308 pub fn variant(&self) -> PWMEN3_A {
309 match self.bits {
310 false => PWMEN3_A::MATCH,
311 true => PWMEN3_A::PWM,
312 }
313 }
314 #[doc = "Checks if the value of the field is `MATCH`"]
315 #[inline(always)]
316 pub fn is_match(&self) -> bool {
317 **self == PWMEN3_A::MATCH
318 }
319 #[doc = "Checks if the value of the field is `PWM`"]
320 #[inline(always)]
321 pub fn is_pwm(&self) -> bool {
322 **self == PWMEN3_A::PWM
323 }
324}
325impl core::ops::Deref for PWMEN3_R {
326 type Target = crate::FieldReader<bool, PWMEN3_A>;
327 #[inline(always)]
328 fn deref(&self) -> &Self::Target {
329 &self.0
330 }
331}
332#[doc = "Field `PWMEN3` writer - PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle."]
333pub struct PWMEN3_W<'a> {
334 w: &'a mut W,
335}
336impl<'a> PWMEN3_W<'a> {
337 #[doc = r"Writes `variant` to the field"]
338 #[inline(always)]
339 pub fn variant(self, variant: PWMEN3_A) -> &'a mut W {
340 self.bit(variant.into())
341 }
342 #[doc = "Match. CTIMERn_MAT3 is controlled by EM3."]
343 #[inline(always)]
344 pub fn match_(self) -> &'a mut W {
345 self.variant(PWMEN3_A::MATCH)
346 }
347 #[doc = "PWM. PWM mode is enabled for CT132Bn_MAT3."]
348 #[inline(always)]
349 pub fn pwm(self) -> &'a mut W {
350 self.variant(PWMEN3_A::PWM)
351 }
352 #[doc = r"Sets the field bit"]
353 #[inline(always)]
354 pub fn set_bit(self) -> &'a mut W {
355 self.bit(true)
356 }
357 #[doc = r"Clears the field bit"]
358 #[inline(always)]
359 pub fn clear_bit(self) -> &'a mut W {
360 self.bit(false)
361 }
362 #[doc = r"Writes raw bits to the field"]
363 #[inline(always)]
364 pub fn bit(self, value: bool) -> &'a mut W {
365 self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
366 self.w
367 }
368}
369impl R {
370 #[doc = "Bit 0 - PWM mode enable for channel0."]
371 #[inline(always)]
372 pub fn pwmen0(&self) -> PWMEN0_R {
373 PWMEN0_R::new((self.bits & 0x01) != 0)
374 }
375 #[doc = "Bit 1 - PWM mode enable for channel1."]
376 #[inline(always)]
377 pub fn pwmen1(&self) -> PWMEN1_R {
378 PWMEN1_R::new(((self.bits >> 1) & 0x01) != 0)
379 }
380 #[doc = "Bit 2 - PWM mode enable for channel2."]
381 #[inline(always)]
382 pub fn pwmen2(&self) -> PWMEN2_R {
383 PWMEN2_R::new(((self.bits >> 2) & 0x01) != 0)
384 }
385 #[doc = "Bit 3 - PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle."]
386 #[inline(always)]
387 pub fn pwmen3(&self) -> PWMEN3_R {
388 PWMEN3_R::new(((self.bits >> 3) & 0x01) != 0)
389 }
390}
391impl W {
392 #[doc = "Bit 0 - PWM mode enable for channel0."]
393 #[inline(always)]
394 pub fn pwmen0(&mut self) -> PWMEN0_W {
395 PWMEN0_W { w: self }
396 }
397 #[doc = "Bit 1 - PWM mode enable for channel1."]
398 #[inline(always)]
399 pub fn pwmen1(&mut self) -> PWMEN1_W {
400 PWMEN1_W { w: self }
401 }
402 #[doc = "Bit 2 - PWM mode enable for channel2."]
403 #[inline(always)]
404 pub fn pwmen2(&mut self) -> PWMEN2_W {
405 PWMEN2_W { w: self }
406 }
407 #[doc = "Bit 3 - PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle."]
408 #[inline(always)]
409 pub fn pwmen3(&mut self) -> PWMEN3_W {
410 PWMEN3_W { w: self }
411 }
412 #[doc = "Writes raw bits to the register."]
413 #[inline(always)]
414 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
415 self.0.bits(bits);
416 self
417 }
418}
419#[doc = "PWM Control Register. The PWMCON enables PWM mode for the external match pins.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwmc](index.html) module"]
420pub struct PWMC_SPEC;
421impl crate::RegisterSpec for PWMC_SPEC {
422 type Ux = u32;
423}
424#[doc = "`read()` method returns [pwmc::R](R) reader structure"]
425impl crate::Readable for PWMC_SPEC {
426 type Reader = R;
427}
428#[doc = "`write(|w| ..)` method takes [pwmc::W](W) writer structure"]
429impl crate::Writable for PWMC_SPEC {
430 type Writer = W;
431}
432#[doc = "`reset()` method sets PWMC to value 0"]
433impl crate::Resettable for PWMC_SPEC {
434 #[inline(always)]
435 fn reset_value() -> Self::Ux {
436 0
437 }
438}