1#[doc = "Register `SYSAHBCLKCTRL0` reader"]
2pub struct R(crate::R<SYSAHBCLKCTRL0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SYSAHBCLKCTRL0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SYSAHBCLKCTRL0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SYSAHBCLKCTRL0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SYSAHBCLKCTRL0` writer"]
17pub struct W(crate::W<SYSAHBCLKCTRL0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SYSAHBCLKCTRL0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SYSAHBCLKCTRL0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SYSAHBCLKCTRL0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SYS` reader - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
38pub struct SYS_R(crate::FieldReader<bool, bool>);
39impl SYS_R {
40 pub(crate) fn new(bits: bool) -> Self {
41 SYS_R(crate::FieldReader::new(bits))
42 }
43}
44impl core::ops::Deref for SYS_R {
45 type Target = crate::FieldReader<bool, bool>;
46 #[inline(always)]
47 fn deref(&self) -> &Self::Target {
48 &self.0
49 }
50}
51#[doc = "Field `SYS` writer - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
52pub struct SYS_W<'a> {
53 w: &'a mut W,
54}
55impl<'a> SYS_W<'a> {
56 #[doc = r"Sets the field bit"]
57 #[inline(always)]
58 pub fn set_bit(self) -> &'a mut W {
59 self.bit(true)
60 }
61 #[doc = r"Clears the field bit"]
62 #[inline(always)]
63 pub fn clear_bit(self) -> &'a mut W {
64 self.bit(false)
65 }
66 #[doc = r"Writes raw bits to the field"]
67 #[inline(always)]
68 pub fn bit(self, value: bool) -> &'a mut W {
69 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
70 self.w
71 }
72}
73#[doc = "Enables clock for ROM.\n\nValue on reset: 1"]
74#[derive(Clone, Copy, Debug, PartialEq)]
75pub enum ROM_A {
76 #[doc = "0: disable"]
77 DISABLE = 0,
78 #[doc = "1: enable"]
79 ENABLE = 1,
80}
81impl From<ROM_A> for bool {
82 #[inline(always)]
83 fn from(variant: ROM_A) -> Self {
84 variant as u8 != 0
85 }
86}
87#[doc = "Field `ROM` reader - Enables clock for ROM."]
88pub struct ROM_R(crate::FieldReader<bool, ROM_A>);
89impl ROM_R {
90 pub(crate) fn new(bits: bool) -> Self {
91 ROM_R(crate::FieldReader::new(bits))
92 }
93 #[doc = r"Get enumerated values variant"]
94 #[inline(always)]
95 pub fn variant(&self) -> ROM_A {
96 match self.bits {
97 false => ROM_A::DISABLE,
98 true => ROM_A::ENABLE,
99 }
100 }
101 #[doc = "Checks if the value of the field is `DISABLE`"]
102 #[inline(always)]
103 pub fn is_disable(&self) -> bool {
104 **self == ROM_A::DISABLE
105 }
106 #[doc = "Checks if the value of the field is `ENABLE`"]
107 #[inline(always)]
108 pub fn is_enable(&self) -> bool {
109 **self == ROM_A::ENABLE
110 }
111}
112impl core::ops::Deref for ROM_R {
113 type Target = crate::FieldReader<bool, ROM_A>;
114 #[inline(always)]
115 fn deref(&self) -> &Self::Target {
116 &self.0
117 }
118}
119#[doc = "Field `ROM` writer - Enables clock for ROM."]
120pub struct ROM_W<'a> {
121 w: &'a mut W,
122}
123impl<'a> ROM_W<'a> {
124 #[doc = r"Writes `variant` to the field"]
125 #[inline(always)]
126 pub fn variant(self, variant: ROM_A) -> &'a mut W {
127 self.bit(variant.into())
128 }
129 #[doc = "disable"]
130 #[inline(always)]
131 pub fn disable(self) -> &'a mut W {
132 self.variant(ROM_A::DISABLE)
133 }
134 #[doc = "enable"]
135 #[inline(always)]
136 pub fn enable(self) -> &'a mut W {
137 self.variant(ROM_A::ENABLE)
138 }
139 #[doc = r"Sets the field bit"]
140 #[inline(always)]
141 pub fn set_bit(self) -> &'a mut W {
142 self.bit(true)
143 }
144 #[doc = r"Clears the field bit"]
145 #[inline(always)]
146 pub fn clear_bit(self) -> &'a mut W {
147 self.bit(false)
148 }
149 #[doc = r"Writes raw bits to the field"]
150 #[inline(always)]
151 pub fn bit(self, value: bool) -> &'a mut W {
152 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
153 self.w
154 }
155}
156#[doc = "Enables clock for SRAM0 and SRAM1.\n\nValue on reset: 1"]
157#[derive(Clone, Copy, Debug, PartialEq)]
158pub enum RAM0_1_A {
159 #[doc = "0: disable"]
160 DISABLE = 0,
161 #[doc = "1: enable"]
162 ENABLE = 1,
163}
164impl From<RAM0_1_A> for bool {
165 #[inline(always)]
166 fn from(variant: RAM0_1_A) -> Self {
167 variant as u8 != 0
168 }
169}
170#[doc = "Field `RAM0_1` reader - Enables clock for SRAM0 and SRAM1."]
171pub struct RAM0_1_R(crate::FieldReader<bool, RAM0_1_A>);
172impl RAM0_1_R {
173 pub(crate) fn new(bits: bool) -> Self {
174 RAM0_1_R(crate::FieldReader::new(bits))
175 }
176 #[doc = r"Get enumerated values variant"]
177 #[inline(always)]
178 pub fn variant(&self) -> RAM0_1_A {
179 match self.bits {
180 false => RAM0_1_A::DISABLE,
181 true => RAM0_1_A::ENABLE,
182 }
183 }
184 #[doc = "Checks if the value of the field is `DISABLE`"]
185 #[inline(always)]
186 pub fn is_disable(&self) -> bool {
187 **self == RAM0_1_A::DISABLE
188 }
189 #[doc = "Checks if the value of the field is `ENABLE`"]
190 #[inline(always)]
191 pub fn is_enable(&self) -> bool {
192 **self == RAM0_1_A::ENABLE
193 }
194}
195impl core::ops::Deref for RAM0_1_R {
196 type Target = crate::FieldReader<bool, RAM0_1_A>;
197 #[inline(always)]
198 fn deref(&self) -> &Self::Target {
199 &self.0
200 }
201}
202#[doc = "Field `RAM0_1` writer - Enables clock for SRAM0 and SRAM1."]
203pub struct RAM0_1_W<'a> {
204 w: &'a mut W,
205}
206impl<'a> RAM0_1_W<'a> {
207 #[doc = r"Writes `variant` to the field"]
208 #[inline(always)]
209 pub fn variant(self, variant: RAM0_1_A) -> &'a mut W {
210 self.bit(variant.into())
211 }
212 #[doc = "disable"]
213 #[inline(always)]
214 pub fn disable(self) -> &'a mut W {
215 self.variant(RAM0_1_A::DISABLE)
216 }
217 #[doc = "enable"]
218 #[inline(always)]
219 pub fn enable(self) -> &'a mut W {
220 self.variant(RAM0_1_A::ENABLE)
221 }
222 #[doc = r"Sets the field bit"]
223 #[inline(always)]
224 pub fn set_bit(self) -> &'a mut W {
225 self.bit(true)
226 }
227 #[doc = r"Clears the field bit"]
228 #[inline(always)]
229 pub fn clear_bit(self) -> &'a mut W {
230 self.bit(false)
231 }
232 #[doc = r"Writes raw bits to the field"]
233 #[inline(always)]
234 pub fn bit(self, value: bool) -> &'a mut W {
235 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
236 self.w
237 }
238}
239#[doc = "Enables clock for flash.\n\nValue on reset: 1"]
240#[derive(Clone, Copy, Debug, PartialEq)]
241pub enum FLASH_A {
242 #[doc = "0: disable"]
243 DISABLE = 0,
244 #[doc = "1: enable"]
245 ENABLE = 1,
246}
247impl From<FLASH_A> for bool {
248 #[inline(always)]
249 fn from(variant: FLASH_A) -> Self {
250 variant as u8 != 0
251 }
252}
253#[doc = "Field `FLASH` reader - Enables clock for flash."]
254pub struct FLASH_R(crate::FieldReader<bool, FLASH_A>);
255impl FLASH_R {
256 pub(crate) fn new(bits: bool) -> Self {
257 FLASH_R(crate::FieldReader::new(bits))
258 }
259 #[doc = r"Get enumerated values variant"]
260 #[inline(always)]
261 pub fn variant(&self) -> FLASH_A {
262 match self.bits {
263 false => FLASH_A::DISABLE,
264 true => FLASH_A::ENABLE,
265 }
266 }
267 #[doc = "Checks if the value of the field is `DISABLE`"]
268 #[inline(always)]
269 pub fn is_disable(&self) -> bool {
270 **self == FLASH_A::DISABLE
271 }
272 #[doc = "Checks if the value of the field is `ENABLE`"]
273 #[inline(always)]
274 pub fn is_enable(&self) -> bool {
275 **self == FLASH_A::ENABLE
276 }
277}
278impl core::ops::Deref for FLASH_R {
279 type Target = crate::FieldReader<bool, FLASH_A>;
280 #[inline(always)]
281 fn deref(&self) -> &Self::Target {
282 &self.0
283 }
284}
285#[doc = "Field `FLASH` writer - Enables clock for flash."]
286pub struct FLASH_W<'a> {
287 w: &'a mut W,
288}
289impl<'a> FLASH_W<'a> {
290 #[doc = r"Writes `variant` to the field"]
291 #[inline(always)]
292 pub fn variant(self, variant: FLASH_A) -> &'a mut W {
293 self.bit(variant.into())
294 }
295 #[doc = "disable"]
296 #[inline(always)]
297 pub fn disable(self) -> &'a mut W {
298 self.variant(FLASH_A::DISABLE)
299 }
300 #[doc = "enable"]
301 #[inline(always)]
302 pub fn enable(self) -> &'a mut W {
303 self.variant(FLASH_A::ENABLE)
304 }
305 #[doc = r"Sets the field bit"]
306 #[inline(always)]
307 pub fn set_bit(self) -> &'a mut W {
308 self.bit(true)
309 }
310 #[doc = r"Clears the field bit"]
311 #[inline(always)]
312 pub fn clear_bit(self) -> &'a mut W {
313 self.bit(false)
314 }
315 #[doc = r"Writes raw bits to the field"]
316 #[inline(always)]
317 pub fn bit(self, value: bool) -> &'a mut W {
318 self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
319 self.w
320 }
321}
322#[doc = "Enables clock for I2C0.\n\nValue on reset: 0"]
323#[derive(Clone, Copy, Debug, PartialEq)]
324pub enum I2C0_A {
325 #[doc = "0: disable"]
326 DISABLE = 0,
327 #[doc = "1: enable"]
328 ENABLE = 1,
329}
330impl From<I2C0_A> for bool {
331 #[inline(always)]
332 fn from(variant: I2C0_A) -> Self {
333 variant as u8 != 0
334 }
335}
336#[doc = "Field `I2C0` reader - Enables clock for I2C0."]
337pub struct I2C0_R(crate::FieldReader<bool, I2C0_A>);
338impl I2C0_R {
339 pub(crate) fn new(bits: bool) -> Self {
340 I2C0_R(crate::FieldReader::new(bits))
341 }
342 #[doc = r"Get enumerated values variant"]
343 #[inline(always)]
344 pub fn variant(&self) -> I2C0_A {
345 match self.bits {
346 false => I2C0_A::DISABLE,
347 true => I2C0_A::ENABLE,
348 }
349 }
350 #[doc = "Checks if the value of the field is `DISABLE`"]
351 #[inline(always)]
352 pub fn is_disable(&self) -> bool {
353 **self == I2C0_A::DISABLE
354 }
355 #[doc = "Checks if the value of the field is `ENABLE`"]
356 #[inline(always)]
357 pub fn is_enable(&self) -> bool {
358 **self == I2C0_A::ENABLE
359 }
360}
361impl core::ops::Deref for I2C0_R {
362 type Target = crate::FieldReader<bool, I2C0_A>;
363 #[inline(always)]
364 fn deref(&self) -> &Self::Target {
365 &self.0
366 }
367}
368#[doc = "Field `I2C0` writer - Enables clock for I2C0."]
369pub struct I2C0_W<'a> {
370 w: &'a mut W,
371}
372impl<'a> I2C0_W<'a> {
373 #[doc = r"Writes `variant` to the field"]
374 #[inline(always)]
375 pub fn variant(self, variant: I2C0_A) -> &'a mut W {
376 self.bit(variant.into())
377 }
378 #[doc = "disable"]
379 #[inline(always)]
380 pub fn disable(self) -> &'a mut W {
381 self.variant(I2C0_A::DISABLE)
382 }
383 #[doc = "enable"]
384 #[inline(always)]
385 pub fn enable(self) -> &'a mut W {
386 self.variant(I2C0_A::ENABLE)
387 }
388 #[doc = r"Sets the field bit"]
389 #[inline(always)]
390 pub fn set_bit(self) -> &'a mut W {
391 self.bit(true)
392 }
393 #[doc = r"Clears the field bit"]
394 #[inline(always)]
395 pub fn clear_bit(self) -> &'a mut W {
396 self.bit(false)
397 }
398 #[doc = r"Writes raw bits to the field"]
399 #[inline(always)]
400 pub fn bit(self, value: bool) -> &'a mut W {
401 self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
402 self.w
403 }
404}
405#[doc = "Enables clock for GPIO0 port registers.\n\nValue on reset: 0"]
406#[derive(Clone, Copy, Debug, PartialEq)]
407pub enum GPIO0_A {
408 #[doc = "0: disable"]
409 DISABLE = 0,
410 #[doc = "1: enable"]
411 ENABLE = 1,
412}
413impl From<GPIO0_A> for bool {
414 #[inline(always)]
415 fn from(variant: GPIO0_A) -> Self {
416 variant as u8 != 0
417 }
418}
419#[doc = "Field `GPIO0` reader - Enables clock for GPIO0 port registers."]
420pub struct GPIO0_R(crate::FieldReader<bool, GPIO0_A>);
421impl GPIO0_R {
422 pub(crate) fn new(bits: bool) -> Self {
423 GPIO0_R(crate::FieldReader::new(bits))
424 }
425 #[doc = r"Get enumerated values variant"]
426 #[inline(always)]
427 pub fn variant(&self) -> GPIO0_A {
428 match self.bits {
429 false => GPIO0_A::DISABLE,
430 true => GPIO0_A::ENABLE,
431 }
432 }
433 #[doc = "Checks if the value of the field is `DISABLE`"]
434 #[inline(always)]
435 pub fn is_disable(&self) -> bool {
436 **self == GPIO0_A::DISABLE
437 }
438 #[doc = "Checks if the value of the field is `ENABLE`"]
439 #[inline(always)]
440 pub fn is_enable(&self) -> bool {
441 **self == GPIO0_A::ENABLE
442 }
443}
444impl core::ops::Deref for GPIO0_R {
445 type Target = crate::FieldReader<bool, GPIO0_A>;
446 #[inline(always)]
447 fn deref(&self) -> &Self::Target {
448 &self.0
449 }
450}
451#[doc = "Field `GPIO0` writer - Enables clock for GPIO0 port registers."]
452pub struct GPIO0_W<'a> {
453 w: &'a mut W,
454}
455impl<'a> GPIO0_W<'a> {
456 #[doc = r"Writes `variant` to the field"]
457 #[inline(always)]
458 pub fn variant(self, variant: GPIO0_A) -> &'a mut W {
459 self.bit(variant.into())
460 }
461 #[doc = "disable"]
462 #[inline(always)]
463 pub fn disable(self) -> &'a mut W {
464 self.variant(GPIO0_A::DISABLE)
465 }
466 #[doc = "enable"]
467 #[inline(always)]
468 pub fn enable(self) -> &'a mut W {
469 self.variant(GPIO0_A::ENABLE)
470 }
471 #[doc = r"Sets the field bit"]
472 #[inline(always)]
473 pub fn set_bit(self) -> &'a mut W {
474 self.bit(true)
475 }
476 #[doc = r"Clears the field bit"]
477 #[inline(always)]
478 pub fn clear_bit(self) -> &'a mut W {
479 self.bit(false)
480 }
481 #[doc = r"Writes raw bits to the field"]
482 #[inline(always)]
483 pub fn bit(self, value: bool) -> &'a mut W {
484 self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
485 self.w
486 }
487}
488#[doc = "Enables clock for switch matrix.\n\nValue on reset: 0"]
489#[derive(Clone, Copy, Debug, PartialEq)]
490pub enum SWM_A {
491 #[doc = "0: disable"]
492 DISABLE = 0,
493 #[doc = "1: enable"]
494 ENABLE = 1,
495}
496impl From<SWM_A> for bool {
497 #[inline(always)]
498 fn from(variant: SWM_A) -> Self {
499 variant as u8 != 0
500 }
501}
502#[doc = "Field `SWM` reader - Enables clock for switch matrix."]
503pub struct SWM_R(crate::FieldReader<bool, SWM_A>);
504impl SWM_R {
505 pub(crate) fn new(bits: bool) -> Self {
506 SWM_R(crate::FieldReader::new(bits))
507 }
508 #[doc = r"Get enumerated values variant"]
509 #[inline(always)]
510 pub fn variant(&self) -> SWM_A {
511 match self.bits {
512 false => SWM_A::DISABLE,
513 true => SWM_A::ENABLE,
514 }
515 }
516 #[doc = "Checks if the value of the field is `DISABLE`"]
517 #[inline(always)]
518 pub fn is_disable(&self) -> bool {
519 **self == SWM_A::DISABLE
520 }
521 #[doc = "Checks if the value of the field is `ENABLE`"]
522 #[inline(always)]
523 pub fn is_enable(&self) -> bool {
524 **self == SWM_A::ENABLE
525 }
526}
527impl core::ops::Deref for SWM_R {
528 type Target = crate::FieldReader<bool, SWM_A>;
529 #[inline(always)]
530 fn deref(&self) -> &Self::Target {
531 &self.0
532 }
533}
534#[doc = "Field `SWM` writer - Enables clock for switch matrix."]
535pub struct SWM_W<'a> {
536 w: &'a mut W,
537}
538impl<'a> SWM_W<'a> {
539 #[doc = r"Writes `variant` to the field"]
540 #[inline(always)]
541 pub fn variant(self, variant: SWM_A) -> &'a mut W {
542 self.bit(variant.into())
543 }
544 #[doc = "disable"]
545 #[inline(always)]
546 pub fn disable(self) -> &'a mut W {
547 self.variant(SWM_A::DISABLE)
548 }
549 #[doc = "enable"]
550 #[inline(always)]
551 pub fn enable(self) -> &'a mut W {
552 self.variant(SWM_A::ENABLE)
553 }
554 #[doc = r"Sets the field bit"]
555 #[inline(always)]
556 pub fn set_bit(self) -> &'a mut W {
557 self.bit(true)
558 }
559 #[doc = r"Clears the field bit"]
560 #[inline(always)]
561 pub fn clear_bit(self) -> &'a mut W {
562 self.bit(false)
563 }
564 #[doc = r"Writes raw bits to the field"]
565 #[inline(always)]
566 pub fn bit(self, value: bool) -> &'a mut W {
567 self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
568 self.w
569 }
570}
571#[doc = "Enables clock for state configurable timer SCTimer/PWM.\n\nValue on reset: 0"]
572#[derive(Clone, Copy, Debug, PartialEq)]
573pub enum SCT_A {
574 #[doc = "0: disable"]
575 DISABLE = 0,
576 #[doc = "1: enable"]
577 ENABLE = 1,
578}
579impl From<SCT_A> for bool {
580 #[inline(always)]
581 fn from(variant: SCT_A) -> Self {
582 variant as u8 != 0
583 }
584}
585#[doc = "Field `SCT` reader - Enables clock for state configurable timer SCTimer/PWM."]
586pub struct SCT_R(crate::FieldReader<bool, SCT_A>);
587impl SCT_R {
588 pub(crate) fn new(bits: bool) -> Self {
589 SCT_R(crate::FieldReader::new(bits))
590 }
591 #[doc = r"Get enumerated values variant"]
592 #[inline(always)]
593 pub fn variant(&self) -> SCT_A {
594 match self.bits {
595 false => SCT_A::DISABLE,
596 true => SCT_A::ENABLE,
597 }
598 }
599 #[doc = "Checks if the value of the field is `DISABLE`"]
600 #[inline(always)]
601 pub fn is_disable(&self) -> bool {
602 **self == SCT_A::DISABLE
603 }
604 #[doc = "Checks if the value of the field is `ENABLE`"]
605 #[inline(always)]
606 pub fn is_enable(&self) -> bool {
607 **self == SCT_A::ENABLE
608 }
609}
610impl core::ops::Deref for SCT_R {
611 type Target = crate::FieldReader<bool, SCT_A>;
612 #[inline(always)]
613 fn deref(&self) -> &Self::Target {
614 &self.0
615 }
616}
617#[doc = "Field `SCT` writer - Enables clock for state configurable timer SCTimer/PWM."]
618pub struct SCT_W<'a> {
619 w: &'a mut W,
620}
621impl<'a> SCT_W<'a> {
622 #[doc = r"Writes `variant` to the field"]
623 #[inline(always)]
624 pub fn variant(self, variant: SCT_A) -> &'a mut W {
625 self.bit(variant.into())
626 }
627 #[doc = "disable"]
628 #[inline(always)]
629 pub fn disable(self) -> &'a mut W {
630 self.variant(SCT_A::DISABLE)
631 }
632 #[doc = "enable"]
633 #[inline(always)]
634 pub fn enable(self) -> &'a mut W {
635 self.variant(SCT_A::ENABLE)
636 }
637 #[doc = r"Sets the field bit"]
638 #[inline(always)]
639 pub fn set_bit(self) -> &'a mut W {
640 self.bit(true)
641 }
642 #[doc = r"Clears the field bit"]
643 #[inline(always)]
644 pub fn clear_bit(self) -> &'a mut W {
645 self.bit(false)
646 }
647 #[doc = r"Writes raw bits to the field"]
648 #[inline(always)]
649 pub fn bit(self, value: bool) -> &'a mut W {
650 self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
651 self.w
652 }
653}
654#[doc = "Enables clock for self-wake-up timer.\n\nValue on reset: 0"]
655#[derive(Clone, Copy, Debug, PartialEq)]
656pub enum WKT_A {
657 #[doc = "0: disable"]
658 DISABLE = 0,
659 #[doc = "1: enable"]
660 ENABLE = 1,
661}
662impl From<WKT_A> for bool {
663 #[inline(always)]
664 fn from(variant: WKT_A) -> Self {
665 variant as u8 != 0
666 }
667}
668#[doc = "Field `WKT` reader - Enables clock for self-wake-up timer."]
669pub struct WKT_R(crate::FieldReader<bool, WKT_A>);
670impl WKT_R {
671 pub(crate) fn new(bits: bool) -> Self {
672 WKT_R(crate::FieldReader::new(bits))
673 }
674 #[doc = r"Get enumerated values variant"]
675 #[inline(always)]
676 pub fn variant(&self) -> WKT_A {
677 match self.bits {
678 false => WKT_A::DISABLE,
679 true => WKT_A::ENABLE,
680 }
681 }
682 #[doc = "Checks if the value of the field is `DISABLE`"]
683 #[inline(always)]
684 pub fn is_disable(&self) -> bool {
685 **self == WKT_A::DISABLE
686 }
687 #[doc = "Checks if the value of the field is `ENABLE`"]
688 #[inline(always)]
689 pub fn is_enable(&self) -> bool {
690 **self == WKT_A::ENABLE
691 }
692}
693impl core::ops::Deref for WKT_R {
694 type Target = crate::FieldReader<bool, WKT_A>;
695 #[inline(always)]
696 fn deref(&self) -> &Self::Target {
697 &self.0
698 }
699}
700#[doc = "Field `WKT` writer - Enables clock for self-wake-up timer."]
701pub struct WKT_W<'a> {
702 w: &'a mut W,
703}
704impl<'a> WKT_W<'a> {
705 #[doc = r"Writes `variant` to the field"]
706 #[inline(always)]
707 pub fn variant(self, variant: WKT_A) -> &'a mut W {
708 self.bit(variant.into())
709 }
710 #[doc = "disable"]
711 #[inline(always)]
712 pub fn disable(self) -> &'a mut W {
713 self.variant(WKT_A::DISABLE)
714 }
715 #[doc = "enable"]
716 #[inline(always)]
717 pub fn enable(self) -> &'a mut W {
718 self.variant(WKT_A::ENABLE)
719 }
720 #[doc = r"Sets the field bit"]
721 #[inline(always)]
722 pub fn set_bit(self) -> &'a mut W {
723 self.bit(true)
724 }
725 #[doc = r"Clears the field bit"]
726 #[inline(always)]
727 pub fn clear_bit(self) -> &'a mut W {
728 self.bit(false)
729 }
730 #[doc = r"Writes raw bits to the field"]
731 #[inline(always)]
732 pub fn bit(self, value: bool) -> &'a mut W {
733 self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
734 self.w
735 }
736}
737#[doc = "Enables clock for multi-rate timer.\n\nValue on reset: 0"]
738#[derive(Clone, Copy, Debug, PartialEq)]
739pub enum MRT_A {
740 #[doc = "0: disable"]
741 DISABLE = 0,
742 #[doc = "1: enable"]
743 ENABLE = 1,
744}
745impl From<MRT_A> for bool {
746 #[inline(always)]
747 fn from(variant: MRT_A) -> Self {
748 variant as u8 != 0
749 }
750}
751#[doc = "Field `MRT` reader - Enables clock for multi-rate timer."]
752pub struct MRT_R(crate::FieldReader<bool, MRT_A>);
753impl MRT_R {
754 pub(crate) fn new(bits: bool) -> Self {
755 MRT_R(crate::FieldReader::new(bits))
756 }
757 #[doc = r"Get enumerated values variant"]
758 #[inline(always)]
759 pub fn variant(&self) -> MRT_A {
760 match self.bits {
761 false => MRT_A::DISABLE,
762 true => MRT_A::ENABLE,
763 }
764 }
765 #[doc = "Checks if the value of the field is `DISABLE`"]
766 #[inline(always)]
767 pub fn is_disable(&self) -> bool {
768 **self == MRT_A::DISABLE
769 }
770 #[doc = "Checks if the value of the field is `ENABLE`"]
771 #[inline(always)]
772 pub fn is_enable(&self) -> bool {
773 **self == MRT_A::ENABLE
774 }
775}
776impl core::ops::Deref for MRT_R {
777 type Target = crate::FieldReader<bool, MRT_A>;
778 #[inline(always)]
779 fn deref(&self) -> &Self::Target {
780 &self.0
781 }
782}
783#[doc = "Field `MRT` writer - Enables clock for multi-rate timer."]
784pub struct MRT_W<'a> {
785 w: &'a mut W,
786}
787impl<'a> MRT_W<'a> {
788 #[doc = r"Writes `variant` to the field"]
789 #[inline(always)]
790 pub fn variant(self, variant: MRT_A) -> &'a mut W {
791 self.bit(variant.into())
792 }
793 #[doc = "disable"]
794 #[inline(always)]
795 pub fn disable(self) -> &'a mut W {
796 self.variant(MRT_A::DISABLE)
797 }
798 #[doc = "enable"]
799 #[inline(always)]
800 pub fn enable(self) -> &'a mut W {
801 self.variant(MRT_A::ENABLE)
802 }
803 #[doc = r"Sets the field bit"]
804 #[inline(always)]
805 pub fn set_bit(self) -> &'a mut W {
806 self.bit(true)
807 }
808 #[doc = r"Clears the field bit"]
809 #[inline(always)]
810 pub fn clear_bit(self) -> &'a mut W {
811 self.bit(false)
812 }
813 #[doc = r"Writes raw bits to the field"]
814 #[inline(always)]
815 pub fn bit(self, value: bool) -> &'a mut W {
816 self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
817 self.w
818 }
819}
820#[doc = "Enables clock for SPI0.\n\nValue on reset: 0"]
821#[derive(Clone, Copy, Debug, PartialEq)]
822pub enum SPI0_A {
823 #[doc = "0: disable"]
824 DISABLE = 0,
825 #[doc = "1: enable"]
826 ENABLE = 1,
827}
828impl From<SPI0_A> for bool {
829 #[inline(always)]
830 fn from(variant: SPI0_A) -> Self {
831 variant as u8 != 0
832 }
833}
834#[doc = "Field `SPI0` reader - Enables clock for SPI0."]
835pub struct SPI0_R(crate::FieldReader<bool, SPI0_A>);
836impl SPI0_R {
837 pub(crate) fn new(bits: bool) -> Self {
838 SPI0_R(crate::FieldReader::new(bits))
839 }
840 #[doc = r"Get enumerated values variant"]
841 #[inline(always)]
842 pub fn variant(&self) -> SPI0_A {
843 match self.bits {
844 false => SPI0_A::DISABLE,
845 true => SPI0_A::ENABLE,
846 }
847 }
848 #[doc = "Checks if the value of the field is `DISABLE`"]
849 #[inline(always)]
850 pub fn is_disable(&self) -> bool {
851 **self == SPI0_A::DISABLE
852 }
853 #[doc = "Checks if the value of the field is `ENABLE`"]
854 #[inline(always)]
855 pub fn is_enable(&self) -> bool {
856 **self == SPI0_A::ENABLE
857 }
858}
859impl core::ops::Deref for SPI0_R {
860 type Target = crate::FieldReader<bool, SPI0_A>;
861 #[inline(always)]
862 fn deref(&self) -> &Self::Target {
863 &self.0
864 }
865}
866#[doc = "Field `SPI0` writer - Enables clock for SPI0."]
867pub struct SPI0_W<'a> {
868 w: &'a mut W,
869}
870impl<'a> SPI0_W<'a> {
871 #[doc = r"Writes `variant` to the field"]
872 #[inline(always)]
873 pub fn variant(self, variant: SPI0_A) -> &'a mut W {
874 self.bit(variant.into())
875 }
876 #[doc = "disable"]
877 #[inline(always)]
878 pub fn disable(self) -> &'a mut W {
879 self.variant(SPI0_A::DISABLE)
880 }
881 #[doc = "enable"]
882 #[inline(always)]
883 pub fn enable(self) -> &'a mut W {
884 self.variant(SPI0_A::ENABLE)
885 }
886 #[doc = r"Sets the field bit"]
887 #[inline(always)]
888 pub fn set_bit(self) -> &'a mut W {
889 self.bit(true)
890 }
891 #[doc = r"Clears the field bit"]
892 #[inline(always)]
893 pub fn clear_bit(self) -> &'a mut W {
894 self.bit(false)
895 }
896 #[doc = r"Writes raw bits to the field"]
897 #[inline(always)]
898 pub fn bit(self, value: bool) -> &'a mut W {
899 self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
900 self.w
901 }
902}
903#[doc = "Enables clock for SPI1.\n\nValue on reset: 0"]
904#[derive(Clone, Copy, Debug, PartialEq)]
905pub enum SPI1_A {
906 #[doc = "0: disable"]
907 DISABLE = 0,
908 #[doc = "1: enable"]
909 ENABLE = 1,
910}
911impl From<SPI1_A> for bool {
912 #[inline(always)]
913 fn from(variant: SPI1_A) -> Self {
914 variant as u8 != 0
915 }
916}
917#[doc = "Field `SPI1` reader - Enables clock for SPI1."]
918pub struct SPI1_R(crate::FieldReader<bool, SPI1_A>);
919impl SPI1_R {
920 pub(crate) fn new(bits: bool) -> Self {
921 SPI1_R(crate::FieldReader::new(bits))
922 }
923 #[doc = r"Get enumerated values variant"]
924 #[inline(always)]
925 pub fn variant(&self) -> SPI1_A {
926 match self.bits {
927 false => SPI1_A::DISABLE,
928 true => SPI1_A::ENABLE,
929 }
930 }
931 #[doc = "Checks if the value of the field is `DISABLE`"]
932 #[inline(always)]
933 pub fn is_disable(&self) -> bool {
934 **self == SPI1_A::DISABLE
935 }
936 #[doc = "Checks if the value of the field is `ENABLE`"]
937 #[inline(always)]
938 pub fn is_enable(&self) -> bool {
939 **self == SPI1_A::ENABLE
940 }
941}
942impl core::ops::Deref for SPI1_R {
943 type Target = crate::FieldReader<bool, SPI1_A>;
944 #[inline(always)]
945 fn deref(&self) -> &Self::Target {
946 &self.0
947 }
948}
949#[doc = "Field `SPI1` writer - Enables clock for SPI1."]
950pub struct SPI1_W<'a> {
951 w: &'a mut W,
952}
953impl<'a> SPI1_W<'a> {
954 #[doc = r"Writes `variant` to the field"]
955 #[inline(always)]
956 pub fn variant(self, variant: SPI1_A) -> &'a mut W {
957 self.bit(variant.into())
958 }
959 #[doc = "disable"]
960 #[inline(always)]
961 pub fn disable(self) -> &'a mut W {
962 self.variant(SPI1_A::DISABLE)
963 }
964 #[doc = "enable"]
965 #[inline(always)]
966 pub fn enable(self) -> &'a mut W {
967 self.variant(SPI1_A::ENABLE)
968 }
969 #[doc = r"Sets the field bit"]
970 #[inline(always)]
971 pub fn set_bit(self) -> &'a mut W {
972 self.bit(true)
973 }
974 #[doc = r"Clears the field bit"]
975 #[inline(always)]
976 pub fn clear_bit(self) -> &'a mut W {
977 self.bit(false)
978 }
979 #[doc = r"Writes raw bits to the field"]
980 #[inline(always)]
981 pub fn bit(self, value: bool) -> &'a mut W {
982 self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
983 self.w
984 }
985}
986#[doc = "Enables clock for CRC.\n\nValue on reset: 0"]
987#[derive(Clone, Copy, Debug, PartialEq)]
988pub enum CRC_A {
989 #[doc = "0: disable"]
990 DISABLE = 0,
991 #[doc = "1: enable"]
992 ENABLE = 1,
993}
994impl From<CRC_A> for bool {
995 #[inline(always)]
996 fn from(variant: CRC_A) -> Self {
997 variant as u8 != 0
998 }
999}
1000#[doc = "Field `CRC` reader - Enables clock for CRC."]
1001pub struct CRC_R(crate::FieldReader<bool, CRC_A>);
1002impl CRC_R {
1003 pub(crate) fn new(bits: bool) -> Self {
1004 CRC_R(crate::FieldReader::new(bits))
1005 }
1006 #[doc = r"Get enumerated values variant"]
1007 #[inline(always)]
1008 pub fn variant(&self) -> CRC_A {
1009 match self.bits {
1010 false => CRC_A::DISABLE,
1011 true => CRC_A::ENABLE,
1012 }
1013 }
1014 #[doc = "Checks if the value of the field is `DISABLE`"]
1015 #[inline(always)]
1016 pub fn is_disable(&self) -> bool {
1017 **self == CRC_A::DISABLE
1018 }
1019 #[doc = "Checks if the value of the field is `ENABLE`"]
1020 #[inline(always)]
1021 pub fn is_enable(&self) -> bool {
1022 **self == CRC_A::ENABLE
1023 }
1024}
1025impl core::ops::Deref for CRC_R {
1026 type Target = crate::FieldReader<bool, CRC_A>;
1027 #[inline(always)]
1028 fn deref(&self) -> &Self::Target {
1029 &self.0
1030 }
1031}
1032#[doc = "Field `CRC` writer - Enables clock for CRC."]
1033pub struct CRC_W<'a> {
1034 w: &'a mut W,
1035}
1036impl<'a> CRC_W<'a> {
1037 #[doc = r"Writes `variant` to the field"]
1038 #[inline(always)]
1039 pub fn variant(self, variant: CRC_A) -> &'a mut W {
1040 self.bit(variant.into())
1041 }
1042 #[doc = "disable"]
1043 #[inline(always)]
1044 pub fn disable(self) -> &'a mut W {
1045 self.variant(CRC_A::DISABLE)
1046 }
1047 #[doc = "enable"]
1048 #[inline(always)]
1049 pub fn enable(self) -> &'a mut W {
1050 self.variant(CRC_A::ENABLE)
1051 }
1052 #[doc = r"Sets the field bit"]
1053 #[inline(always)]
1054 pub fn set_bit(self) -> &'a mut W {
1055 self.bit(true)
1056 }
1057 #[doc = r"Clears the field bit"]
1058 #[inline(always)]
1059 pub fn clear_bit(self) -> &'a mut W {
1060 self.bit(false)
1061 }
1062 #[doc = r"Writes raw bits to the field"]
1063 #[inline(always)]
1064 pub fn bit(self, value: bool) -> &'a mut W {
1065 self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
1066 self.w
1067 }
1068}
1069#[doc = "Enables clock for UART0.\n\nValue on reset: 0"]
1070#[derive(Clone, Copy, Debug, PartialEq)]
1071pub enum UART0_A {
1072 #[doc = "0: disable"]
1073 DISABLE = 0,
1074 #[doc = "1: enable"]
1075 ENABLE = 1,
1076}
1077impl From<UART0_A> for bool {
1078 #[inline(always)]
1079 fn from(variant: UART0_A) -> Self {
1080 variant as u8 != 0
1081 }
1082}
1083#[doc = "Field `UART0` reader - Enables clock for UART0."]
1084pub struct UART0_R(crate::FieldReader<bool, UART0_A>);
1085impl UART0_R {
1086 pub(crate) fn new(bits: bool) -> Self {
1087 UART0_R(crate::FieldReader::new(bits))
1088 }
1089 #[doc = r"Get enumerated values variant"]
1090 #[inline(always)]
1091 pub fn variant(&self) -> UART0_A {
1092 match self.bits {
1093 false => UART0_A::DISABLE,
1094 true => UART0_A::ENABLE,
1095 }
1096 }
1097 #[doc = "Checks if the value of the field is `DISABLE`"]
1098 #[inline(always)]
1099 pub fn is_disable(&self) -> bool {
1100 **self == UART0_A::DISABLE
1101 }
1102 #[doc = "Checks if the value of the field is `ENABLE`"]
1103 #[inline(always)]
1104 pub fn is_enable(&self) -> bool {
1105 **self == UART0_A::ENABLE
1106 }
1107}
1108impl core::ops::Deref for UART0_R {
1109 type Target = crate::FieldReader<bool, UART0_A>;
1110 #[inline(always)]
1111 fn deref(&self) -> &Self::Target {
1112 &self.0
1113 }
1114}
1115#[doc = "Field `UART0` writer - Enables clock for UART0."]
1116pub struct UART0_W<'a> {
1117 w: &'a mut W,
1118}
1119impl<'a> UART0_W<'a> {
1120 #[doc = r"Writes `variant` to the field"]
1121 #[inline(always)]
1122 pub fn variant(self, variant: UART0_A) -> &'a mut W {
1123 self.bit(variant.into())
1124 }
1125 #[doc = "disable"]
1126 #[inline(always)]
1127 pub fn disable(self) -> &'a mut W {
1128 self.variant(UART0_A::DISABLE)
1129 }
1130 #[doc = "enable"]
1131 #[inline(always)]
1132 pub fn enable(self) -> &'a mut W {
1133 self.variant(UART0_A::ENABLE)
1134 }
1135 #[doc = r"Sets the field bit"]
1136 #[inline(always)]
1137 pub fn set_bit(self) -> &'a mut W {
1138 self.bit(true)
1139 }
1140 #[doc = r"Clears the field bit"]
1141 #[inline(always)]
1142 pub fn clear_bit(self) -> &'a mut W {
1143 self.bit(false)
1144 }
1145 #[doc = r"Writes raw bits to the field"]
1146 #[inline(always)]
1147 pub fn bit(self, value: bool) -> &'a mut W {
1148 self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
1149 self.w
1150 }
1151}
1152#[doc = "Enables clock for UART1.\n\nValue on reset: 0"]
1153#[derive(Clone, Copy, Debug, PartialEq)]
1154pub enum UART1_A {
1155 #[doc = "0: disable"]
1156 DISABLE = 0,
1157 #[doc = "1: enable"]
1158 ENABLE = 1,
1159}
1160impl From<UART1_A> for bool {
1161 #[inline(always)]
1162 fn from(variant: UART1_A) -> Self {
1163 variant as u8 != 0
1164 }
1165}
1166#[doc = "Field `UART1` reader - Enables clock for UART1."]
1167pub struct UART1_R(crate::FieldReader<bool, UART1_A>);
1168impl UART1_R {
1169 pub(crate) fn new(bits: bool) -> Self {
1170 UART1_R(crate::FieldReader::new(bits))
1171 }
1172 #[doc = r"Get enumerated values variant"]
1173 #[inline(always)]
1174 pub fn variant(&self) -> UART1_A {
1175 match self.bits {
1176 false => UART1_A::DISABLE,
1177 true => UART1_A::ENABLE,
1178 }
1179 }
1180 #[doc = "Checks if the value of the field is `DISABLE`"]
1181 #[inline(always)]
1182 pub fn is_disable(&self) -> bool {
1183 **self == UART1_A::DISABLE
1184 }
1185 #[doc = "Checks if the value of the field is `ENABLE`"]
1186 #[inline(always)]
1187 pub fn is_enable(&self) -> bool {
1188 **self == UART1_A::ENABLE
1189 }
1190}
1191impl core::ops::Deref for UART1_R {
1192 type Target = crate::FieldReader<bool, UART1_A>;
1193 #[inline(always)]
1194 fn deref(&self) -> &Self::Target {
1195 &self.0
1196 }
1197}
1198#[doc = "Field `UART1` writer - Enables clock for UART1."]
1199pub struct UART1_W<'a> {
1200 w: &'a mut W,
1201}
1202impl<'a> UART1_W<'a> {
1203 #[doc = r"Writes `variant` to the field"]
1204 #[inline(always)]
1205 pub fn variant(self, variant: UART1_A) -> &'a mut W {
1206 self.bit(variant.into())
1207 }
1208 #[doc = "disable"]
1209 #[inline(always)]
1210 pub fn disable(self) -> &'a mut W {
1211 self.variant(UART1_A::DISABLE)
1212 }
1213 #[doc = "enable"]
1214 #[inline(always)]
1215 pub fn enable(self) -> &'a mut W {
1216 self.variant(UART1_A::ENABLE)
1217 }
1218 #[doc = r"Sets the field bit"]
1219 #[inline(always)]
1220 pub fn set_bit(self) -> &'a mut W {
1221 self.bit(true)
1222 }
1223 #[doc = r"Clears the field bit"]
1224 #[inline(always)]
1225 pub fn clear_bit(self) -> &'a mut W {
1226 self.bit(false)
1227 }
1228 #[doc = r"Writes raw bits to the field"]
1229 #[inline(always)]
1230 pub fn bit(self, value: bool) -> &'a mut W {
1231 self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
1232 self.w
1233 }
1234}
1235#[doc = "Enables clock for UART2.\n\nValue on reset: 0"]
1236#[derive(Clone, Copy, Debug, PartialEq)]
1237pub enum UART2_A {
1238 #[doc = "0: disable"]
1239 DISABLE = 0,
1240 #[doc = "1: enable"]
1241 ENABLE = 1,
1242}
1243impl From<UART2_A> for bool {
1244 #[inline(always)]
1245 fn from(variant: UART2_A) -> Self {
1246 variant as u8 != 0
1247 }
1248}
1249#[doc = "Field `UART2` reader - Enables clock for UART2."]
1250pub struct UART2_R(crate::FieldReader<bool, UART2_A>);
1251impl UART2_R {
1252 pub(crate) fn new(bits: bool) -> Self {
1253 UART2_R(crate::FieldReader::new(bits))
1254 }
1255 #[doc = r"Get enumerated values variant"]
1256 #[inline(always)]
1257 pub fn variant(&self) -> UART2_A {
1258 match self.bits {
1259 false => UART2_A::DISABLE,
1260 true => UART2_A::ENABLE,
1261 }
1262 }
1263 #[doc = "Checks if the value of the field is `DISABLE`"]
1264 #[inline(always)]
1265 pub fn is_disable(&self) -> bool {
1266 **self == UART2_A::DISABLE
1267 }
1268 #[doc = "Checks if the value of the field is `ENABLE`"]
1269 #[inline(always)]
1270 pub fn is_enable(&self) -> bool {
1271 **self == UART2_A::ENABLE
1272 }
1273}
1274impl core::ops::Deref for UART2_R {
1275 type Target = crate::FieldReader<bool, UART2_A>;
1276 #[inline(always)]
1277 fn deref(&self) -> &Self::Target {
1278 &self.0
1279 }
1280}
1281#[doc = "Field `UART2` writer - Enables clock for UART2."]
1282pub struct UART2_W<'a> {
1283 w: &'a mut W,
1284}
1285impl<'a> UART2_W<'a> {
1286 #[doc = r"Writes `variant` to the field"]
1287 #[inline(always)]
1288 pub fn variant(self, variant: UART2_A) -> &'a mut W {
1289 self.bit(variant.into())
1290 }
1291 #[doc = "disable"]
1292 #[inline(always)]
1293 pub fn disable(self) -> &'a mut W {
1294 self.variant(UART2_A::DISABLE)
1295 }
1296 #[doc = "enable"]
1297 #[inline(always)]
1298 pub fn enable(self) -> &'a mut W {
1299 self.variant(UART2_A::ENABLE)
1300 }
1301 #[doc = r"Sets the field bit"]
1302 #[inline(always)]
1303 pub fn set_bit(self) -> &'a mut W {
1304 self.bit(true)
1305 }
1306 #[doc = r"Clears the field bit"]
1307 #[inline(always)]
1308 pub fn clear_bit(self) -> &'a mut W {
1309 self.bit(false)
1310 }
1311 #[doc = r"Writes raw bits to the field"]
1312 #[inline(always)]
1313 pub fn bit(self, value: bool) -> &'a mut W {
1314 self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
1315 self.w
1316 }
1317}
1318#[doc = "Enables clock for WWDT.\n\nValue on reset: 0"]
1319#[derive(Clone, Copy, Debug, PartialEq)]
1320pub enum WWDT_A {
1321 #[doc = "0: disable"]
1322 DISABLE = 0,
1323 #[doc = "1: enable"]
1324 ENABLE = 1,
1325}
1326impl From<WWDT_A> for bool {
1327 #[inline(always)]
1328 fn from(variant: WWDT_A) -> Self {
1329 variant as u8 != 0
1330 }
1331}
1332#[doc = "Field `WWDT` reader - Enables clock for WWDT."]
1333pub struct WWDT_R(crate::FieldReader<bool, WWDT_A>);
1334impl WWDT_R {
1335 pub(crate) fn new(bits: bool) -> Self {
1336 WWDT_R(crate::FieldReader::new(bits))
1337 }
1338 #[doc = r"Get enumerated values variant"]
1339 #[inline(always)]
1340 pub fn variant(&self) -> WWDT_A {
1341 match self.bits {
1342 false => WWDT_A::DISABLE,
1343 true => WWDT_A::ENABLE,
1344 }
1345 }
1346 #[doc = "Checks if the value of the field is `DISABLE`"]
1347 #[inline(always)]
1348 pub fn is_disable(&self) -> bool {
1349 **self == WWDT_A::DISABLE
1350 }
1351 #[doc = "Checks if the value of the field is `ENABLE`"]
1352 #[inline(always)]
1353 pub fn is_enable(&self) -> bool {
1354 **self == WWDT_A::ENABLE
1355 }
1356}
1357impl core::ops::Deref for WWDT_R {
1358 type Target = crate::FieldReader<bool, WWDT_A>;
1359 #[inline(always)]
1360 fn deref(&self) -> &Self::Target {
1361 &self.0
1362 }
1363}
1364#[doc = "Field `WWDT` writer - Enables clock for WWDT."]
1365pub struct WWDT_W<'a> {
1366 w: &'a mut W,
1367}
1368impl<'a> WWDT_W<'a> {
1369 #[doc = r"Writes `variant` to the field"]
1370 #[inline(always)]
1371 pub fn variant(self, variant: WWDT_A) -> &'a mut W {
1372 self.bit(variant.into())
1373 }
1374 #[doc = "disable"]
1375 #[inline(always)]
1376 pub fn disable(self) -> &'a mut W {
1377 self.variant(WWDT_A::DISABLE)
1378 }
1379 #[doc = "enable"]
1380 #[inline(always)]
1381 pub fn enable(self) -> &'a mut W {
1382 self.variant(WWDT_A::ENABLE)
1383 }
1384 #[doc = r"Sets the field bit"]
1385 #[inline(always)]
1386 pub fn set_bit(self) -> &'a mut W {
1387 self.bit(true)
1388 }
1389 #[doc = r"Clears the field bit"]
1390 #[inline(always)]
1391 pub fn clear_bit(self) -> &'a mut W {
1392 self.bit(false)
1393 }
1394 #[doc = r"Writes raw bits to the field"]
1395 #[inline(always)]
1396 pub fn bit(self, value: bool) -> &'a mut W {
1397 self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
1398 self.w
1399 }
1400}
1401#[doc = "Enables clock for IOCON.\n\nValue on reset: 0"]
1402#[derive(Clone, Copy, Debug, PartialEq)]
1403pub enum IOCON_A {
1404 #[doc = "0: disable"]
1405 DISABLE = 0,
1406 #[doc = "1: enable"]
1407 ENABLE = 1,
1408}
1409impl From<IOCON_A> for bool {
1410 #[inline(always)]
1411 fn from(variant: IOCON_A) -> Self {
1412 variant as u8 != 0
1413 }
1414}
1415#[doc = "Field `IOCON` reader - Enables clock for IOCON."]
1416pub struct IOCON_R(crate::FieldReader<bool, IOCON_A>);
1417impl IOCON_R {
1418 pub(crate) fn new(bits: bool) -> Self {
1419 IOCON_R(crate::FieldReader::new(bits))
1420 }
1421 #[doc = r"Get enumerated values variant"]
1422 #[inline(always)]
1423 pub fn variant(&self) -> IOCON_A {
1424 match self.bits {
1425 false => IOCON_A::DISABLE,
1426 true => IOCON_A::ENABLE,
1427 }
1428 }
1429 #[doc = "Checks if the value of the field is `DISABLE`"]
1430 #[inline(always)]
1431 pub fn is_disable(&self) -> bool {
1432 **self == IOCON_A::DISABLE
1433 }
1434 #[doc = "Checks if the value of the field is `ENABLE`"]
1435 #[inline(always)]
1436 pub fn is_enable(&self) -> bool {
1437 **self == IOCON_A::ENABLE
1438 }
1439}
1440impl core::ops::Deref for IOCON_R {
1441 type Target = crate::FieldReader<bool, IOCON_A>;
1442 #[inline(always)]
1443 fn deref(&self) -> &Self::Target {
1444 &self.0
1445 }
1446}
1447#[doc = "Field `IOCON` writer - Enables clock for IOCON."]
1448pub struct IOCON_W<'a> {
1449 w: &'a mut W,
1450}
1451impl<'a> IOCON_W<'a> {
1452 #[doc = r"Writes `variant` to the field"]
1453 #[inline(always)]
1454 pub fn variant(self, variant: IOCON_A) -> &'a mut W {
1455 self.bit(variant.into())
1456 }
1457 #[doc = "disable"]
1458 #[inline(always)]
1459 pub fn disable(self) -> &'a mut W {
1460 self.variant(IOCON_A::DISABLE)
1461 }
1462 #[doc = "enable"]
1463 #[inline(always)]
1464 pub fn enable(self) -> &'a mut W {
1465 self.variant(IOCON_A::ENABLE)
1466 }
1467 #[doc = r"Sets the field bit"]
1468 #[inline(always)]
1469 pub fn set_bit(self) -> &'a mut W {
1470 self.bit(true)
1471 }
1472 #[doc = r"Clears the field bit"]
1473 #[inline(always)]
1474 pub fn clear_bit(self) -> &'a mut W {
1475 self.bit(false)
1476 }
1477 #[doc = r"Writes raw bits to the field"]
1478 #[inline(always)]
1479 pub fn bit(self, value: bool) -> &'a mut W {
1480 self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
1481 self.w
1482 }
1483}
1484#[doc = "Enables clock for analog comparator.\n\nValue on reset: 0"]
1485#[derive(Clone, Copy, Debug, PartialEq)]
1486pub enum ACMP_A {
1487 #[doc = "0: disable"]
1488 DISABLE = 0,
1489 #[doc = "1: enable"]
1490 ENABLE = 1,
1491}
1492impl From<ACMP_A> for bool {
1493 #[inline(always)]
1494 fn from(variant: ACMP_A) -> Self {
1495 variant as u8 != 0
1496 }
1497}
1498#[doc = "Field `ACMP` reader - Enables clock for analog comparator."]
1499pub struct ACMP_R(crate::FieldReader<bool, ACMP_A>);
1500impl ACMP_R {
1501 pub(crate) fn new(bits: bool) -> Self {
1502 ACMP_R(crate::FieldReader::new(bits))
1503 }
1504 #[doc = r"Get enumerated values variant"]
1505 #[inline(always)]
1506 pub fn variant(&self) -> ACMP_A {
1507 match self.bits {
1508 false => ACMP_A::DISABLE,
1509 true => ACMP_A::ENABLE,
1510 }
1511 }
1512 #[doc = "Checks if the value of the field is `DISABLE`"]
1513 #[inline(always)]
1514 pub fn is_disable(&self) -> bool {
1515 **self == ACMP_A::DISABLE
1516 }
1517 #[doc = "Checks if the value of the field is `ENABLE`"]
1518 #[inline(always)]
1519 pub fn is_enable(&self) -> bool {
1520 **self == ACMP_A::ENABLE
1521 }
1522}
1523impl core::ops::Deref for ACMP_R {
1524 type Target = crate::FieldReader<bool, ACMP_A>;
1525 #[inline(always)]
1526 fn deref(&self) -> &Self::Target {
1527 &self.0
1528 }
1529}
1530#[doc = "Field `ACMP` writer - Enables clock for analog comparator."]
1531pub struct ACMP_W<'a> {
1532 w: &'a mut W,
1533}
1534impl<'a> ACMP_W<'a> {
1535 #[doc = r"Writes `variant` to the field"]
1536 #[inline(always)]
1537 pub fn variant(self, variant: ACMP_A) -> &'a mut W {
1538 self.bit(variant.into())
1539 }
1540 #[doc = "disable"]
1541 #[inline(always)]
1542 pub fn disable(self) -> &'a mut W {
1543 self.variant(ACMP_A::DISABLE)
1544 }
1545 #[doc = "enable"]
1546 #[inline(always)]
1547 pub fn enable(self) -> &'a mut W {
1548 self.variant(ACMP_A::ENABLE)
1549 }
1550 #[doc = r"Sets the field bit"]
1551 #[inline(always)]
1552 pub fn set_bit(self) -> &'a mut W {
1553 self.bit(true)
1554 }
1555 #[doc = r"Clears the field bit"]
1556 #[inline(always)]
1557 pub fn clear_bit(self) -> &'a mut W {
1558 self.bit(false)
1559 }
1560 #[doc = r"Writes raw bits to the field"]
1561 #[inline(always)]
1562 pub fn bit(self, value: bool) -> &'a mut W {
1563 self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
1564 self.w
1565 }
1566}
1567#[doc = "Enables clock for GPIO1 port registers.\n\nValue on reset: 0"]
1568#[derive(Clone, Copy, Debug, PartialEq)]
1569pub enum GPIO1_A {
1570 #[doc = "0: disable"]
1571 DISABLE = 0,
1572 #[doc = "1: enable"]
1573 ENABLE = 1,
1574}
1575impl From<GPIO1_A> for bool {
1576 #[inline(always)]
1577 fn from(variant: GPIO1_A) -> Self {
1578 variant as u8 != 0
1579 }
1580}
1581#[doc = "Field `GPIO1` reader - Enables clock for GPIO1 port registers."]
1582pub struct GPIO1_R(crate::FieldReader<bool, GPIO1_A>);
1583impl GPIO1_R {
1584 pub(crate) fn new(bits: bool) -> Self {
1585 GPIO1_R(crate::FieldReader::new(bits))
1586 }
1587 #[doc = r"Get enumerated values variant"]
1588 #[inline(always)]
1589 pub fn variant(&self) -> GPIO1_A {
1590 match self.bits {
1591 false => GPIO1_A::DISABLE,
1592 true => GPIO1_A::ENABLE,
1593 }
1594 }
1595 #[doc = "Checks if the value of the field is `DISABLE`"]
1596 #[inline(always)]
1597 pub fn is_disable(&self) -> bool {
1598 **self == GPIO1_A::DISABLE
1599 }
1600 #[doc = "Checks if the value of the field is `ENABLE`"]
1601 #[inline(always)]
1602 pub fn is_enable(&self) -> bool {
1603 **self == GPIO1_A::ENABLE
1604 }
1605}
1606impl core::ops::Deref for GPIO1_R {
1607 type Target = crate::FieldReader<bool, GPIO1_A>;
1608 #[inline(always)]
1609 fn deref(&self) -> &Self::Target {
1610 &self.0
1611 }
1612}
1613#[doc = "Field `GPIO1` writer - Enables clock for GPIO1 port registers."]
1614pub struct GPIO1_W<'a> {
1615 w: &'a mut W,
1616}
1617impl<'a> GPIO1_W<'a> {
1618 #[doc = r"Writes `variant` to the field"]
1619 #[inline(always)]
1620 pub fn variant(self, variant: GPIO1_A) -> &'a mut W {
1621 self.bit(variant.into())
1622 }
1623 #[doc = "disable"]
1624 #[inline(always)]
1625 pub fn disable(self) -> &'a mut W {
1626 self.variant(GPIO1_A::DISABLE)
1627 }
1628 #[doc = "enable"]
1629 #[inline(always)]
1630 pub fn enable(self) -> &'a mut W {
1631 self.variant(GPIO1_A::ENABLE)
1632 }
1633 #[doc = r"Sets the field bit"]
1634 #[inline(always)]
1635 pub fn set_bit(self) -> &'a mut W {
1636 self.bit(true)
1637 }
1638 #[doc = r"Clears the field bit"]
1639 #[inline(always)]
1640 pub fn clear_bit(self) -> &'a mut W {
1641 self.bit(false)
1642 }
1643 #[doc = r"Writes raw bits to the field"]
1644 #[inline(always)]
1645 pub fn bit(self, value: bool) -> &'a mut W {
1646 self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
1647 self.w
1648 }
1649}
1650#[doc = "Enables clock for I2C1.\n\nValue on reset: 0"]
1651#[derive(Clone, Copy, Debug, PartialEq)]
1652pub enum I2C1_A {
1653 #[doc = "0: disable"]
1654 DISABLE = 0,
1655 #[doc = "1: enable"]
1656 ENABLE = 1,
1657}
1658impl From<I2C1_A> for bool {
1659 #[inline(always)]
1660 fn from(variant: I2C1_A) -> Self {
1661 variant as u8 != 0
1662 }
1663}
1664#[doc = "Field `I2C1` reader - Enables clock for I2C1."]
1665pub struct I2C1_R(crate::FieldReader<bool, I2C1_A>);
1666impl I2C1_R {
1667 pub(crate) fn new(bits: bool) -> Self {
1668 I2C1_R(crate::FieldReader::new(bits))
1669 }
1670 #[doc = r"Get enumerated values variant"]
1671 #[inline(always)]
1672 pub fn variant(&self) -> I2C1_A {
1673 match self.bits {
1674 false => I2C1_A::DISABLE,
1675 true => I2C1_A::ENABLE,
1676 }
1677 }
1678 #[doc = "Checks if the value of the field is `DISABLE`"]
1679 #[inline(always)]
1680 pub fn is_disable(&self) -> bool {
1681 **self == I2C1_A::DISABLE
1682 }
1683 #[doc = "Checks if the value of the field is `ENABLE`"]
1684 #[inline(always)]
1685 pub fn is_enable(&self) -> bool {
1686 **self == I2C1_A::ENABLE
1687 }
1688}
1689impl core::ops::Deref for I2C1_R {
1690 type Target = crate::FieldReader<bool, I2C1_A>;
1691 #[inline(always)]
1692 fn deref(&self) -> &Self::Target {
1693 &self.0
1694 }
1695}
1696#[doc = "Field `I2C1` writer - Enables clock for I2C1."]
1697pub struct I2C1_W<'a> {
1698 w: &'a mut W,
1699}
1700impl<'a> I2C1_W<'a> {
1701 #[doc = r"Writes `variant` to the field"]
1702 #[inline(always)]
1703 pub fn variant(self, variant: I2C1_A) -> &'a mut W {
1704 self.bit(variant.into())
1705 }
1706 #[doc = "disable"]
1707 #[inline(always)]
1708 pub fn disable(self) -> &'a mut W {
1709 self.variant(I2C1_A::DISABLE)
1710 }
1711 #[doc = "enable"]
1712 #[inline(always)]
1713 pub fn enable(self) -> &'a mut W {
1714 self.variant(I2C1_A::ENABLE)
1715 }
1716 #[doc = r"Sets the field bit"]
1717 #[inline(always)]
1718 pub fn set_bit(self) -> &'a mut W {
1719 self.bit(true)
1720 }
1721 #[doc = r"Clears the field bit"]
1722 #[inline(always)]
1723 pub fn clear_bit(self) -> &'a mut W {
1724 self.bit(false)
1725 }
1726 #[doc = r"Writes raw bits to the field"]
1727 #[inline(always)]
1728 pub fn bit(self, value: bool) -> &'a mut W {
1729 self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
1730 self.w
1731 }
1732}
1733#[doc = "Enables clock for I2C2.\n\nValue on reset: 0"]
1734#[derive(Clone, Copy, Debug, PartialEq)]
1735pub enum I2C2_A {
1736 #[doc = "0: disable"]
1737 DISABLE = 0,
1738 #[doc = "1: enable"]
1739 ENABLE = 1,
1740}
1741impl From<I2C2_A> for bool {
1742 #[inline(always)]
1743 fn from(variant: I2C2_A) -> Self {
1744 variant as u8 != 0
1745 }
1746}
1747#[doc = "Field `I2C2` reader - Enables clock for I2C2."]
1748pub struct I2C2_R(crate::FieldReader<bool, I2C2_A>);
1749impl I2C2_R {
1750 pub(crate) fn new(bits: bool) -> Self {
1751 I2C2_R(crate::FieldReader::new(bits))
1752 }
1753 #[doc = r"Get enumerated values variant"]
1754 #[inline(always)]
1755 pub fn variant(&self) -> I2C2_A {
1756 match self.bits {
1757 false => I2C2_A::DISABLE,
1758 true => I2C2_A::ENABLE,
1759 }
1760 }
1761 #[doc = "Checks if the value of the field is `DISABLE`"]
1762 #[inline(always)]
1763 pub fn is_disable(&self) -> bool {
1764 **self == I2C2_A::DISABLE
1765 }
1766 #[doc = "Checks if the value of the field is `ENABLE`"]
1767 #[inline(always)]
1768 pub fn is_enable(&self) -> bool {
1769 **self == I2C2_A::ENABLE
1770 }
1771}
1772impl core::ops::Deref for I2C2_R {
1773 type Target = crate::FieldReader<bool, I2C2_A>;
1774 #[inline(always)]
1775 fn deref(&self) -> &Self::Target {
1776 &self.0
1777 }
1778}
1779#[doc = "Field `I2C2` writer - Enables clock for I2C2."]
1780pub struct I2C2_W<'a> {
1781 w: &'a mut W,
1782}
1783impl<'a> I2C2_W<'a> {
1784 #[doc = r"Writes `variant` to the field"]
1785 #[inline(always)]
1786 pub fn variant(self, variant: I2C2_A) -> &'a mut W {
1787 self.bit(variant.into())
1788 }
1789 #[doc = "disable"]
1790 #[inline(always)]
1791 pub fn disable(self) -> &'a mut W {
1792 self.variant(I2C2_A::DISABLE)
1793 }
1794 #[doc = "enable"]
1795 #[inline(always)]
1796 pub fn enable(self) -> &'a mut W {
1797 self.variant(I2C2_A::ENABLE)
1798 }
1799 #[doc = r"Sets the field bit"]
1800 #[inline(always)]
1801 pub fn set_bit(self) -> &'a mut W {
1802 self.bit(true)
1803 }
1804 #[doc = r"Clears the field bit"]
1805 #[inline(always)]
1806 pub fn clear_bit(self) -> &'a mut W {
1807 self.bit(false)
1808 }
1809 #[doc = r"Writes raw bits to the field"]
1810 #[inline(always)]
1811 pub fn bit(self, value: bool) -> &'a mut W {
1812 self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
1813 self.w
1814 }
1815}
1816#[doc = "Enables clock for I2C3.\n\nValue on reset: 0"]
1817#[derive(Clone, Copy, Debug, PartialEq)]
1818pub enum I2C3_A {
1819 #[doc = "0: disable"]
1820 DISABLE = 0,
1821 #[doc = "1: enable"]
1822 ENABLE = 1,
1823}
1824impl From<I2C3_A> for bool {
1825 #[inline(always)]
1826 fn from(variant: I2C3_A) -> Self {
1827 variant as u8 != 0
1828 }
1829}
1830#[doc = "Field `I2C3` reader - Enables clock for I2C3."]
1831pub struct I2C3_R(crate::FieldReader<bool, I2C3_A>);
1832impl I2C3_R {
1833 pub(crate) fn new(bits: bool) -> Self {
1834 I2C3_R(crate::FieldReader::new(bits))
1835 }
1836 #[doc = r"Get enumerated values variant"]
1837 #[inline(always)]
1838 pub fn variant(&self) -> I2C3_A {
1839 match self.bits {
1840 false => I2C3_A::DISABLE,
1841 true => I2C3_A::ENABLE,
1842 }
1843 }
1844 #[doc = "Checks if the value of the field is `DISABLE`"]
1845 #[inline(always)]
1846 pub fn is_disable(&self) -> bool {
1847 **self == I2C3_A::DISABLE
1848 }
1849 #[doc = "Checks if the value of the field is `ENABLE`"]
1850 #[inline(always)]
1851 pub fn is_enable(&self) -> bool {
1852 **self == I2C3_A::ENABLE
1853 }
1854}
1855impl core::ops::Deref for I2C3_R {
1856 type Target = crate::FieldReader<bool, I2C3_A>;
1857 #[inline(always)]
1858 fn deref(&self) -> &Self::Target {
1859 &self.0
1860 }
1861}
1862#[doc = "Field `I2C3` writer - Enables clock for I2C3."]
1863pub struct I2C3_W<'a> {
1864 w: &'a mut W,
1865}
1866impl<'a> I2C3_W<'a> {
1867 #[doc = r"Writes `variant` to the field"]
1868 #[inline(always)]
1869 pub fn variant(self, variant: I2C3_A) -> &'a mut W {
1870 self.bit(variant.into())
1871 }
1872 #[doc = "disable"]
1873 #[inline(always)]
1874 pub fn disable(self) -> &'a mut W {
1875 self.variant(I2C3_A::DISABLE)
1876 }
1877 #[doc = "enable"]
1878 #[inline(always)]
1879 pub fn enable(self) -> &'a mut W {
1880 self.variant(I2C3_A::ENABLE)
1881 }
1882 #[doc = r"Sets the field bit"]
1883 #[inline(always)]
1884 pub fn set_bit(self) -> &'a mut W {
1885 self.bit(true)
1886 }
1887 #[doc = r"Clears the field bit"]
1888 #[inline(always)]
1889 pub fn clear_bit(self) -> &'a mut W {
1890 self.bit(false)
1891 }
1892 #[doc = r"Writes raw bits to the field"]
1893 #[inline(always)]
1894 pub fn bit(self, value: bool) -> &'a mut W {
1895 self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
1896 self.w
1897 }
1898}
1899#[doc = "Enables clock for ADC.\n\nValue on reset: 0"]
1900#[derive(Clone, Copy, Debug, PartialEq)]
1901pub enum ADC_A {
1902 #[doc = "0: disable"]
1903 DISABLE = 0,
1904 #[doc = "1: enable"]
1905 ENABLE = 1,
1906}
1907impl From<ADC_A> for bool {
1908 #[inline(always)]
1909 fn from(variant: ADC_A) -> Self {
1910 variant as u8 != 0
1911 }
1912}
1913#[doc = "Field `ADC` reader - Enables clock for ADC."]
1914pub struct ADC_R(crate::FieldReader<bool, ADC_A>);
1915impl ADC_R {
1916 pub(crate) fn new(bits: bool) -> Self {
1917 ADC_R(crate::FieldReader::new(bits))
1918 }
1919 #[doc = r"Get enumerated values variant"]
1920 #[inline(always)]
1921 pub fn variant(&self) -> ADC_A {
1922 match self.bits {
1923 false => ADC_A::DISABLE,
1924 true => ADC_A::ENABLE,
1925 }
1926 }
1927 #[doc = "Checks if the value of the field is `DISABLE`"]
1928 #[inline(always)]
1929 pub fn is_disable(&self) -> bool {
1930 **self == ADC_A::DISABLE
1931 }
1932 #[doc = "Checks if the value of the field is `ENABLE`"]
1933 #[inline(always)]
1934 pub fn is_enable(&self) -> bool {
1935 **self == ADC_A::ENABLE
1936 }
1937}
1938impl core::ops::Deref for ADC_R {
1939 type Target = crate::FieldReader<bool, ADC_A>;
1940 #[inline(always)]
1941 fn deref(&self) -> &Self::Target {
1942 &self.0
1943 }
1944}
1945#[doc = "Field `ADC` writer - Enables clock for ADC."]
1946pub struct ADC_W<'a> {
1947 w: &'a mut W,
1948}
1949impl<'a> ADC_W<'a> {
1950 #[doc = r"Writes `variant` to the field"]
1951 #[inline(always)]
1952 pub fn variant(self, variant: ADC_A) -> &'a mut W {
1953 self.bit(variant.into())
1954 }
1955 #[doc = "disable"]
1956 #[inline(always)]
1957 pub fn disable(self) -> &'a mut W {
1958 self.variant(ADC_A::DISABLE)
1959 }
1960 #[doc = "enable"]
1961 #[inline(always)]
1962 pub fn enable(self) -> &'a mut W {
1963 self.variant(ADC_A::ENABLE)
1964 }
1965 #[doc = r"Sets the field bit"]
1966 #[inline(always)]
1967 pub fn set_bit(self) -> &'a mut W {
1968 self.bit(true)
1969 }
1970 #[doc = r"Clears the field bit"]
1971 #[inline(always)]
1972 pub fn clear_bit(self) -> &'a mut W {
1973 self.bit(false)
1974 }
1975 #[doc = r"Writes raw bits to the field"]
1976 #[inline(always)]
1977 pub fn bit(self, value: bool) -> &'a mut W {
1978 self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
1979 self.w
1980 }
1981}
1982#[doc = "Enables clock for CTIMER.\n\nValue on reset: 0"]
1983#[derive(Clone, Copy, Debug, PartialEq)]
1984pub enum CTIMER_A {
1985 #[doc = "0: disable"]
1986 DISABLE = 0,
1987 #[doc = "1: enable"]
1988 ENABLE = 1,
1989}
1990impl From<CTIMER_A> for bool {
1991 #[inline(always)]
1992 fn from(variant: CTIMER_A) -> Self {
1993 variant as u8 != 0
1994 }
1995}
1996#[doc = "Field `CTIMER` reader - Enables clock for CTIMER."]
1997pub struct CTIMER_R(crate::FieldReader<bool, CTIMER_A>);
1998impl CTIMER_R {
1999 pub(crate) fn new(bits: bool) -> Self {
2000 CTIMER_R(crate::FieldReader::new(bits))
2001 }
2002 #[doc = r"Get enumerated values variant"]
2003 #[inline(always)]
2004 pub fn variant(&self) -> CTIMER_A {
2005 match self.bits {
2006 false => CTIMER_A::DISABLE,
2007 true => CTIMER_A::ENABLE,
2008 }
2009 }
2010 #[doc = "Checks if the value of the field is `DISABLE`"]
2011 #[inline(always)]
2012 pub fn is_disable(&self) -> bool {
2013 **self == CTIMER_A::DISABLE
2014 }
2015 #[doc = "Checks if the value of the field is `ENABLE`"]
2016 #[inline(always)]
2017 pub fn is_enable(&self) -> bool {
2018 **self == CTIMER_A::ENABLE
2019 }
2020}
2021impl core::ops::Deref for CTIMER_R {
2022 type Target = crate::FieldReader<bool, CTIMER_A>;
2023 #[inline(always)]
2024 fn deref(&self) -> &Self::Target {
2025 &self.0
2026 }
2027}
2028#[doc = "Field `CTIMER` writer - Enables clock for CTIMER."]
2029pub struct CTIMER_W<'a> {
2030 w: &'a mut W,
2031}
2032impl<'a> CTIMER_W<'a> {
2033 #[doc = r"Writes `variant` to the field"]
2034 #[inline(always)]
2035 pub fn variant(self, variant: CTIMER_A) -> &'a mut W {
2036 self.bit(variant.into())
2037 }
2038 #[doc = "disable"]
2039 #[inline(always)]
2040 pub fn disable(self) -> &'a mut W {
2041 self.variant(CTIMER_A::DISABLE)
2042 }
2043 #[doc = "enable"]
2044 #[inline(always)]
2045 pub fn enable(self) -> &'a mut W {
2046 self.variant(CTIMER_A::ENABLE)
2047 }
2048 #[doc = r"Sets the field bit"]
2049 #[inline(always)]
2050 pub fn set_bit(self) -> &'a mut W {
2051 self.bit(true)
2052 }
2053 #[doc = r"Clears the field bit"]
2054 #[inline(always)]
2055 pub fn clear_bit(self) -> &'a mut W {
2056 self.bit(false)
2057 }
2058 #[doc = r"Writes raw bits to the field"]
2059 #[inline(always)]
2060 pub fn bit(self, value: bool) -> &'a mut W {
2061 self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
2062 self.w
2063 }
2064}
2065#[doc = "Enables clock to micro-trace buffer control registers. Turn on this clock when using the micro-trace buffer for debug purposes.\n\nValue on reset: 0"]
2066#[derive(Clone, Copy, Debug, PartialEq)]
2067pub enum MTB_A {
2068 #[doc = "0: disable"]
2069 DISABLE = 0,
2070 #[doc = "1: enable"]
2071 ENABLE = 1,
2072}
2073impl From<MTB_A> for bool {
2074 #[inline(always)]
2075 fn from(variant: MTB_A) -> Self {
2076 variant as u8 != 0
2077 }
2078}
2079#[doc = "Field `MTB` reader - Enables clock to micro-trace buffer control registers. Turn on this clock when using the micro-trace buffer for debug purposes."]
2080pub struct MTB_R(crate::FieldReader<bool, MTB_A>);
2081impl MTB_R {
2082 pub(crate) fn new(bits: bool) -> Self {
2083 MTB_R(crate::FieldReader::new(bits))
2084 }
2085 #[doc = r"Get enumerated values variant"]
2086 #[inline(always)]
2087 pub fn variant(&self) -> MTB_A {
2088 match self.bits {
2089 false => MTB_A::DISABLE,
2090 true => MTB_A::ENABLE,
2091 }
2092 }
2093 #[doc = "Checks if the value of the field is `DISABLE`"]
2094 #[inline(always)]
2095 pub fn is_disable(&self) -> bool {
2096 **self == MTB_A::DISABLE
2097 }
2098 #[doc = "Checks if the value of the field is `ENABLE`"]
2099 #[inline(always)]
2100 pub fn is_enable(&self) -> bool {
2101 **self == MTB_A::ENABLE
2102 }
2103}
2104impl core::ops::Deref for MTB_R {
2105 type Target = crate::FieldReader<bool, MTB_A>;
2106 #[inline(always)]
2107 fn deref(&self) -> &Self::Target {
2108 &self.0
2109 }
2110}
2111#[doc = "Field `MTB` writer - Enables clock to micro-trace buffer control registers. Turn on this clock when using the micro-trace buffer for debug purposes."]
2112pub struct MTB_W<'a> {
2113 w: &'a mut W,
2114}
2115impl<'a> MTB_W<'a> {
2116 #[doc = r"Writes `variant` to the field"]
2117 #[inline(always)]
2118 pub fn variant(self, variant: MTB_A) -> &'a mut W {
2119 self.bit(variant.into())
2120 }
2121 #[doc = "disable"]
2122 #[inline(always)]
2123 pub fn disable(self) -> &'a mut W {
2124 self.variant(MTB_A::DISABLE)
2125 }
2126 #[doc = "enable"]
2127 #[inline(always)]
2128 pub fn enable(self) -> &'a mut W {
2129 self.variant(MTB_A::ENABLE)
2130 }
2131 #[doc = r"Sets the field bit"]
2132 #[inline(always)]
2133 pub fn set_bit(self) -> &'a mut W {
2134 self.bit(true)
2135 }
2136 #[doc = r"Clears the field bit"]
2137 #[inline(always)]
2138 pub fn clear_bit(self) -> &'a mut W {
2139 self.bit(false)
2140 }
2141 #[doc = r"Writes raw bits to the field"]
2142 #[inline(always)]
2143 pub fn bit(self, value: bool) -> &'a mut W {
2144 self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
2145 self.w
2146 }
2147}
2148#[doc = "Enables clock for DAC0.\n\nValue on reset: 0"]
2149#[derive(Clone, Copy, Debug, PartialEq)]
2150pub enum DAC0_A {
2151 #[doc = "0: disable"]
2152 DISABLE = 0,
2153 #[doc = "1: enable"]
2154 ENABLE = 1,
2155}
2156impl From<DAC0_A> for bool {
2157 #[inline(always)]
2158 fn from(variant: DAC0_A) -> Self {
2159 variant as u8 != 0
2160 }
2161}
2162#[doc = "Field `DAC0` reader - Enables clock for DAC0."]
2163pub struct DAC0_R(crate::FieldReader<bool, DAC0_A>);
2164impl DAC0_R {
2165 pub(crate) fn new(bits: bool) -> Self {
2166 DAC0_R(crate::FieldReader::new(bits))
2167 }
2168 #[doc = r"Get enumerated values variant"]
2169 #[inline(always)]
2170 pub fn variant(&self) -> DAC0_A {
2171 match self.bits {
2172 false => DAC0_A::DISABLE,
2173 true => DAC0_A::ENABLE,
2174 }
2175 }
2176 #[doc = "Checks if the value of the field is `DISABLE`"]
2177 #[inline(always)]
2178 pub fn is_disable(&self) -> bool {
2179 **self == DAC0_A::DISABLE
2180 }
2181 #[doc = "Checks if the value of the field is `ENABLE`"]
2182 #[inline(always)]
2183 pub fn is_enable(&self) -> bool {
2184 **self == DAC0_A::ENABLE
2185 }
2186}
2187impl core::ops::Deref for DAC0_R {
2188 type Target = crate::FieldReader<bool, DAC0_A>;
2189 #[inline(always)]
2190 fn deref(&self) -> &Self::Target {
2191 &self.0
2192 }
2193}
2194#[doc = "Field `DAC0` writer - Enables clock for DAC0."]
2195pub struct DAC0_W<'a> {
2196 w: &'a mut W,
2197}
2198impl<'a> DAC0_W<'a> {
2199 #[doc = r"Writes `variant` to the field"]
2200 #[inline(always)]
2201 pub fn variant(self, variant: DAC0_A) -> &'a mut W {
2202 self.bit(variant.into())
2203 }
2204 #[doc = "disable"]
2205 #[inline(always)]
2206 pub fn disable(self) -> &'a mut W {
2207 self.variant(DAC0_A::DISABLE)
2208 }
2209 #[doc = "enable"]
2210 #[inline(always)]
2211 pub fn enable(self) -> &'a mut W {
2212 self.variant(DAC0_A::ENABLE)
2213 }
2214 #[doc = r"Sets the field bit"]
2215 #[inline(always)]
2216 pub fn set_bit(self) -> &'a mut W {
2217 self.bit(true)
2218 }
2219 #[doc = r"Clears the field bit"]
2220 #[inline(always)]
2221 pub fn clear_bit(self) -> &'a mut W {
2222 self.bit(false)
2223 }
2224 #[doc = r"Writes raw bits to the field"]
2225 #[inline(always)]
2226 pub fn bit(self, value: bool) -> &'a mut W {
2227 self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
2228 self.w
2229 }
2230}
2231#[doc = "Enable clock for GPIO pin interrupt registers\n\nValue on reset: 0"]
2232#[derive(Clone, Copy, Debug, PartialEq)]
2233pub enum GPIO_INT_A {
2234 #[doc = "0: disable"]
2235 DISABLE = 0,
2236 #[doc = "1: enable"]
2237 ENABLE = 1,
2238}
2239impl From<GPIO_INT_A> for bool {
2240 #[inline(always)]
2241 fn from(variant: GPIO_INT_A) -> Self {
2242 variant as u8 != 0
2243 }
2244}
2245#[doc = "Field `GPIO_INT` reader - Enable clock for GPIO pin interrupt registers"]
2246pub struct GPIO_INT_R(crate::FieldReader<bool, GPIO_INT_A>);
2247impl GPIO_INT_R {
2248 pub(crate) fn new(bits: bool) -> Self {
2249 GPIO_INT_R(crate::FieldReader::new(bits))
2250 }
2251 #[doc = r"Get enumerated values variant"]
2252 #[inline(always)]
2253 pub fn variant(&self) -> GPIO_INT_A {
2254 match self.bits {
2255 false => GPIO_INT_A::DISABLE,
2256 true => GPIO_INT_A::ENABLE,
2257 }
2258 }
2259 #[doc = "Checks if the value of the field is `DISABLE`"]
2260 #[inline(always)]
2261 pub fn is_disable(&self) -> bool {
2262 **self == GPIO_INT_A::DISABLE
2263 }
2264 #[doc = "Checks if the value of the field is `ENABLE`"]
2265 #[inline(always)]
2266 pub fn is_enable(&self) -> bool {
2267 **self == GPIO_INT_A::ENABLE
2268 }
2269}
2270impl core::ops::Deref for GPIO_INT_R {
2271 type Target = crate::FieldReader<bool, GPIO_INT_A>;
2272 #[inline(always)]
2273 fn deref(&self) -> &Self::Target {
2274 &self.0
2275 }
2276}
2277#[doc = "Field `GPIO_INT` writer - Enable clock for GPIO pin interrupt registers"]
2278pub struct GPIO_INT_W<'a> {
2279 w: &'a mut W,
2280}
2281impl<'a> GPIO_INT_W<'a> {
2282 #[doc = r"Writes `variant` to the field"]
2283 #[inline(always)]
2284 pub fn variant(self, variant: GPIO_INT_A) -> &'a mut W {
2285 self.bit(variant.into())
2286 }
2287 #[doc = "disable"]
2288 #[inline(always)]
2289 pub fn disable(self) -> &'a mut W {
2290 self.variant(GPIO_INT_A::DISABLE)
2291 }
2292 #[doc = "enable"]
2293 #[inline(always)]
2294 pub fn enable(self) -> &'a mut W {
2295 self.variant(GPIO_INT_A::ENABLE)
2296 }
2297 #[doc = r"Sets the field bit"]
2298 #[inline(always)]
2299 pub fn set_bit(self) -> &'a mut W {
2300 self.bit(true)
2301 }
2302 #[doc = r"Clears the field bit"]
2303 #[inline(always)]
2304 pub fn clear_bit(self) -> &'a mut W {
2305 self.bit(false)
2306 }
2307 #[doc = r"Writes raw bits to the field"]
2308 #[inline(always)]
2309 pub fn bit(self, value: bool) -> &'a mut W {
2310 self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
2311 self.w
2312 }
2313}
2314#[doc = "Enables clock for DMA.\n\nValue on reset: 0"]
2315#[derive(Clone, Copy, Debug, PartialEq)]
2316pub enum DMA_A {
2317 #[doc = "0: disable"]
2318 DISABLE = 0,
2319 #[doc = "1: enable"]
2320 ENABLE = 1,
2321}
2322impl From<DMA_A> for bool {
2323 #[inline(always)]
2324 fn from(variant: DMA_A) -> Self {
2325 variant as u8 != 0
2326 }
2327}
2328#[doc = "Field `DMA` reader - Enables clock for DMA."]
2329pub struct DMA_R(crate::FieldReader<bool, DMA_A>);
2330impl DMA_R {
2331 pub(crate) fn new(bits: bool) -> Self {
2332 DMA_R(crate::FieldReader::new(bits))
2333 }
2334 #[doc = r"Get enumerated values variant"]
2335 #[inline(always)]
2336 pub fn variant(&self) -> DMA_A {
2337 match self.bits {
2338 false => DMA_A::DISABLE,
2339 true => DMA_A::ENABLE,
2340 }
2341 }
2342 #[doc = "Checks if the value of the field is `DISABLE`"]
2343 #[inline(always)]
2344 pub fn is_disable(&self) -> bool {
2345 **self == DMA_A::DISABLE
2346 }
2347 #[doc = "Checks if the value of the field is `ENABLE`"]
2348 #[inline(always)]
2349 pub fn is_enable(&self) -> bool {
2350 **self == DMA_A::ENABLE
2351 }
2352}
2353impl core::ops::Deref for DMA_R {
2354 type Target = crate::FieldReader<bool, DMA_A>;
2355 #[inline(always)]
2356 fn deref(&self) -> &Self::Target {
2357 &self.0
2358 }
2359}
2360#[doc = "Field `DMA` writer - Enables clock for DMA."]
2361pub struct DMA_W<'a> {
2362 w: &'a mut W,
2363}
2364impl<'a> DMA_W<'a> {
2365 #[doc = r"Writes `variant` to the field"]
2366 #[inline(always)]
2367 pub fn variant(self, variant: DMA_A) -> &'a mut W {
2368 self.bit(variant.into())
2369 }
2370 #[doc = "disable"]
2371 #[inline(always)]
2372 pub fn disable(self) -> &'a mut W {
2373 self.variant(DMA_A::DISABLE)
2374 }
2375 #[doc = "enable"]
2376 #[inline(always)]
2377 pub fn enable(self) -> &'a mut W {
2378 self.variant(DMA_A::ENABLE)
2379 }
2380 #[doc = r"Sets the field bit"]
2381 #[inline(always)]
2382 pub fn set_bit(self) -> &'a mut W {
2383 self.bit(true)
2384 }
2385 #[doc = r"Clears the field bit"]
2386 #[inline(always)]
2387 pub fn clear_bit(self) -> &'a mut W {
2388 self.bit(false)
2389 }
2390 #[doc = r"Writes raw bits to the field"]
2391 #[inline(always)]
2392 pub fn bit(self, value: bool) -> &'a mut W {
2393 self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
2394 self.w
2395 }
2396}
2397#[doc = "Enables clock for UART3.\n\nValue on reset: 0"]
2398#[derive(Clone, Copy, Debug, PartialEq)]
2399pub enum UART3_A {
2400 #[doc = "0: disable"]
2401 DISABLE = 0,
2402 #[doc = "1: enable"]
2403 ENABLE = 1,
2404}
2405impl From<UART3_A> for bool {
2406 #[inline(always)]
2407 fn from(variant: UART3_A) -> Self {
2408 variant as u8 != 0
2409 }
2410}
2411#[doc = "Field `UART3` reader - Enables clock for UART3."]
2412pub struct UART3_R(crate::FieldReader<bool, UART3_A>);
2413impl UART3_R {
2414 pub(crate) fn new(bits: bool) -> Self {
2415 UART3_R(crate::FieldReader::new(bits))
2416 }
2417 #[doc = r"Get enumerated values variant"]
2418 #[inline(always)]
2419 pub fn variant(&self) -> UART3_A {
2420 match self.bits {
2421 false => UART3_A::DISABLE,
2422 true => UART3_A::ENABLE,
2423 }
2424 }
2425 #[doc = "Checks if the value of the field is `DISABLE`"]
2426 #[inline(always)]
2427 pub fn is_disable(&self) -> bool {
2428 **self == UART3_A::DISABLE
2429 }
2430 #[doc = "Checks if the value of the field is `ENABLE`"]
2431 #[inline(always)]
2432 pub fn is_enable(&self) -> bool {
2433 **self == UART3_A::ENABLE
2434 }
2435}
2436impl core::ops::Deref for UART3_R {
2437 type Target = crate::FieldReader<bool, UART3_A>;
2438 #[inline(always)]
2439 fn deref(&self) -> &Self::Target {
2440 &self.0
2441 }
2442}
2443#[doc = "Field `UART3` writer - Enables clock for UART3."]
2444pub struct UART3_W<'a> {
2445 w: &'a mut W,
2446}
2447impl<'a> UART3_W<'a> {
2448 #[doc = r"Writes `variant` to the field"]
2449 #[inline(always)]
2450 pub fn variant(self, variant: UART3_A) -> &'a mut W {
2451 self.bit(variant.into())
2452 }
2453 #[doc = "disable"]
2454 #[inline(always)]
2455 pub fn disable(self) -> &'a mut W {
2456 self.variant(UART3_A::DISABLE)
2457 }
2458 #[doc = "enable"]
2459 #[inline(always)]
2460 pub fn enable(self) -> &'a mut W {
2461 self.variant(UART3_A::ENABLE)
2462 }
2463 #[doc = r"Sets the field bit"]
2464 #[inline(always)]
2465 pub fn set_bit(self) -> &'a mut W {
2466 self.bit(true)
2467 }
2468 #[doc = r"Clears the field bit"]
2469 #[inline(always)]
2470 pub fn clear_bit(self) -> &'a mut W {
2471 self.bit(false)
2472 }
2473 #[doc = r"Writes raw bits to the field"]
2474 #[inline(always)]
2475 pub fn bit(self, value: bool) -> &'a mut W {
2476 self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
2477 self.w
2478 }
2479}
2480#[doc = "Enables clock for UART4.\n\nValue on reset: 0"]
2481#[derive(Clone, Copy, Debug, PartialEq)]
2482pub enum UART4_A {
2483 #[doc = "0: disable"]
2484 DISABLE = 0,
2485 #[doc = "1: enable"]
2486 ENABLE = 1,
2487}
2488impl From<UART4_A> for bool {
2489 #[inline(always)]
2490 fn from(variant: UART4_A) -> Self {
2491 variant as u8 != 0
2492 }
2493}
2494#[doc = "Field `UART4` reader - Enables clock for UART4."]
2495pub struct UART4_R(crate::FieldReader<bool, UART4_A>);
2496impl UART4_R {
2497 pub(crate) fn new(bits: bool) -> Self {
2498 UART4_R(crate::FieldReader::new(bits))
2499 }
2500 #[doc = r"Get enumerated values variant"]
2501 #[inline(always)]
2502 pub fn variant(&self) -> UART4_A {
2503 match self.bits {
2504 false => UART4_A::DISABLE,
2505 true => UART4_A::ENABLE,
2506 }
2507 }
2508 #[doc = "Checks if the value of the field is `DISABLE`"]
2509 #[inline(always)]
2510 pub fn is_disable(&self) -> bool {
2511 **self == UART4_A::DISABLE
2512 }
2513 #[doc = "Checks if the value of the field is `ENABLE`"]
2514 #[inline(always)]
2515 pub fn is_enable(&self) -> bool {
2516 **self == UART4_A::ENABLE
2517 }
2518}
2519impl core::ops::Deref for UART4_R {
2520 type Target = crate::FieldReader<bool, UART4_A>;
2521 #[inline(always)]
2522 fn deref(&self) -> &Self::Target {
2523 &self.0
2524 }
2525}
2526#[doc = "Field `UART4` writer - Enables clock for UART4."]
2527pub struct UART4_W<'a> {
2528 w: &'a mut W,
2529}
2530impl<'a> UART4_W<'a> {
2531 #[doc = r"Writes `variant` to the field"]
2532 #[inline(always)]
2533 pub fn variant(self, variant: UART4_A) -> &'a mut W {
2534 self.bit(variant.into())
2535 }
2536 #[doc = "disable"]
2537 #[inline(always)]
2538 pub fn disable(self) -> &'a mut W {
2539 self.variant(UART4_A::DISABLE)
2540 }
2541 #[doc = "enable"]
2542 #[inline(always)]
2543 pub fn enable(self) -> &'a mut W {
2544 self.variant(UART4_A::ENABLE)
2545 }
2546 #[doc = r"Sets the field bit"]
2547 #[inline(always)]
2548 pub fn set_bit(self) -> &'a mut W {
2549 self.bit(true)
2550 }
2551 #[doc = r"Clears the field bit"]
2552 #[inline(always)]
2553 pub fn clear_bit(self) -> &'a mut W {
2554 self.bit(false)
2555 }
2556 #[doc = r"Writes raw bits to the field"]
2557 #[inline(always)]
2558 pub fn bit(self, value: bool) -> &'a mut W {
2559 self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
2560 self.w
2561 }
2562}
2563impl R {
2564 #[doc = "Bit 0 - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
2565 #[inline(always)]
2566 pub fn sys(&self) -> SYS_R {
2567 SYS_R::new((self.bits & 0x01) != 0)
2568 }
2569 #[doc = "Bit 1 - Enables clock for ROM."]
2570 #[inline(always)]
2571 pub fn rom(&self) -> ROM_R {
2572 ROM_R::new(((self.bits >> 1) & 0x01) != 0)
2573 }
2574 #[doc = "Bit 2 - Enables clock for SRAM0 and SRAM1."]
2575 #[inline(always)]
2576 pub fn ram0_1(&self) -> RAM0_1_R {
2577 RAM0_1_R::new(((self.bits >> 2) & 0x01) != 0)
2578 }
2579 #[doc = "Bit 4 - Enables clock for flash."]
2580 #[inline(always)]
2581 pub fn flash(&self) -> FLASH_R {
2582 FLASH_R::new(((self.bits >> 4) & 0x01) != 0)
2583 }
2584 #[doc = "Bit 5 - Enables clock for I2C0."]
2585 #[inline(always)]
2586 pub fn i2c0(&self) -> I2C0_R {
2587 I2C0_R::new(((self.bits >> 5) & 0x01) != 0)
2588 }
2589 #[doc = "Bit 6 - Enables clock for GPIO0 port registers."]
2590 #[inline(always)]
2591 pub fn gpio0(&self) -> GPIO0_R {
2592 GPIO0_R::new(((self.bits >> 6) & 0x01) != 0)
2593 }
2594 #[doc = "Bit 7 - Enables clock for switch matrix."]
2595 #[inline(always)]
2596 pub fn swm(&self) -> SWM_R {
2597 SWM_R::new(((self.bits >> 7) & 0x01) != 0)
2598 }
2599 #[doc = "Bit 8 - Enables clock for state configurable timer SCTimer/PWM."]
2600 #[inline(always)]
2601 pub fn sct(&self) -> SCT_R {
2602 SCT_R::new(((self.bits >> 8) & 0x01) != 0)
2603 }
2604 #[doc = "Bit 9 - Enables clock for self-wake-up timer."]
2605 #[inline(always)]
2606 pub fn wkt(&self) -> WKT_R {
2607 WKT_R::new(((self.bits >> 9) & 0x01) != 0)
2608 }
2609 #[doc = "Bit 10 - Enables clock for multi-rate timer."]
2610 #[inline(always)]
2611 pub fn mrt(&self) -> MRT_R {
2612 MRT_R::new(((self.bits >> 10) & 0x01) != 0)
2613 }
2614 #[doc = "Bit 11 - Enables clock for SPI0."]
2615 #[inline(always)]
2616 pub fn spi0(&self) -> SPI0_R {
2617 SPI0_R::new(((self.bits >> 11) & 0x01) != 0)
2618 }
2619 #[doc = "Bit 12 - Enables clock for SPI1."]
2620 #[inline(always)]
2621 pub fn spi1(&self) -> SPI1_R {
2622 SPI1_R::new(((self.bits >> 12) & 0x01) != 0)
2623 }
2624 #[doc = "Bit 13 - Enables clock for CRC."]
2625 #[inline(always)]
2626 pub fn crc(&self) -> CRC_R {
2627 CRC_R::new(((self.bits >> 13) & 0x01) != 0)
2628 }
2629 #[doc = "Bit 14 - Enables clock for UART0."]
2630 #[inline(always)]
2631 pub fn uart0(&self) -> UART0_R {
2632 UART0_R::new(((self.bits >> 14) & 0x01) != 0)
2633 }
2634 #[doc = "Bit 15 - Enables clock for UART1."]
2635 #[inline(always)]
2636 pub fn uart1(&self) -> UART1_R {
2637 UART1_R::new(((self.bits >> 15) & 0x01) != 0)
2638 }
2639 #[doc = "Bit 16 - Enables clock for UART2."]
2640 #[inline(always)]
2641 pub fn uart2(&self) -> UART2_R {
2642 UART2_R::new(((self.bits >> 16) & 0x01) != 0)
2643 }
2644 #[doc = "Bit 17 - Enables clock for WWDT."]
2645 #[inline(always)]
2646 pub fn wwdt(&self) -> WWDT_R {
2647 WWDT_R::new(((self.bits >> 17) & 0x01) != 0)
2648 }
2649 #[doc = "Bit 18 - Enables clock for IOCON."]
2650 #[inline(always)]
2651 pub fn iocon(&self) -> IOCON_R {
2652 IOCON_R::new(((self.bits >> 18) & 0x01) != 0)
2653 }
2654 #[doc = "Bit 19 - Enables clock for analog comparator."]
2655 #[inline(always)]
2656 pub fn acmp(&self) -> ACMP_R {
2657 ACMP_R::new(((self.bits >> 19) & 0x01) != 0)
2658 }
2659 #[doc = "Bit 20 - Enables clock for GPIO1 port registers."]
2660 #[inline(always)]
2661 pub fn gpio1(&self) -> GPIO1_R {
2662 GPIO1_R::new(((self.bits >> 20) & 0x01) != 0)
2663 }
2664 #[doc = "Bit 21 - Enables clock for I2C1."]
2665 #[inline(always)]
2666 pub fn i2c1(&self) -> I2C1_R {
2667 I2C1_R::new(((self.bits >> 21) & 0x01) != 0)
2668 }
2669 #[doc = "Bit 22 - Enables clock for I2C2."]
2670 #[inline(always)]
2671 pub fn i2c2(&self) -> I2C2_R {
2672 I2C2_R::new(((self.bits >> 22) & 0x01) != 0)
2673 }
2674 #[doc = "Bit 23 - Enables clock for I2C3."]
2675 #[inline(always)]
2676 pub fn i2c3(&self) -> I2C3_R {
2677 I2C3_R::new(((self.bits >> 23) & 0x01) != 0)
2678 }
2679 #[doc = "Bit 24 - Enables clock for ADC."]
2680 #[inline(always)]
2681 pub fn adc(&self) -> ADC_R {
2682 ADC_R::new(((self.bits >> 24) & 0x01) != 0)
2683 }
2684 #[doc = "Bit 25 - Enables clock for CTIMER."]
2685 #[inline(always)]
2686 pub fn ctimer(&self) -> CTIMER_R {
2687 CTIMER_R::new(((self.bits >> 25) & 0x01) != 0)
2688 }
2689 #[doc = "Bit 26 - Enables clock to micro-trace buffer control registers. Turn on this clock when using the micro-trace buffer for debug purposes."]
2690 #[inline(always)]
2691 pub fn mtb(&self) -> MTB_R {
2692 MTB_R::new(((self.bits >> 26) & 0x01) != 0)
2693 }
2694 #[doc = "Bit 27 - Enables clock for DAC0."]
2695 #[inline(always)]
2696 pub fn dac0(&self) -> DAC0_R {
2697 DAC0_R::new(((self.bits >> 27) & 0x01) != 0)
2698 }
2699 #[doc = "Bit 28 - Enable clock for GPIO pin interrupt registers"]
2700 #[inline(always)]
2701 pub fn gpio_int(&self) -> GPIO_INT_R {
2702 GPIO_INT_R::new(((self.bits >> 28) & 0x01) != 0)
2703 }
2704 #[doc = "Bit 29 - Enables clock for DMA."]
2705 #[inline(always)]
2706 pub fn dma(&self) -> DMA_R {
2707 DMA_R::new(((self.bits >> 29) & 0x01) != 0)
2708 }
2709 #[doc = "Bit 30 - Enables clock for UART3."]
2710 #[inline(always)]
2711 pub fn uart3(&self) -> UART3_R {
2712 UART3_R::new(((self.bits >> 30) & 0x01) != 0)
2713 }
2714 #[doc = "Bit 31 - Enables clock for UART4."]
2715 #[inline(always)]
2716 pub fn uart4(&self) -> UART4_R {
2717 UART4_R::new(((self.bits >> 31) & 0x01) != 0)
2718 }
2719}
2720impl W {
2721 #[doc = "Bit 0 - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
2722 #[inline(always)]
2723 pub fn sys(&mut self) -> SYS_W {
2724 SYS_W { w: self }
2725 }
2726 #[doc = "Bit 1 - Enables clock for ROM."]
2727 #[inline(always)]
2728 pub fn rom(&mut self) -> ROM_W {
2729 ROM_W { w: self }
2730 }
2731 #[doc = "Bit 2 - Enables clock for SRAM0 and SRAM1."]
2732 #[inline(always)]
2733 pub fn ram0_1(&mut self) -> RAM0_1_W {
2734 RAM0_1_W { w: self }
2735 }
2736 #[doc = "Bit 4 - Enables clock for flash."]
2737 #[inline(always)]
2738 pub fn flash(&mut self) -> FLASH_W {
2739 FLASH_W { w: self }
2740 }
2741 #[doc = "Bit 5 - Enables clock for I2C0."]
2742 #[inline(always)]
2743 pub fn i2c0(&mut self) -> I2C0_W {
2744 I2C0_W { w: self }
2745 }
2746 #[doc = "Bit 6 - Enables clock for GPIO0 port registers."]
2747 #[inline(always)]
2748 pub fn gpio0(&mut self) -> GPIO0_W {
2749 GPIO0_W { w: self }
2750 }
2751 #[doc = "Bit 7 - Enables clock for switch matrix."]
2752 #[inline(always)]
2753 pub fn swm(&mut self) -> SWM_W {
2754 SWM_W { w: self }
2755 }
2756 #[doc = "Bit 8 - Enables clock for state configurable timer SCTimer/PWM."]
2757 #[inline(always)]
2758 pub fn sct(&mut self) -> SCT_W {
2759 SCT_W { w: self }
2760 }
2761 #[doc = "Bit 9 - Enables clock for self-wake-up timer."]
2762 #[inline(always)]
2763 pub fn wkt(&mut self) -> WKT_W {
2764 WKT_W { w: self }
2765 }
2766 #[doc = "Bit 10 - Enables clock for multi-rate timer."]
2767 #[inline(always)]
2768 pub fn mrt(&mut self) -> MRT_W {
2769 MRT_W { w: self }
2770 }
2771 #[doc = "Bit 11 - Enables clock for SPI0."]
2772 #[inline(always)]
2773 pub fn spi0(&mut self) -> SPI0_W {
2774 SPI0_W { w: self }
2775 }
2776 #[doc = "Bit 12 - Enables clock for SPI1."]
2777 #[inline(always)]
2778 pub fn spi1(&mut self) -> SPI1_W {
2779 SPI1_W { w: self }
2780 }
2781 #[doc = "Bit 13 - Enables clock for CRC."]
2782 #[inline(always)]
2783 pub fn crc(&mut self) -> CRC_W {
2784 CRC_W { w: self }
2785 }
2786 #[doc = "Bit 14 - Enables clock for UART0."]
2787 #[inline(always)]
2788 pub fn uart0(&mut self) -> UART0_W {
2789 UART0_W { w: self }
2790 }
2791 #[doc = "Bit 15 - Enables clock for UART1."]
2792 #[inline(always)]
2793 pub fn uart1(&mut self) -> UART1_W {
2794 UART1_W { w: self }
2795 }
2796 #[doc = "Bit 16 - Enables clock for UART2."]
2797 #[inline(always)]
2798 pub fn uart2(&mut self) -> UART2_W {
2799 UART2_W { w: self }
2800 }
2801 #[doc = "Bit 17 - Enables clock for WWDT."]
2802 #[inline(always)]
2803 pub fn wwdt(&mut self) -> WWDT_W {
2804 WWDT_W { w: self }
2805 }
2806 #[doc = "Bit 18 - Enables clock for IOCON."]
2807 #[inline(always)]
2808 pub fn iocon(&mut self) -> IOCON_W {
2809 IOCON_W { w: self }
2810 }
2811 #[doc = "Bit 19 - Enables clock for analog comparator."]
2812 #[inline(always)]
2813 pub fn acmp(&mut self) -> ACMP_W {
2814 ACMP_W { w: self }
2815 }
2816 #[doc = "Bit 20 - Enables clock for GPIO1 port registers."]
2817 #[inline(always)]
2818 pub fn gpio1(&mut self) -> GPIO1_W {
2819 GPIO1_W { w: self }
2820 }
2821 #[doc = "Bit 21 - Enables clock for I2C1."]
2822 #[inline(always)]
2823 pub fn i2c1(&mut self) -> I2C1_W {
2824 I2C1_W { w: self }
2825 }
2826 #[doc = "Bit 22 - Enables clock for I2C2."]
2827 #[inline(always)]
2828 pub fn i2c2(&mut self) -> I2C2_W {
2829 I2C2_W { w: self }
2830 }
2831 #[doc = "Bit 23 - Enables clock for I2C3."]
2832 #[inline(always)]
2833 pub fn i2c3(&mut self) -> I2C3_W {
2834 I2C3_W { w: self }
2835 }
2836 #[doc = "Bit 24 - Enables clock for ADC."]
2837 #[inline(always)]
2838 pub fn adc(&mut self) -> ADC_W {
2839 ADC_W { w: self }
2840 }
2841 #[doc = "Bit 25 - Enables clock for CTIMER."]
2842 #[inline(always)]
2843 pub fn ctimer(&mut self) -> CTIMER_W {
2844 CTIMER_W { w: self }
2845 }
2846 #[doc = "Bit 26 - Enables clock to micro-trace buffer control registers. Turn on this clock when using the micro-trace buffer for debug purposes."]
2847 #[inline(always)]
2848 pub fn mtb(&mut self) -> MTB_W {
2849 MTB_W { w: self }
2850 }
2851 #[doc = "Bit 27 - Enables clock for DAC0."]
2852 #[inline(always)]
2853 pub fn dac0(&mut self) -> DAC0_W {
2854 DAC0_W { w: self }
2855 }
2856 #[doc = "Bit 28 - Enable clock for GPIO pin interrupt registers"]
2857 #[inline(always)]
2858 pub fn gpio_int(&mut self) -> GPIO_INT_W {
2859 GPIO_INT_W { w: self }
2860 }
2861 #[doc = "Bit 29 - Enables clock for DMA."]
2862 #[inline(always)]
2863 pub fn dma(&mut self) -> DMA_W {
2864 DMA_W { w: self }
2865 }
2866 #[doc = "Bit 30 - Enables clock for UART3."]
2867 #[inline(always)]
2868 pub fn uart3(&mut self) -> UART3_W {
2869 UART3_W { w: self }
2870 }
2871 #[doc = "Bit 31 - Enables clock for UART4."]
2872 #[inline(always)]
2873 pub fn uart4(&mut self) -> UART4_W {
2874 UART4_W { w: self }
2875 }
2876 #[doc = "Writes raw bits to the register."]
2877 #[inline(always)]
2878 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
2879 self.0.bits(bits);
2880 self
2881 }
2882}
2883#[doc = "System clock group 0 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysahbclkctrl0](index.html) module"]
2884pub struct SYSAHBCLKCTRL0_SPEC;
2885impl crate::RegisterSpec for SYSAHBCLKCTRL0_SPEC {
2886 type Ux = u32;
2887}
2888#[doc = "`read()` method returns [sysahbclkctrl0::R](R) reader structure"]
2889impl crate::Readable for SYSAHBCLKCTRL0_SPEC {
2890 type Reader = R;
2891}
2892#[doc = "`write(|w| ..)` method takes [sysahbclkctrl0::W](W) writer structure"]
2893impl crate::Writable for SYSAHBCLKCTRL0_SPEC {
2894 type Writer = W;
2895}
2896#[doc = "`reset()` method sets SYSAHBCLKCTRL0 to value 0x17"]
2897impl crate::Resettable for SYSAHBCLKCTRL0_SPEC {
2898 #[inline(always)]
2899 fn reset_value() -> Self::Ux {
2900 0x17
2901 }
2902}