1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - System Remap register"]
5 pub sysmemremap: crate::Reg<sysmemremap::SYSMEMREMAP_SPEC>,
6 #[doc = "0x04 - Peripheral reset control register"]
7 pub presetctrl: crate::Reg<presetctrl::PRESETCTRL_SPEC>,
8 #[doc = "0x08 - PLL control"]
9 pub syspllctrl: crate::Reg<syspllctrl::SYSPLLCTRL_SPEC>,
10 #[doc = "0x0c - PLL status"]
11 pub syspllstat: crate::Reg<syspllstat::SYSPLLSTAT_SPEC>,
12 _reserved4: [u8; 0x10],
13 #[doc = "0x20 - system oscillator control"]
14 pub sysoscctrl: crate::Reg<sysoscctrl::SYSOSCCTRL_SPEC>,
15 #[doc = "0x24 - Watchdog oscillator control"]
16 pub wdtoscctrl: crate::Reg<wdtoscctrl::WDTOSCCTRL_SPEC>,
17 #[doc = "0x28 - IRC control"]
18 pub ircctrl: crate::Reg<ircctrl::IRCCTRL_SPEC>,
19 _reserved7: [u8; 0x04],
20 #[doc = "0x30 - System reset status register"]
21 pub sysrststat: crate::Reg<sysrststat::SYSRSTSTAT_SPEC>,
22 _reserved8: [u8; 0x0c],
23 #[doc = "0x40 - System PLL clock source select register"]
24 pub syspllclksel: crate::Reg<syspllclksel::SYSPLLCLKSEL_SPEC>,
25 #[doc = "0x44 - System PLL clock source update enable register"]
26 pub syspllclkuen: crate::Reg<syspllclkuen::SYSPLLCLKUEN_SPEC>,
27 _reserved10: [u8; 0x28],
28 #[doc = "0x70 - Main clock source select"]
29 pub mainclksel: crate::Reg<mainclksel::MAINCLKSEL_SPEC>,
30 #[doc = "0x74 - Main clock source update enable"]
31 pub mainclkuen: crate::Reg<mainclkuen::MAINCLKUEN_SPEC>,
32 #[doc = "0x78 - System clock divider"]
33 pub sysahbclkdiv: crate::Reg<sysahbclkdiv::SYSAHBCLKDIV_SPEC>,
34 _reserved13: [u8; 0x04],
35 #[doc = "0x80 - System clock control"]
36 pub sysahbclkctrl: crate::Reg<sysahbclkctrl::SYSAHBCLKCTRL_SPEC>,
37 _reserved14: [u8; 0x10],
38 #[doc = "0x94 - USART clock divider"]
39 pub uartclkdiv: crate::Reg<uartclkdiv::UARTCLKDIV_SPEC>,
40 _reserved15: [u8; 0x48],
41 #[doc = "0xe0 - CLKOUT clock source select"]
42 pub clkoutsel: crate::Reg<clkoutsel::CLKOUTSEL_SPEC>,
43 #[doc = "0xe4 - CLKOUT clock source update enable"]
44 pub clkoutuen: crate::Reg<clkoutuen::CLKOUTUEN_SPEC>,
45 #[doc = "0xe8 - PLL control"]
46 pub clkoutdiv: crate::Reg<clkoutdiv::CLKOUTDIV_SPEC>,
47 _reserved18: [u8; 0x04],
48 #[doc = "0xf0 - USART1 to USART4 common fractional generator divider value"]
49 pub uartfrgdiv: crate::Reg<uartfrgdiv::UARTFRGDIV_SPEC>,
50 #[doc = "0xf4 - USART common fractional generator divider value"]
51 pub uartfrgmult: crate::Reg<uartfrgmult::UARTFRGMULT_SPEC>,
52 _reserved20: [u8; 0x04],
53 #[doc = "0xfc - External trace buffer command register"]
54 pub exttracecmd: crate::Reg<exttracecmd::EXTTRACECMD_SPEC>,
55 #[doc = "0x100 - POR captured PIO status 0"]
56 pub pioporcap0: crate::Reg<pioporcap0::PIOPORCAP0_SPEC>,
57 _reserved22: [u8; 0x30],
58 #[doc = "0x134 - Peripheral clock 6 to the IOCON block for programmable glitch filter"]
59 pub ioconclkdiv6: crate::Reg<ioconclkdiv6::IOCONCLKDIV6_SPEC>,
60 #[doc = "0x138 - Peripheral clock 6 to the IOCON block for programmable glitch filter"]
61 pub ioconclkdiv5: crate::Reg<ioconclkdiv5::IOCONCLKDIV5_SPEC>,
62 #[doc = "0x13c - Peripheral clock 4 to the IOCON block for programmable glitch filter"]
63 pub ioconclkdiv4: crate::Reg<ioconclkdiv4::IOCONCLKDIV4_SPEC>,
64 #[doc = "0x140 - Peripheral clock 3 to the IOCON block for programmable glitch filter"]
65 pub ioconclkdiv3: crate::Reg<ioconclkdiv3::IOCONCLKDIV3_SPEC>,
66 #[doc = "0x144 - Peripheral clock 2 to the IOCON block for programmable glitch filter"]
67 pub ioconclkdiv2: crate::Reg<ioconclkdiv2::IOCONCLKDIV2_SPEC>,
68 #[doc = "0x148 - Peripheral clock 1 to the IOCON block for programmable glitch filter"]
69 pub ioconclkdiv1: crate::Reg<ioconclkdiv1::IOCONCLKDIV1_SPEC>,
70 #[doc = "0x14c - Peripheral clock 0 to the IOCON block for programmable glitch filter"]
71 pub ioconclkdiv0: crate::Reg<ioconclkdiv0::IOCONCLKDIV0_SPEC>,
72 #[doc = "0x150 - BOD control register"]
73 pub bodctrl: crate::Reg<bodctrl::BODCTRL_SPEC>,
74 #[doc = "0x154 - System tick timer calibration register"]
75 pub systckcal: crate::Reg<systckcal::SYSTCKCAL_SPEC>,
76 _reserved31: [u8; 0x18],
77 #[doc = "0x170 - IRQ latency register"]
78 pub irqlatency: crate::Reg<irqlatency::IRQLATENCY_SPEC>,
79 #[doc = "0x174 - NMI source selection register"]
80 pub nmisrc: crate::Reg<nmisrc::NMISRC_SPEC>,
81 #[doc = "0x178..0x198 - Pin interrupt select registers N"]
82 pub pintsel: [crate::Reg<pintsel::PINTSEL_SPEC>; 8],
83 _reserved34: [u8; 0x6c],
84 #[doc = "0x204 - Start logic 0 pin wake-up enable register 0"]
85 pub starterp0: crate::Reg<starterp0::STARTERP0_SPEC>,
86 _reserved35: [u8; 0x0c],
87 #[doc = "0x214 - Start logic 1 interrupt wake-up enable register"]
88 pub starterp1: crate::Reg<starterp1::STARTERP1_SPEC>,
89 _reserved36: [u8; 0x18],
90 #[doc = "0x230 - Deep-sleep configuration register"]
91 pub pdsleepcfg: crate::Reg<pdsleepcfg::PDSLEEPCFG_SPEC>,
92 #[doc = "0x234 - Wake-up configuration register"]
93 pub pdawakecfg: crate::Reg<pdawakecfg::PDAWAKECFG_SPEC>,
94 #[doc = "0x238 - Power configuration register"]
95 pub pdruncfg: crate::Reg<pdruncfg::PDRUNCFG_SPEC>,
96 _reserved39: [u8; 0x01bc],
97 #[doc = "0x3f8 - Part ID register"]
98 pub device_id: crate::Reg<device_id::DEVICE_ID_SPEC>,
99}
100#[doc = "SYSMEMREMAP register accessor: an alias for `Reg<SYSMEMREMAP_SPEC>`"]
101pub type SYSMEMREMAP = crate::Reg<sysmemremap::SYSMEMREMAP_SPEC>;
102#[doc = "System Remap register"]
103pub mod sysmemremap;
104#[doc = "PRESETCTRL register accessor: an alias for `Reg<PRESETCTRL_SPEC>`"]
105pub type PRESETCTRL = crate::Reg<presetctrl::PRESETCTRL_SPEC>;
106#[doc = "Peripheral reset control register"]
107pub mod presetctrl;
108#[doc = "SYSPLLCTRL register accessor: an alias for `Reg<SYSPLLCTRL_SPEC>`"]
109pub type SYSPLLCTRL = crate::Reg<syspllctrl::SYSPLLCTRL_SPEC>;
110#[doc = "PLL control"]
111pub mod syspllctrl;
112#[doc = "SYSPLLSTAT register accessor: an alias for `Reg<SYSPLLSTAT_SPEC>`"]
113pub type SYSPLLSTAT = crate::Reg<syspllstat::SYSPLLSTAT_SPEC>;
114#[doc = "PLL status"]
115pub mod syspllstat;
116#[doc = "SYSOSCCTRL register accessor: an alias for `Reg<SYSOSCCTRL_SPEC>`"]
117pub type SYSOSCCTRL = crate::Reg<sysoscctrl::SYSOSCCTRL_SPEC>;
118#[doc = "system oscillator control"]
119pub mod sysoscctrl;
120#[doc = "WDTOSCCTRL register accessor: an alias for `Reg<WDTOSCCTRL_SPEC>`"]
121pub type WDTOSCCTRL = crate::Reg<wdtoscctrl::WDTOSCCTRL_SPEC>;
122#[doc = "Watchdog oscillator control"]
123pub mod wdtoscctrl;
124#[doc = "IRCCTRL register accessor: an alias for `Reg<IRCCTRL_SPEC>`"]
125pub type IRCCTRL = crate::Reg<ircctrl::IRCCTRL_SPEC>;
126#[doc = "IRC control"]
127pub mod ircctrl;
128#[doc = "SYSRSTSTAT register accessor: an alias for `Reg<SYSRSTSTAT_SPEC>`"]
129pub type SYSRSTSTAT = crate::Reg<sysrststat::SYSRSTSTAT_SPEC>;
130#[doc = "System reset status register"]
131pub mod sysrststat;
132#[doc = "SYSPLLCLKSEL register accessor: an alias for `Reg<SYSPLLCLKSEL_SPEC>`"]
133pub type SYSPLLCLKSEL = crate::Reg<syspllclksel::SYSPLLCLKSEL_SPEC>;
134#[doc = "System PLL clock source select register"]
135pub mod syspllclksel;
136#[doc = "SYSPLLCLKUEN register accessor: an alias for `Reg<SYSPLLCLKUEN_SPEC>`"]
137pub type SYSPLLCLKUEN = crate::Reg<syspllclkuen::SYSPLLCLKUEN_SPEC>;
138#[doc = "System PLL clock source update enable register"]
139pub mod syspllclkuen;
140#[doc = "MAINCLKSEL register accessor: an alias for `Reg<MAINCLKSEL_SPEC>`"]
141pub type MAINCLKSEL = crate::Reg<mainclksel::MAINCLKSEL_SPEC>;
142#[doc = "Main clock source select"]
143pub mod mainclksel;
144#[doc = "MAINCLKUEN register accessor: an alias for `Reg<MAINCLKUEN_SPEC>`"]
145pub type MAINCLKUEN = crate::Reg<mainclkuen::MAINCLKUEN_SPEC>;
146#[doc = "Main clock source update enable"]
147pub mod mainclkuen;
148#[doc = "SYSAHBCLKDIV register accessor: an alias for `Reg<SYSAHBCLKDIV_SPEC>`"]
149pub type SYSAHBCLKDIV = crate::Reg<sysahbclkdiv::SYSAHBCLKDIV_SPEC>;
150#[doc = "System clock divider"]
151pub mod sysahbclkdiv;
152#[doc = "SYSAHBCLKCTRL register accessor: an alias for `Reg<SYSAHBCLKCTRL_SPEC>`"]
153pub type SYSAHBCLKCTRL = crate::Reg<sysahbclkctrl::SYSAHBCLKCTRL_SPEC>;
154#[doc = "System clock control"]
155pub mod sysahbclkctrl;
156#[doc = "UARTCLKDIV register accessor: an alias for `Reg<UARTCLKDIV_SPEC>`"]
157pub type UARTCLKDIV = crate::Reg<uartclkdiv::UARTCLKDIV_SPEC>;
158#[doc = "USART clock divider"]
159pub mod uartclkdiv;
160#[doc = "CLKOUTSEL register accessor: an alias for `Reg<CLKOUTSEL_SPEC>`"]
161pub type CLKOUTSEL = crate::Reg<clkoutsel::CLKOUTSEL_SPEC>;
162#[doc = "CLKOUT clock source select"]
163pub mod clkoutsel;
164#[doc = "CLKOUTUEN register accessor: an alias for `Reg<CLKOUTUEN_SPEC>`"]
165pub type CLKOUTUEN = crate::Reg<clkoutuen::CLKOUTUEN_SPEC>;
166#[doc = "CLKOUT clock source update enable"]
167pub mod clkoutuen;
168#[doc = "CLKOUTDIV register accessor: an alias for `Reg<CLKOUTDIV_SPEC>`"]
169pub type CLKOUTDIV = crate::Reg<clkoutdiv::CLKOUTDIV_SPEC>;
170#[doc = "PLL control"]
171pub mod clkoutdiv;
172#[doc = "UARTFRGDIV register accessor: an alias for `Reg<UARTFRGDIV_SPEC>`"]
173pub type UARTFRGDIV = crate::Reg<uartfrgdiv::UARTFRGDIV_SPEC>;
174#[doc = "USART1 to USART4 common fractional generator divider value"]
175pub mod uartfrgdiv;
176#[doc = "UARTFRGMULT register accessor: an alias for `Reg<UARTFRGMULT_SPEC>`"]
177pub type UARTFRGMULT = crate::Reg<uartfrgmult::UARTFRGMULT_SPEC>;
178#[doc = "USART common fractional generator divider value"]
179pub mod uartfrgmult;
180#[doc = "EXTTRACECMD register accessor: an alias for `Reg<EXTTRACECMD_SPEC>`"]
181pub type EXTTRACECMD = crate::Reg<exttracecmd::EXTTRACECMD_SPEC>;
182#[doc = "External trace buffer command register"]
183pub mod exttracecmd;
184#[doc = "PIOPORCAP0 register accessor: an alias for `Reg<PIOPORCAP0_SPEC>`"]
185pub type PIOPORCAP0 = crate::Reg<pioporcap0::PIOPORCAP0_SPEC>;
186#[doc = "POR captured PIO status 0"]
187pub mod pioporcap0;
188#[doc = "IOCONCLKDIV6 register accessor: an alias for `Reg<IOCONCLKDIV6_SPEC>`"]
189pub type IOCONCLKDIV6 = crate::Reg<ioconclkdiv6::IOCONCLKDIV6_SPEC>;
190#[doc = "Peripheral clock 6 to the IOCON block for programmable glitch filter"]
191pub mod ioconclkdiv6;
192#[doc = "IOCONCLKDIV5 register accessor: an alias for `Reg<IOCONCLKDIV5_SPEC>`"]
193pub type IOCONCLKDIV5 = crate::Reg<ioconclkdiv5::IOCONCLKDIV5_SPEC>;
194#[doc = "Peripheral clock 6 to the IOCON block for programmable glitch filter"]
195pub mod ioconclkdiv5;
196#[doc = "IOCONCLKDIV4 register accessor: an alias for `Reg<IOCONCLKDIV4_SPEC>`"]
197pub type IOCONCLKDIV4 = crate::Reg<ioconclkdiv4::IOCONCLKDIV4_SPEC>;
198#[doc = "Peripheral clock 4 to the IOCON block for programmable glitch filter"]
199pub mod ioconclkdiv4;
200#[doc = "IOCONCLKDIV3 register accessor: an alias for `Reg<IOCONCLKDIV3_SPEC>`"]
201pub type IOCONCLKDIV3 = crate::Reg<ioconclkdiv3::IOCONCLKDIV3_SPEC>;
202#[doc = "Peripheral clock 3 to the IOCON block for programmable glitch filter"]
203pub mod ioconclkdiv3;
204#[doc = "IOCONCLKDIV2 register accessor: an alias for `Reg<IOCONCLKDIV2_SPEC>`"]
205pub type IOCONCLKDIV2 = crate::Reg<ioconclkdiv2::IOCONCLKDIV2_SPEC>;
206#[doc = "Peripheral clock 2 to the IOCON block for programmable glitch filter"]
207pub mod ioconclkdiv2;
208#[doc = "IOCONCLKDIV1 register accessor: an alias for `Reg<IOCONCLKDIV1_SPEC>`"]
209pub type IOCONCLKDIV1 = crate::Reg<ioconclkdiv1::IOCONCLKDIV1_SPEC>;
210#[doc = "Peripheral clock 1 to the IOCON block for programmable glitch filter"]
211pub mod ioconclkdiv1;
212#[doc = "IOCONCLKDIV0 register accessor: an alias for `Reg<IOCONCLKDIV0_SPEC>`"]
213pub type IOCONCLKDIV0 = crate::Reg<ioconclkdiv0::IOCONCLKDIV0_SPEC>;
214#[doc = "Peripheral clock 0 to the IOCON block for programmable glitch filter"]
215pub mod ioconclkdiv0;
216#[doc = "BODCTRL register accessor: an alias for `Reg<BODCTRL_SPEC>`"]
217pub type BODCTRL = crate::Reg<bodctrl::BODCTRL_SPEC>;
218#[doc = "BOD control register"]
219pub mod bodctrl;
220#[doc = "SYSTCKCAL register accessor: an alias for `Reg<SYSTCKCAL_SPEC>`"]
221pub type SYSTCKCAL = crate::Reg<systckcal::SYSTCKCAL_SPEC>;
222#[doc = "System tick timer calibration register"]
223pub mod systckcal;
224#[doc = "IRQLATENCY register accessor: an alias for `Reg<IRQLATENCY_SPEC>`"]
225pub type IRQLATENCY = crate::Reg<irqlatency::IRQLATENCY_SPEC>;
226#[doc = "IRQ latency register"]
227pub mod irqlatency;
228#[doc = "NMISRC register accessor: an alias for `Reg<NMISRC_SPEC>`"]
229pub type NMISRC = crate::Reg<nmisrc::NMISRC_SPEC>;
230#[doc = "NMI source selection register"]
231pub mod nmisrc;
232#[doc = "PINTSEL register accessor: an alias for `Reg<PINTSEL_SPEC>`"]
233pub type PINTSEL = crate::Reg<pintsel::PINTSEL_SPEC>;
234#[doc = "Pin interrupt select registers N"]
235pub mod pintsel;
236#[doc = "STARTERP0 register accessor: an alias for `Reg<STARTERP0_SPEC>`"]
237pub type STARTERP0 = crate::Reg<starterp0::STARTERP0_SPEC>;
238#[doc = "Start logic 0 pin wake-up enable register 0"]
239pub mod starterp0;
240#[doc = "STARTERP1 register accessor: an alias for `Reg<STARTERP1_SPEC>`"]
241pub type STARTERP1 = crate::Reg<starterp1::STARTERP1_SPEC>;
242#[doc = "Start logic 1 interrupt wake-up enable register"]
243pub mod starterp1;
244#[doc = "PDSLEEPCFG register accessor: an alias for `Reg<PDSLEEPCFG_SPEC>`"]
245pub type PDSLEEPCFG = crate::Reg<pdsleepcfg::PDSLEEPCFG_SPEC>;
246#[doc = "Deep-sleep configuration register"]
247pub mod pdsleepcfg;
248#[doc = "PDAWAKECFG register accessor: an alias for `Reg<PDAWAKECFG_SPEC>`"]
249pub type PDAWAKECFG = crate::Reg<pdawakecfg::PDAWAKECFG_SPEC>;
250#[doc = "Wake-up configuration register"]
251pub mod pdawakecfg;
252#[doc = "PDRUNCFG register accessor: an alias for `Reg<PDRUNCFG_SPEC>`"]
253pub type PDRUNCFG = crate::Reg<pdruncfg::PDRUNCFG_SPEC>;
254#[doc = "Power configuration register"]
255pub mod pdruncfg;
256#[doc = "DEVICE_ID register accessor: an alias for `Reg<DEVICE_ID_SPEC>`"]
257pub type DEVICE_ID = crate::Reg<device_id::DEVICE_ID_SPEC>;
258#[doc = "Part ID register"]
259pub mod device_id;