lpc82x_pac/iocon/
pio0_23.rs

1#[doc = "Register `PIO0_23` reader"]
2pub struct R(crate::R<PIO0_23_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PIO0_23_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PIO0_23_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PIO0_23_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PIO0_23` writer"]
17pub struct W(crate::W<PIO0_23_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PIO0_23_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PIO0_23_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PIO0_23_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Selects function mode (on-chip pull-up/pull-down resistor control).\n\nValue on reset: 2"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum MODE_A {
41    #[doc = "0: Inactive. Inactive (no pull-down/pull-up resistor enabled)."]
42    INACTIVE = 0,
43    #[doc = "1: Pull-down. Pull-down resistor enabled."]
44    PULL_DOWN = 1,
45    #[doc = "2: Pull-up. Pull-up resistor enabled."]
46    PULL_UP = 2,
47    #[doc = "3: Repeater. Repeater mode."]
48    REPEATER = 3,
49}
50impl From<MODE_A> for u8 {
51    #[inline(always)]
52    fn from(variant: MODE_A) -> Self {
53        variant as _
54    }
55}
56#[doc = "Field `MODE` reader - Selects function mode (on-chip pull-up/pull-down resistor control)."]
57pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
58impl MODE_R {
59    pub(crate) fn new(bits: u8) -> Self {
60        MODE_R(crate::FieldReader::new(bits))
61    }
62    #[doc = r"Get enumerated values variant"]
63    #[inline(always)]
64    pub fn variant(&self) -> MODE_A {
65        match self.bits {
66            0 => MODE_A::INACTIVE,
67            1 => MODE_A::PULL_DOWN,
68            2 => MODE_A::PULL_UP,
69            3 => MODE_A::REPEATER,
70            _ => unreachable!(),
71        }
72    }
73    #[doc = "Checks if the value of the field is `INACTIVE`"]
74    #[inline(always)]
75    pub fn is_inactive(&self) -> bool {
76        **self == MODE_A::INACTIVE
77    }
78    #[doc = "Checks if the value of the field is `PULL_DOWN`"]
79    #[inline(always)]
80    pub fn is_pull_down(&self) -> bool {
81        **self == MODE_A::PULL_DOWN
82    }
83    #[doc = "Checks if the value of the field is `PULL_UP`"]
84    #[inline(always)]
85    pub fn is_pull_up(&self) -> bool {
86        **self == MODE_A::PULL_UP
87    }
88    #[doc = "Checks if the value of the field is `REPEATER`"]
89    #[inline(always)]
90    pub fn is_repeater(&self) -> bool {
91        **self == MODE_A::REPEATER
92    }
93}
94impl core::ops::Deref for MODE_R {
95    type Target = crate::FieldReader<u8, MODE_A>;
96    #[inline(always)]
97    fn deref(&self) -> &Self::Target {
98        &self.0
99    }
100}
101#[doc = "Field `MODE` writer - Selects function mode (on-chip pull-up/pull-down resistor control)."]
102pub struct MODE_W<'a> {
103    w: &'a mut W,
104}
105impl<'a> MODE_W<'a> {
106    #[doc = r"Writes `variant` to the field"]
107    #[inline(always)]
108    pub fn variant(self, variant: MODE_A) -> &'a mut W {
109        self.bits(variant.into())
110    }
111    #[doc = "Inactive. Inactive (no pull-down/pull-up resistor enabled)."]
112    #[inline(always)]
113    pub fn inactive(self) -> &'a mut W {
114        self.variant(MODE_A::INACTIVE)
115    }
116    #[doc = "Pull-down. Pull-down resistor enabled."]
117    #[inline(always)]
118    pub fn pull_down(self) -> &'a mut W {
119        self.variant(MODE_A::PULL_DOWN)
120    }
121    #[doc = "Pull-up. Pull-up resistor enabled."]
122    #[inline(always)]
123    pub fn pull_up(self) -> &'a mut W {
124        self.variant(MODE_A::PULL_UP)
125    }
126    #[doc = "Repeater. Repeater mode."]
127    #[inline(always)]
128    pub fn repeater(self) -> &'a mut W {
129        self.variant(MODE_A::REPEATER)
130    }
131    #[doc = r"Writes raw bits to the field"]
132    #[inline(always)]
133    pub fn bits(self, value: u8) -> &'a mut W {
134        self.w.bits = (self.w.bits & !(0x03 << 3)) | ((value as u32 & 0x03) << 3);
135        self.w
136    }
137}
138#[doc = "Hysteresis.\n\nValue on reset: 0"]
139#[derive(Clone, Copy, Debug, PartialEq)]
140pub enum HYS_A {
141    #[doc = "0: Disable"]
142    DISABLE = 0,
143    #[doc = "1: Enable"]
144    ENABLE = 1,
145}
146impl From<HYS_A> for bool {
147    #[inline(always)]
148    fn from(variant: HYS_A) -> Self {
149        variant as u8 != 0
150    }
151}
152#[doc = "Field `HYS` reader - Hysteresis."]
153pub struct HYS_R(crate::FieldReader<bool, HYS_A>);
154impl HYS_R {
155    pub(crate) fn new(bits: bool) -> Self {
156        HYS_R(crate::FieldReader::new(bits))
157    }
158    #[doc = r"Get enumerated values variant"]
159    #[inline(always)]
160    pub fn variant(&self) -> HYS_A {
161        match self.bits {
162            false => HYS_A::DISABLE,
163            true => HYS_A::ENABLE,
164        }
165    }
166    #[doc = "Checks if the value of the field is `DISABLE`"]
167    #[inline(always)]
168    pub fn is_disable(&self) -> bool {
169        **self == HYS_A::DISABLE
170    }
171    #[doc = "Checks if the value of the field is `ENABLE`"]
172    #[inline(always)]
173    pub fn is_enable(&self) -> bool {
174        **self == HYS_A::ENABLE
175    }
176}
177impl core::ops::Deref for HYS_R {
178    type Target = crate::FieldReader<bool, HYS_A>;
179    #[inline(always)]
180    fn deref(&self) -> &Self::Target {
181        &self.0
182    }
183}
184#[doc = "Field `HYS` writer - Hysteresis."]
185pub struct HYS_W<'a> {
186    w: &'a mut W,
187}
188impl<'a> HYS_W<'a> {
189    #[doc = r"Writes `variant` to the field"]
190    #[inline(always)]
191    pub fn variant(self, variant: HYS_A) -> &'a mut W {
192        self.bit(variant.into())
193    }
194    #[doc = "Disable"]
195    #[inline(always)]
196    pub fn disable(self) -> &'a mut W {
197        self.variant(HYS_A::DISABLE)
198    }
199    #[doc = "Enable"]
200    #[inline(always)]
201    pub fn enable(self) -> &'a mut W {
202        self.variant(HYS_A::ENABLE)
203    }
204    #[doc = r"Sets the field bit"]
205    #[inline(always)]
206    pub fn set_bit(self) -> &'a mut W {
207        self.bit(true)
208    }
209    #[doc = r"Clears the field bit"]
210    #[inline(always)]
211    pub fn clear_bit(self) -> &'a mut W {
212        self.bit(false)
213    }
214    #[doc = r"Writes raw bits to the field"]
215    #[inline(always)]
216    pub fn bit(self, value: bool) -> &'a mut W {
217        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
218        self.w
219    }
220}
221#[doc = "Invert input\n\nValue on reset: 0"]
222#[derive(Clone, Copy, Debug, PartialEq)]
223pub enum INV_A {
224    #[doc = "0: Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0)."]
225    NOT_INVERTED = 0,
226    #[doc = "1: Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)."]
227    INVERTED = 1,
228}
229impl From<INV_A> for bool {
230    #[inline(always)]
231    fn from(variant: INV_A) -> Self {
232        variant as u8 != 0
233    }
234}
235#[doc = "Field `INV` reader - Invert input"]
236pub struct INV_R(crate::FieldReader<bool, INV_A>);
237impl INV_R {
238    pub(crate) fn new(bits: bool) -> Self {
239        INV_R(crate::FieldReader::new(bits))
240    }
241    #[doc = r"Get enumerated values variant"]
242    #[inline(always)]
243    pub fn variant(&self) -> INV_A {
244        match self.bits {
245            false => INV_A::NOT_INVERTED,
246            true => INV_A::INVERTED,
247        }
248    }
249    #[doc = "Checks if the value of the field is `NOT_INVERTED`"]
250    #[inline(always)]
251    pub fn is_not_inverted(&self) -> bool {
252        **self == INV_A::NOT_INVERTED
253    }
254    #[doc = "Checks if the value of the field is `INVERTED`"]
255    #[inline(always)]
256    pub fn is_inverted(&self) -> bool {
257        **self == INV_A::INVERTED
258    }
259}
260impl core::ops::Deref for INV_R {
261    type Target = crate::FieldReader<bool, INV_A>;
262    #[inline(always)]
263    fn deref(&self) -> &Self::Target {
264        &self.0
265    }
266}
267#[doc = "Field `INV` writer - Invert input"]
268pub struct INV_W<'a> {
269    w: &'a mut W,
270}
271impl<'a> INV_W<'a> {
272    #[doc = r"Writes `variant` to the field"]
273    #[inline(always)]
274    pub fn variant(self, variant: INV_A) -> &'a mut W {
275        self.bit(variant.into())
276    }
277    #[doc = "Input not inverted (HIGH on pin reads as 1; LOW on pin reads as 0)."]
278    #[inline(always)]
279    pub fn not_inverted(self) -> &'a mut W {
280        self.variant(INV_A::NOT_INVERTED)
281    }
282    #[doc = "Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)."]
283    #[inline(always)]
284    pub fn inverted(self) -> &'a mut W {
285        self.variant(INV_A::INVERTED)
286    }
287    #[doc = r"Sets the field bit"]
288    #[inline(always)]
289    pub fn set_bit(self) -> &'a mut W {
290        self.bit(true)
291    }
292    #[doc = r"Clears the field bit"]
293    #[inline(always)]
294    pub fn clear_bit(self) -> &'a mut W {
295        self.bit(false)
296    }
297    #[doc = r"Writes raw bits to the field"]
298    #[inline(always)]
299    pub fn bit(self, value: bool) -> &'a mut W {
300        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
301        self.w
302    }
303}
304#[doc = "Open-drain mode.\n\nValue on reset: 0"]
305#[derive(Clone, Copy, Debug, PartialEq)]
306pub enum OD_A {
307    #[doc = "0: Disable."]
308    DISABLE = 0,
309    #[doc = "1: Open-drain mode enabled. Remark: This is not a true open-drain mode."]
310    ENABLED = 1,
311}
312impl From<OD_A> for bool {
313    #[inline(always)]
314    fn from(variant: OD_A) -> Self {
315        variant as u8 != 0
316    }
317}
318#[doc = "Field `OD` reader - Open-drain mode."]
319pub struct OD_R(crate::FieldReader<bool, OD_A>);
320impl OD_R {
321    pub(crate) fn new(bits: bool) -> Self {
322        OD_R(crate::FieldReader::new(bits))
323    }
324    #[doc = r"Get enumerated values variant"]
325    #[inline(always)]
326    pub fn variant(&self) -> OD_A {
327        match self.bits {
328            false => OD_A::DISABLE,
329            true => OD_A::ENABLED,
330        }
331    }
332    #[doc = "Checks if the value of the field is `DISABLE`"]
333    #[inline(always)]
334    pub fn is_disable(&self) -> bool {
335        **self == OD_A::DISABLE
336    }
337    #[doc = "Checks if the value of the field is `ENABLED`"]
338    #[inline(always)]
339    pub fn is_enabled(&self) -> bool {
340        **self == OD_A::ENABLED
341    }
342}
343impl core::ops::Deref for OD_R {
344    type Target = crate::FieldReader<bool, OD_A>;
345    #[inline(always)]
346    fn deref(&self) -> &Self::Target {
347        &self.0
348    }
349}
350#[doc = "Field `OD` writer - Open-drain mode."]
351pub struct OD_W<'a> {
352    w: &'a mut W,
353}
354impl<'a> OD_W<'a> {
355    #[doc = r"Writes `variant` to the field"]
356    #[inline(always)]
357    pub fn variant(self, variant: OD_A) -> &'a mut W {
358        self.bit(variant.into())
359    }
360    #[doc = "Disable."]
361    #[inline(always)]
362    pub fn disable(self) -> &'a mut W {
363        self.variant(OD_A::DISABLE)
364    }
365    #[doc = "Open-drain mode enabled. Remark: This is not a true open-drain mode."]
366    #[inline(always)]
367    pub fn enabled(self) -> &'a mut W {
368        self.variant(OD_A::ENABLED)
369    }
370    #[doc = r"Sets the field bit"]
371    #[inline(always)]
372    pub fn set_bit(self) -> &'a mut W {
373        self.bit(true)
374    }
375    #[doc = r"Clears the field bit"]
376    #[inline(always)]
377    pub fn clear_bit(self) -> &'a mut W {
378        self.bit(false)
379    }
380    #[doc = r"Writes raw bits to the field"]
381    #[inline(always)]
382    pub fn bit(self, value: bool) -> &'a mut W {
383        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
384        self.w
385    }
386}
387#[doc = "Digital filter sample mode.\n\nValue on reset: 0"]
388#[derive(Clone, Copy, Debug, PartialEq)]
389#[repr(u8)]
390pub enum S_MODE_A {
391    #[doc = "0: Bypass input filter."]
392    S_MODE_0 = 0,
393    #[doc = "1: 1 clock cycle. Input pulses shorter than one filter clock are rejected."]
394    S_MODE_1 = 1,
395    #[doc = "2: 2 clock cycles. Input pulses shorter than two filter clocks are rejected."]
396    S_MODE_2 = 2,
397    #[doc = "3: 3 clock cycles. Input pulses shorter than three filter clocks are rejected."]
398    S_MODE_3 = 3,
399}
400impl From<S_MODE_A> for u8 {
401    #[inline(always)]
402    fn from(variant: S_MODE_A) -> Self {
403        variant as _
404    }
405}
406#[doc = "Field `S_MODE` reader - Digital filter sample mode."]
407pub struct S_MODE_R(crate::FieldReader<u8, S_MODE_A>);
408impl S_MODE_R {
409    pub(crate) fn new(bits: u8) -> Self {
410        S_MODE_R(crate::FieldReader::new(bits))
411    }
412    #[doc = r"Get enumerated values variant"]
413    #[inline(always)]
414    pub fn variant(&self) -> S_MODE_A {
415        match self.bits {
416            0 => S_MODE_A::S_MODE_0,
417            1 => S_MODE_A::S_MODE_1,
418            2 => S_MODE_A::S_MODE_2,
419            3 => S_MODE_A::S_MODE_3,
420            _ => unreachable!(),
421        }
422    }
423    #[doc = "Checks if the value of the field is `S_MODE_0`"]
424    #[inline(always)]
425    pub fn is_s_mode_0(&self) -> bool {
426        **self == S_MODE_A::S_MODE_0
427    }
428    #[doc = "Checks if the value of the field is `S_MODE_1`"]
429    #[inline(always)]
430    pub fn is_s_mode_1(&self) -> bool {
431        **self == S_MODE_A::S_MODE_1
432    }
433    #[doc = "Checks if the value of the field is `S_MODE_2`"]
434    #[inline(always)]
435    pub fn is_s_mode_2(&self) -> bool {
436        **self == S_MODE_A::S_MODE_2
437    }
438    #[doc = "Checks if the value of the field is `S_MODE_3`"]
439    #[inline(always)]
440    pub fn is_s_mode_3(&self) -> bool {
441        **self == S_MODE_A::S_MODE_3
442    }
443}
444impl core::ops::Deref for S_MODE_R {
445    type Target = crate::FieldReader<u8, S_MODE_A>;
446    #[inline(always)]
447    fn deref(&self) -> &Self::Target {
448        &self.0
449    }
450}
451#[doc = "Field `S_MODE` writer - Digital filter sample mode."]
452pub struct S_MODE_W<'a> {
453    w: &'a mut W,
454}
455impl<'a> S_MODE_W<'a> {
456    #[doc = r"Writes `variant` to the field"]
457    #[inline(always)]
458    pub fn variant(self, variant: S_MODE_A) -> &'a mut W {
459        self.bits(variant.into())
460    }
461    #[doc = "Bypass input filter."]
462    #[inline(always)]
463    pub fn s_mode_0(self) -> &'a mut W {
464        self.variant(S_MODE_A::S_MODE_0)
465    }
466    #[doc = "1 clock cycle. Input pulses shorter than one filter clock are rejected."]
467    #[inline(always)]
468    pub fn s_mode_1(self) -> &'a mut W {
469        self.variant(S_MODE_A::S_MODE_1)
470    }
471    #[doc = "2 clock cycles. Input pulses shorter than two filter clocks are rejected."]
472    #[inline(always)]
473    pub fn s_mode_2(self) -> &'a mut W {
474        self.variant(S_MODE_A::S_MODE_2)
475    }
476    #[doc = "3 clock cycles. Input pulses shorter than three filter clocks are rejected."]
477    #[inline(always)]
478    pub fn s_mode_3(self) -> &'a mut W {
479        self.variant(S_MODE_A::S_MODE_3)
480    }
481    #[doc = r"Writes raw bits to the field"]
482    #[inline(always)]
483    pub fn bits(self, value: u8) -> &'a mut W {
484        self.w.bits = (self.w.bits & !(0x03 << 11)) | ((value as u32 & 0x03) << 11);
485        self.w
486    }
487}
488#[doc = "Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved.\n\nValue on reset: 0"]
489#[derive(Clone, Copy, Debug, PartialEq)]
490#[repr(u8)]
491pub enum CLK_DIV_A {
492    #[doc = "0: IOCONCLKDIV0"]
493    CLK_DIV_0 = 0,
494    #[doc = "1: IOCONCLKDIV1"]
495    CLK_DIV_1 = 1,
496    #[doc = "2: IOCONCLKDIV2"]
497    CLK_DIV_2 = 2,
498    #[doc = "3: IOCONCLKDIV3"]
499    CLK_DIV_3 = 3,
500    #[doc = "4: IOCONCLKDIV4"]
501    CLK_DIV_4 = 4,
502    #[doc = "5: IOCONCLKDIV5"]
503    CLK_DIV_5 = 5,
504    #[doc = "6: IOCONCLKDIV6"]
505    CLK_DIV_6 = 6,
506}
507impl From<CLK_DIV_A> for u8 {
508    #[inline(always)]
509    fn from(variant: CLK_DIV_A) -> Self {
510        variant as _
511    }
512}
513#[doc = "Field `CLK_DIV` reader - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
514pub struct CLK_DIV_R(crate::FieldReader<u8, CLK_DIV_A>);
515impl CLK_DIV_R {
516    pub(crate) fn new(bits: u8) -> Self {
517        CLK_DIV_R(crate::FieldReader::new(bits))
518    }
519    #[doc = r"Get enumerated values variant"]
520    #[inline(always)]
521    pub fn variant(&self) -> Option<CLK_DIV_A> {
522        match self.bits {
523            0 => Some(CLK_DIV_A::CLK_DIV_0),
524            1 => Some(CLK_DIV_A::CLK_DIV_1),
525            2 => Some(CLK_DIV_A::CLK_DIV_2),
526            3 => Some(CLK_DIV_A::CLK_DIV_3),
527            4 => Some(CLK_DIV_A::CLK_DIV_4),
528            5 => Some(CLK_DIV_A::CLK_DIV_5),
529            6 => Some(CLK_DIV_A::CLK_DIV_6),
530            _ => None,
531        }
532    }
533    #[doc = "Checks if the value of the field is `CLK_DIV_0`"]
534    #[inline(always)]
535    pub fn is_clk_div_0(&self) -> bool {
536        **self == CLK_DIV_A::CLK_DIV_0
537    }
538    #[doc = "Checks if the value of the field is `CLK_DIV_1`"]
539    #[inline(always)]
540    pub fn is_clk_div_1(&self) -> bool {
541        **self == CLK_DIV_A::CLK_DIV_1
542    }
543    #[doc = "Checks if the value of the field is `CLK_DIV_2`"]
544    #[inline(always)]
545    pub fn is_clk_div_2(&self) -> bool {
546        **self == CLK_DIV_A::CLK_DIV_2
547    }
548    #[doc = "Checks if the value of the field is `CLK_DIV_3`"]
549    #[inline(always)]
550    pub fn is_clk_div_3(&self) -> bool {
551        **self == CLK_DIV_A::CLK_DIV_3
552    }
553    #[doc = "Checks if the value of the field is `CLK_DIV_4`"]
554    #[inline(always)]
555    pub fn is_clk_div_4(&self) -> bool {
556        **self == CLK_DIV_A::CLK_DIV_4
557    }
558    #[doc = "Checks if the value of the field is `CLK_DIV_5`"]
559    #[inline(always)]
560    pub fn is_clk_div_5(&self) -> bool {
561        **self == CLK_DIV_A::CLK_DIV_5
562    }
563    #[doc = "Checks if the value of the field is `CLK_DIV_6`"]
564    #[inline(always)]
565    pub fn is_clk_div_6(&self) -> bool {
566        **self == CLK_DIV_A::CLK_DIV_6
567    }
568}
569impl core::ops::Deref for CLK_DIV_R {
570    type Target = crate::FieldReader<u8, CLK_DIV_A>;
571    #[inline(always)]
572    fn deref(&self) -> &Self::Target {
573        &self.0
574    }
575}
576#[doc = "Field `CLK_DIV` writer - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
577pub struct CLK_DIV_W<'a> {
578    w: &'a mut W,
579}
580impl<'a> CLK_DIV_W<'a> {
581    #[doc = r"Writes `variant` to the field"]
582    #[inline(always)]
583    pub fn variant(self, variant: CLK_DIV_A) -> &'a mut W {
584        unsafe { self.bits(variant.into()) }
585    }
586    #[doc = "IOCONCLKDIV0"]
587    #[inline(always)]
588    pub fn clk_div_0(self) -> &'a mut W {
589        self.variant(CLK_DIV_A::CLK_DIV_0)
590    }
591    #[doc = "IOCONCLKDIV1"]
592    #[inline(always)]
593    pub fn clk_div_1(self) -> &'a mut W {
594        self.variant(CLK_DIV_A::CLK_DIV_1)
595    }
596    #[doc = "IOCONCLKDIV2"]
597    #[inline(always)]
598    pub fn clk_div_2(self) -> &'a mut W {
599        self.variant(CLK_DIV_A::CLK_DIV_2)
600    }
601    #[doc = "IOCONCLKDIV3"]
602    #[inline(always)]
603    pub fn clk_div_3(self) -> &'a mut W {
604        self.variant(CLK_DIV_A::CLK_DIV_3)
605    }
606    #[doc = "IOCONCLKDIV4"]
607    #[inline(always)]
608    pub fn clk_div_4(self) -> &'a mut W {
609        self.variant(CLK_DIV_A::CLK_DIV_4)
610    }
611    #[doc = "IOCONCLKDIV5"]
612    #[inline(always)]
613    pub fn clk_div_5(self) -> &'a mut W {
614        self.variant(CLK_DIV_A::CLK_DIV_5)
615    }
616    #[doc = "IOCONCLKDIV6"]
617    #[inline(always)]
618    pub fn clk_div_6(self) -> &'a mut W {
619        self.variant(CLK_DIV_A::CLK_DIV_6)
620    }
621    #[doc = r"Writes raw bits to the field"]
622    #[inline(always)]
623    pub unsafe fn bits(self, value: u8) -> &'a mut W {
624        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13);
625        self.w
626    }
627}
628impl R {
629    #[doc = "Bits 3:4 - Selects function mode (on-chip pull-up/pull-down resistor control)."]
630    #[inline(always)]
631    pub fn mode(&self) -> MODE_R {
632        MODE_R::new(((self.bits >> 3) & 0x03) as u8)
633    }
634    #[doc = "Bit 5 - Hysteresis."]
635    #[inline(always)]
636    pub fn hys(&self) -> HYS_R {
637        HYS_R::new(((self.bits >> 5) & 0x01) != 0)
638    }
639    #[doc = "Bit 6 - Invert input"]
640    #[inline(always)]
641    pub fn inv(&self) -> INV_R {
642        INV_R::new(((self.bits >> 6) & 0x01) != 0)
643    }
644    #[doc = "Bit 10 - Open-drain mode."]
645    #[inline(always)]
646    pub fn od(&self) -> OD_R {
647        OD_R::new(((self.bits >> 10) & 0x01) != 0)
648    }
649    #[doc = "Bits 11:12 - Digital filter sample mode."]
650    #[inline(always)]
651    pub fn s_mode(&self) -> S_MODE_R {
652        S_MODE_R::new(((self.bits >> 11) & 0x03) as u8)
653    }
654    #[doc = "Bits 13:15 - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
655    #[inline(always)]
656    pub fn clk_div(&self) -> CLK_DIV_R {
657        CLK_DIV_R::new(((self.bits >> 13) & 0x07) as u8)
658    }
659}
660impl W {
661    #[doc = "Bits 3:4 - Selects function mode (on-chip pull-up/pull-down resistor control)."]
662    #[inline(always)]
663    pub fn mode(&mut self) -> MODE_W {
664        MODE_W { w: self }
665    }
666    #[doc = "Bit 5 - Hysteresis."]
667    #[inline(always)]
668    pub fn hys(&mut self) -> HYS_W {
669        HYS_W { w: self }
670    }
671    #[doc = "Bit 6 - Invert input"]
672    #[inline(always)]
673    pub fn inv(&mut self) -> INV_W {
674        INV_W { w: self }
675    }
676    #[doc = "Bit 10 - Open-drain mode."]
677    #[inline(always)]
678    pub fn od(&mut self) -> OD_W {
679        OD_W { w: self }
680    }
681    #[doc = "Bits 11:12 - Digital filter sample mode."]
682    #[inline(always)]
683    pub fn s_mode(&mut self) -> S_MODE_W {
684        S_MODE_W { w: self }
685    }
686    #[doc = "Bits 13:15 - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved."]
687    #[inline(always)]
688    pub fn clk_div(&mut self) -> CLK_DIV_W {
689        CLK_DIV_W { w: self }
690    }
691    #[doc = "Writes raw bits to the register."]
692    #[inline(always)]
693    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
694        self.0.bits(bits);
695        self
696    }
697}
698#[doc = "Digital I/O control for pins PIO0_23\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pio0_23](index.html) module"]
699pub struct PIO0_23_SPEC;
700impl crate::RegisterSpec for PIO0_23_SPEC {
701    type Ux = u32;
702}
703#[doc = "`read()` method returns [pio0_23::R](R) reader structure"]
704impl crate::Readable for PIO0_23_SPEC {
705    type Reader = R;
706}
707#[doc = "`write(|w| ..)` method takes [pio0_23::W](W) writer structure"]
708impl crate::Writable for PIO0_23_SPEC {
709    type Writer = W;
710}
711#[doc = "`reset()` method sets PIO0_23 to value 0x90"]
712impl crate::Resettable for PIO0_23_SPEC {
713    #[inline(always)]
714    fn reset_value() -> Self::Ux {
715        0x90
716    }
717}
lpc82x_pac/iocon/pio0_23.rs

lpc82x_pac/iocon/
pio0_23.rs
