[−][src]Module lpc55s6x_pac::spi0::intenclr
SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.
Structs
MSTIDLE_W | Write proxy for field |
SSAEN_W | Write proxy for field |
SSDEN_W | Write proxy for field |
Type Definitions
W | Writer for register INTENCLR |