lpc55s6x_pac/secgpio/
b0_26.rs1#[doc = "Reader of register B0_26"]
2pub type R = crate::R<u8, super::B0_26>;
3#[doc = "Writer for register B0_26"]
4pub type W = crate::W<u8, super::B0_26>;
5#[doc = "Register B0_26 `reset()`'s with value 0"]
6impl crate::ResetValue for super::B0_26 {
7 type Type = u8;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `PBYTE`"]
14pub type PBYTE_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `PBYTE`"]
16pub struct PBYTE_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> PBYTE_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
34 self.w
35 }
36}
37impl R {
38 #[doc = "Bit 0 - Read: state of the pin PIOm_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. One register for each port pin. Supported pins depends on the specific device and package. Write: loads the pin's output bit. One register for each port pin. Supported pins depends on the specific device and package."]
39 #[inline(always)]
40 pub fn pbyte(&self) -> PBYTE_R {
41 PBYTE_R::new((self.bits & 0x01) != 0)
42 }
43}
44impl W {
45 #[doc = "Bit 0 - Read: state of the pin PIOm_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. One register for each port pin. Supported pins depends on the specific device and package. Write: loads the pin's output bit. One register for each port pin. Supported pins depends on the specific device and package."]
46 #[inline(always)]
47 pub fn pbyte(&mut self) -> PBYTE_W {
48 PBYTE_W { w: self }
49 }
50}