1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 _reserved0: [u8; 2048usize],
5 #[doc = "0x800 - Configuration for shared functions."]
6 pub cfg: CFG,
7 #[doc = "0x804 - Status register for Master, Slave, and Monitor functions."]
8 pub stat: STAT,
9 #[doc = "0x808 - Interrupt Enable Set and read register."]
10 pub intenset: INTENSET,
11 #[doc = "0x80c - Interrupt Enable Clear register."]
12 pub intenclr: INTENCLR,
13 #[doc = "0x810 - Time-out value register."]
14 pub timeout: TIMEOUT,
15 #[doc = "0x814 - Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function."]
16 pub clkdiv: CLKDIV,
17 #[doc = "0x818 - Interrupt Status register for Master, Slave, and Monitor functions."]
18 pub intstat: INTSTAT,
19 _reserved7: [u8; 4usize],
20 #[doc = "0x820 - Master control register."]
21 pub mstctl: MSTCTL,
22 #[doc = "0x824 - Master timing configuration."]
23 pub msttime: MSTTIME,
24 #[doc = "0x828 - Combined Master receiver and transmitter data register."]
25 pub mstdat: MSTDAT,
26 _reserved10: [u8; 20usize],
27 #[doc = "0x840 - Slave control register."]
28 pub slvctl: SLVCTL,
29 #[doc = "0x844 - Combined Slave receiver and transmitter data register."]
30 pub slvdat: SLVDAT,
31 #[doc = "0x848 - Slave address register."]
32 pub slvadr0: SLVADR0,
33 #[doc = "0x84c - Slave address register."]
34 pub slvadr1: SLVADR1,
35 #[doc = "0x850 - Slave address register."]
36 pub slvadr2: SLVADR2,
37 #[doc = "0x854 - Slave address register."]
38 pub slvadr3: SLVADR3,
39 #[doc = "0x858 - Slave Qualification for address 0."]
40 pub slvqual0: SLVQUAL0,
41 _reserved17: [u8; 36usize],
42 #[doc = "0x880 - Monitor receiver data register."]
43 pub monrxdat: MONRXDAT,
44 _reserved18: [u8; 1912usize],
45 #[doc = "0xffc - Peripheral identification register."]
46 pub id: ID,
47}
48#[doc = "Configuration for shared functions.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
49pub type CFG = crate::Reg<u32, _CFG>;
50#[allow(missing_docs)]
51#[doc(hidden)]
52pub struct _CFG;
53#[doc = "`read()` method returns [cfg::R](cfg::R) reader structure"]
54impl crate::Readable for CFG {}
55#[doc = "`write(|w| ..)` method takes [cfg::W](cfg::W) writer structure"]
56impl crate::Writable for CFG {}
57#[doc = "Configuration for shared functions."]
58pub mod cfg;
59#[doc = "Status register for Master, Slave, and Monitor functions.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](stat) module"]
60pub type STAT = crate::Reg<u32, _STAT>;
61#[allow(missing_docs)]
62#[doc(hidden)]
63pub struct _STAT;
64#[doc = "`read()` method returns [stat::R](stat::R) reader structure"]
65impl crate::Readable for STAT {}
66#[doc = "`write(|w| ..)` method takes [stat::W](stat::W) writer structure"]
67impl crate::Writable for STAT {}
68#[doc = "Status register for Master, Slave, and Monitor functions."]
69pub mod stat;
70#[doc = "Interrupt Enable Set and read register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](intenset) module"]
71pub type INTENSET = crate::Reg<u32, _INTENSET>;
72#[allow(missing_docs)]
73#[doc(hidden)]
74pub struct _INTENSET;
75#[doc = "`read()` method returns [intenset::R](intenset::R) reader structure"]
76impl crate::Readable for INTENSET {}
77#[doc = "`write(|w| ..)` method takes [intenset::W](intenset::W) writer structure"]
78impl crate::Writable for INTENSET {}
79#[doc = "Interrupt Enable Set and read register."]
80pub mod intenset;
81#[doc = "Interrupt Enable Clear register.\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](intenclr) module"]
82pub type INTENCLR = crate::Reg<u32, _INTENCLR>;
83#[allow(missing_docs)]
84#[doc(hidden)]
85pub struct _INTENCLR;
86#[doc = "`write(|w| ..)` method takes [intenclr::W](intenclr::W) writer structure"]
87impl crate::Writable for INTENCLR {}
88#[doc = "Interrupt Enable Clear register."]
89pub mod intenclr;
90#[doc = "Time-out value register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timeout](timeout) module"]
91pub type TIMEOUT = crate::Reg<u32, _TIMEOUT>;
92#[allow(missing_docs)]
93#[doc(hidden)]
94pub struct _TIMEOUT;
95#[doc = "`read()` method returns [timeout::R](timeout::R) reader structure"]
96impl crate::Readable for TIMEOUT {}
97#[doc = "`write(|w| ..)` method takes [timeout::W](timeout::W) writer structure"]
98impl crate::Writable for TIMEOUT {}
99#[doc = "Time-out value register."]
100pub mod timeout;
101#[doc = "Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clkdiv](clkdiv) module"]
102pub type CLKDIV = crate::Reg<u32, _CLKDIV>;
103#[allow(missing_docs)]
104#[doc(hidden)]
105pub struct _CLKDIV;
106#[doc = "`read()` method returns [clkdiv::R](clkdiv::R) reader structure"]
107impl crate::Readable for CLKDIV {}
108#[doc = "`write(|w| ..)` method takes [clkdiv::W](clkdiv::W) writer structure"]
109impl crate::Writable for CLKDIV {}
110#[doc = "Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function."]
111pub mod clkdiv;
112#[doc = "Interrupt Status register for Master, Slave, and Monitor functions.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intstat](intstat) module"]
113pub type INTSTAT = crate::Reg<u32, _INTSTAT>;
114#[allow(missing_docs)]
115#[doc(hidden)]
116pub struct _INTSTAT;
117#[doc = "`read()` method returns [intstat::R](intstat::R) reader structure"]
118impl crate::Readable for INTSTAT {}
119#[doc = "Interrupt Status register for Master, Slave, and Monitor functions."]
120pub mod intstat;
121#[doc = "Master control register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mstctl](mstctl) module"]
122pub type MSTCTL = crate::Reg<u32, _MSTCTL>;
123#[allow(missing_docs)]
124#[doc(hidden)]
125pub struct _MSTCTL;
126#[doc = "`read()` method returns [mstctl::R](mstctl::R) reader structure"]
127impl crate::Readable for MSTCTL {}
128#[doc = "`write(|w| ..)` method takes [mstctl::W](mstctl::W) writer structure"]
129impl crate::Writable for MSTCTL {}
130#[doc = "Master control register."]
131pub mod mstctl;
132#[doc = "Master timing configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msttime](msttime) module"]
133pub type MSTTIME = crate::Reg<u32, _MSTTIME>;
134#[allow(missing_docs)]
135#[doc(hidden)]
136pub struct _MSTTIME;
137#[doc = "`read()` method returns [msttime::R](msttime::R) reader structure"]
138impl crate::Readable for MSTTIME {}
139#[doc = "`write(|w| ..)` method takes [msttime::W](msttime::W) writer structure"]
140impl crate::Writable for MSTTIME {}
141#[doc = "Master timing configuration."]
142pub mod msttime;
143#[doc = "Combined Master receiver and transmitter data register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mstdat](mstdat) module"]
144pub type MSTDAT = crate::Reg<u32, _MSTDAT>;
145#[allow(missing_docs)]
146#[doc(hidden)]
147pub struct _MSTDAT;
148#[doc = "`read()` method returns [mstdat::R](mstdat::R) reader structure"]
149impl crate::Readable for MSTDAT {}
150#[doc = "`write(|w| ..)` method takes [mstdat::W](mstdat::W) writer structure"]
151impl crate::Writable for MSTDAT {}
152#[doc = "Combined Master receiver and transmitter data register."]
153pub mod mstdat;
154#[doc = "Slave control register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [slvctl](slvctl) module"]
155pub type SLVCTL = crate::Reg<u32, _SLVCTL>;
156#[allow(missing_docs)]
157#[doc(hidden)]
158pub struct _SLVCTL;
159#[doc = "`read()` method returns [slvctl::R](slvctl::R) reader structure"]
160impl crate::Readable for SLVCTL {}
161#[doc = "`write(|w| ..)` method takes [slvctl::W](slvctl::W) writer structure"]
162impl crate::Writable for SLVCTL {}
163#[doc = "Slave control register."]
164pub mod slvctl;
165#[doc = "Combined Slave receiver and transmitter data register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [slvdat](slvdat) module"]
166pub type SLVDAT = crate::Reg<u32, _SLVDAT>;
167#[allow(missing_docs)]
168#[doc(hidden)]
169pub struct _SLVDAT;
170#[doc = "`read()` method returns [slvdat::R](slvdat::R) reader structure"]
171impl crate::Readable for SLVDAT {}
172#[doc = "`write(|w| ..)` method takes [slvdat::W](slvdat::W) writer structure"]
173impl crate::Writable for SLVDAT {}
174#[doc = "Combined Slave receiver and transmitter data register."]
175pub mod slvdat;
176#[doc = "Slave address register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [slvadr0](slvadr0) module"]
177pub type SLVADR0 = crate::Reg<u32, _SLVADR0>;
178#[allow(missing_docs)]
179#[doc(hidden)]
180pub struct _SLVADR0;
181#[doc = "`read()` method returns [slvadr0::R](slvadr0::R) reader structure"]
182impl crate::Readable for SLVADR0 {}
183#[doc = "`write(|w| ..)` method takes [slvadr0::W](slvadr0::W) writer structure"]
184impl crate::Writable for SLVADR0 {}
185#[doc = "Slave address register."]
186pub mod slvadr0;
187#[doc = "Slave address register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [slvadr1](slvadr1) module"]
188pub type SLVADR1 = crate::Reg<u32, _SLVADR1>;
189#[allow(missing_docs)]
190#[doc(hidden)]
191pub struct _SLVADR1;
192#[doc = "`read()` method returns [slvadr1::R](slvadr1::R) reader structure"]
193impl crate::Readable for SLVADR1 {}
194#[doc = "`write(|w| ..)` method takes [slvadr1::W](slvadr1::W) writer structure"]
195impl crate::Writable for SLVADR1 {}
196#[doc = "Slave address register."]
197pub mod slvadr1;
198#[doc = "Slave address register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [slvadr2](slvadr2) module"]
199pub type SLVADR2 = crate::Reg<u32, _SLVADR2>;
200#[allow(missing_docs)]
201#[doc(hidden)]
202pub struct _SLVADR2;
203#[doc = "`read()` method returns [slvadr2::R](slvadr2::R) reader structure"]
204impl crate::Readable for SLVADR2 {}
205#[doc = "`write(|w| ..)` method takes [slvadr2::W](slvadr2::W) writer structure"]
206impl crate::Writable for SLVADR2 {}
207#[doc = "Slave address register."]
208pub mod slvadr2;
209#[doc = "Slave address register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [slvadr3](slvadr3) module"]
210pub type SLVADR3 = crate::Reg<u32, _SLVADR3>;
211#[allow(missing_docs)]
212#[doc(hidden)]
213pub struct _SLVADR3;
214#[doc = "`read()` method returns [slvadr3::R](slvadr3::R) reader structure"]
215impl crate::Readable for SLVADR3 {}
216#[doc = "`write(|w| ..)` method takes [slvadr3::W](slvadr3::W) writer structure"]
217impl crate::Writable for SLVADR3 {}
218#[doc = "Slave address register."]
219pub mod slvadr3;
220#[doc = "Slave Qualification for address 0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [slvqual0](slvqual0) module"]
221pub type SLVQUAL0 = crate::Reg<u32, _SLVQUAL0>;
222#[allow(missing_docs)]
223#[doc(hidden)]
224pub struct _SLVQUAL0;
225#[doc = "`read()` method returns [slvqual0::R](slvqual0::R) reader structure"]
226impl crate::Readable for SLVQUAL0 {}
227#[doc = "`write(|w| ..)` method takes [slvqual0::W](slvqual0::W) writer structure"]
228impl crate::Writable for SLVQUAL0 {}
229#[doc = "Slave Qualification for address 0."]
230pub mod slvqual0;
231#[doc = "Monitor receiver data register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [monrxdat](monrxdat) module"]
232pub type MONRXDAT = crate::Reg<u32, _MONRXDAT>;
233#[allow(missing_docs)]
234#[doc(hidden)]
235pub struct _MONRXDAT;
236#[doc = "`read()` method returns [monrxdat::R](monrxdat::R) reader structure"]
237impl crate::Readable for MONRXDAT {}
238#[doc = "Monitor receiver data register."]
239pub mod monrxdat;
240#[doc = "Peripheral identification register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id](id) module"]
241pub type ID = crate::Reg<u32, _ID>;
242#[allow(missing_docs)]
243#[doc(hidden)]
244pub struct _ID;
245#[doc = "`read()` method returns [id::R](id::R) reader structure"]
246impl crate::Readable for ID {}
247#[doc = "Peripheral identification register."]
248pub mod id;