[][src]Type Definition lpc55s6x_pac::syscon::SCTCLKDIV

type SCTCLKDIV = Reg<u32, _SCTCLKDIV>;

SCT/PWM clock divider

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see sctclkdiv module

Trait Implementations

impl Readable for SCTCLKDIV[src]

read() method returns sctclkdiv::R reader structure

impl Writable for SCTCLKDIV[src]

write(|w| ..) method takes sctclkdiv::W writer structure

impl ResetValue for SCTCLKDIV[src]

Register SCTCLKDIV reset()'s with value 0x4000_0000

type Type = u32

Register size