[][src]Type Definition lpc55s6x_pac::syscon::FCCLKSEL3

type FCCLKSEL3 = Reg<u32, _FCCLKSEL3>;

Flexcomm Interface 3 clock source select for Fractional Rate Divider

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see fcclksel3 module

Trait Implementations

impl Readable for FCCLKSEL3[src]

read() method returns fcclksel3::R reader structure

impl Writable for FCCLKSEL3[src]

write(|w| ..) method takes fcclksel3::W writer structure

impl ResetValue for FCCLKSEL3[src]

Register FCCLKSEL3 reset()'s with value 0x07

type Type = u32

Register size