Type Definition lpc55s6x_pac::syscon::FCCLKSEL0

type FCCLKSEL0 = Reg<u32, _FCCLKSEL0>;

Flexcomm Interface 0 clock source select for Fractional Rate Divider

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see fcclksel0 module

Trait Implementations

impl Readable for FCCLKSEL0

read() method returns fcclksel0::R reader structure

impl Writable for FCCLKSEL0

write(|w| ..) method takes fcclksel0::W writer structure

impl ResetValue for FCCLKSEL0

Register FCCLKSEL0 reset()'s with value 0x07

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register