[][src]Type Definition lpc55s6x_pac::prince::SR_ENABLE0

type SR_ENABLE0 = Reg<u32, _SR_ENABLE0>;

Sub-Region Enable register for region 0

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see sr_enable0 module

Trait Implementations

impl Readable for SR_ENABLE0[src]

read() method returns sr_enable0::R reader structure

impl Writable for SR_ENABLE0[src]

write(|w| ..) method takes sr_enable0::W writer structure

impl ResetValue for SR_ENABLE0[src]

Register SR_ENABLE0 reset()'s with value 0

type Type = u32

Register size