lpc550x/syscon/
mclkclksel.rs

1#[doc = "Register `MCLKCLKSEL` reader"]
2pub struct R(crate::R<MCLKCLKSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MCLKCLKSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MCLKCLKSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MCLKCLKSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MCLKCLKSEL` writer"]
17pub struct W(crate::W<MCLKCLKSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MCLKCLKSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MCLKCLKSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MCLKCLKSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SEL` reader - MCLK clock source select."]
38pub type SEL_R = crate::FieldReader<u8, SEL_A>;
39#[doc = "MCLK clock source select.\n\nValue on reset: 7"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum SEL_A {
43    #[doc = "0: FRO 96 MHz clock."]
44    FRO_96MHZ = 0,
45    #[doc = "1: PLL0 clock."]
46    PLL0 = 1,
47    #[doc = "7: No clock."]
48    NONE = 7,
49}
50impl From<SEL_A> for u8 {
51    #[inline(always)]
52    fn from(variant: SEL_A) -> Self {
53        variant as _
54    }
55}
56impl SEL_R {
57    #[doc = "Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> Option<SEL_A> {
60        match self.bits {
61            0 => Some(SEL_A::FRO_96MHZ),
62            1 => Some(SEL_A::PLL0),
63            7 => Some(SEL_A::NONE),
64            _ => None,
65        }
66    }
67    #[doc = "Checks if the value of the field is `FRO_96MHZ`"]
68    #[inline(always)]
69    pub fn is_fro_96mhz(&self) -> bool {
70        *self == SEL_A::FRO_96MHZ
71    }
72    #[doc = "Checks if the value of the field is `PLL0`"]
73    #[inline(always)]
74    pub fn is_pll0(&self) -> bool {
75        *self == SEL_A::PLL0
76    }
77    #[doc = "Checks if the value of the field is `NONE`"]
78    #[inline(always)]
79    pub fn is_none(&self) -> bool {
80        *self == SEL_A::NONE
81    }
82}
83#[doc = "Field `SEL` writer - MCLK clock source select."]
84pub type SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MCLKCLKSEL_SPEC, u8, SEL_A, 3, O>;
85impl<'a, const O: u8> SEL_W<'a, O> {
86    #[doc = "FRO 96 MHz clock."]
87    #[inline(always)]
88    pub fn fro_96mhz(self) -> &'a mut W {
89        self.variant(SEL_A::FRO_96MHZ)
90    }
91    #[doc = "PLL0 clock."]
92    #[inline(always)]
93    pub fn pll0(self) -> &'a mut W {
94        self.variant(SEL_A::PLL0)
95    }
96    #[doc = "No clock."]
97    #[inline(always)]
98    pub fn none(self) -> &'a mut W {
99        self.variant(SEL_A::NONE)
100    }
101}
102impl R {
103    #[doc = "Bits 0:2 - MCLK clock source select."]
104    #[inline(always)]
105    pub fn sel(&self) -> SEL_R {
106        SEL_R::new((self.bits & 7) as u8)
107    }
108}
109impl W {
110    #[doc = "Bits 0:2 - MCLK clock source select."]
111    #[inline(always)]
112    pub fn sel(&mut self) -> SEL_W<0> {
113        SEL_W::new(self)
114    }
115    #[doc = "Writes raw bits to the register."]
116    #[inline(always)]
117    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118        self.0.bits(bits);
119        self
120    }
121}
122#[doc = "MCLK clock source select.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mclkclksel](index.html) module"]
123pub struct MCLKCLKSEL_SPEC;
124impl crate::RegisterSpec for MCLKCLKSEL_SPEC {
125    type Ux = u32;
126}
127#[doc = "`read()` method returns [mclkclksel::R](R) reader structure"]
128impl crate::Readable for MCLKCLKSEL_SPEC {
129    type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [mclkclksel::W](W) writer structure"]
132impl crate::Writable for MCLKCLKSEL_SPEC {
133    type Writer = W;
134}
135#[doc = "`reset()` method sets MCLKCLKSEL to value 0x07"]
136impl crate::Resettable for MCLKCLKSEL_SPEC {
137    #[inline(always)]
138    fn reset_value() -> Self::Ux {
139        0x07
140    }
141}
lpc550x/syscon/mclkclksel.rs

lpc550x/syscon/
mclkclksel.rs
