lpc550x/ahb_secure_ctrl/
sec_ctrl_ram2_slave_rule.rs1#[doc = "Register `SEC_CTRL_RAM2_SLAVE_RULE` reader"]
2pub struct R(crate::R<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SEC_CTRL_RAM2_SLAVE_RULE` writer"]
17pub struct W(crate::W<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SEC_CTRL_RAM2_SLAVE_RULE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RAM2_RULE` reader - Security access rules for the whole RAM2 : 0x2000_C000 - 0x2000_FFFF."]
38pub type RAM2_RULE_R = crate::FieldReader<u8, RAM2_RULE_A>;
39#[doc = "Security access rules for the whole RAM2 : 0x2000_C000 - 0x2000_FFFF.\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum RAM2_RULE_A {
43 #[doc = "0: Non-secure and Non-priviledge user access allowed."]
44 ENUM_NS_NP = 0,
45 #[doc = "1: Non-secure and Privilege access allowed."]
46 ENUM_NS_P = 1,
47 #[doc = "2: Secure and Non-priviledge user access allowed."]
48 ENUM_S_NP = 2,
49 #[doc = "3: Secure and Priviledge user access allowed."]
50 ENUM_S_P = 3,
51}
52impl From<RAM2_RULE_A> for u8 {
53 #[inline(always)]
54 fn from(variant: RAM2_RULE_A) -> Self {
55 variant as _
56 }
57}
58impl RAM2_RULE_R {
59 #[doc = "Get enumerated values variant"]
60 #[inline(always)]
61 pub fn variant(&self) -> RAM2_RULE_A {
62 match self.bits {
63 0 => RAM2_RULE_A::ENUM_NS_NP,
64 1 => RAM2_RULE_A::ENUM_NS_P,
65 2 => RAM2_RULE_A::ENUM_S_NP,
66 3 => RAM2_RULE_A::ENUM_S_P,
67 _ => unreachable!(),
68 }
69 }
70 #[doc = "Checks if the value of the field is `ENUM_NS_NP`"]
71 #[inline(always)]
72 pub fn is_enum_ns_np(&self) -> bool {
73 *self == RAM2_RULE_A::ENUM_NS_NP
74 }
75 #[doc = "Checks if the value of the field is `ENUM_NS_P`"]
76 #[inline(always)]
77 pub fn is_enum_ns_p(&self) -> bool {
78 *self == RAM2_RULE_A::ENUM_NS_P
79 }
80 #[doc = "Checks if the value of the field is `ENUM_S_NP`"]
81 #[inline(always)]
82 pub fn is_enum_s_np(&self) -> bool {
83 *self == RAM2_RULE_A::ENUM_S_NP
84 }
85 #[doc = "Checks if the value of the field is `ENUM_S_P`"]
86 #[inline(always)]
87 pub fn is_enum_s_p(&self) -> bool {
88 *self == RAM2_RULE_A::ENUM_S_P
89 }
90}
91#[doc = "Field `RAM2_RULE` writer - Security access rules for the whole RAM2 : 0x2000_C000 - 0x2000_FFFF."]
92pub type RAM2_RULE_W<'a, const O: u8> =
93 crate::FieldWriterSafe<'a, u32, SEC_CTRL_RAM2_SLAVE_RULE_SPEC, u8, RAM2_RULE_A, 2, O>;
94impl<'a, const O: u8> RAM2_RULE_W<'a, O> {
95 #[doc = "Non-secure and Non-priviledge user access allowed."]
96 #[inline(always)]
97 pub fn enum_ns_np(self) -> &'a mut W {
98 self.variant(RAM2_RULE_A::ENUM_NS_NP)
99 }
100 #[doc = "Non-secure and Privilege access allowed."]
101 #[inline(always)]
102 pub fn enum_ns_p(self) -> &'a mut W {
103 self.variant(RAM2_RULE_A::ENUM_NS_P)
104 }
105 #[doc = "Secure and Non-priviledge user access allowed."]
106 #[inline(always)]
107 pub fn enum_s_np(self) -> &'a mut W {
108 self.variant(RAM2_RULE_A::ENUM_S_NP)
109 }
110 #[doc = "Secure and Priviledge user access allowed."]
111 #[inline(always)]
112 pub fn enum_s_p(self) -> &'a mut W {
113 self.variant(RAM2_RULE_A::ENUM_S_P)
114 }
115}
116impl R {
117 #[doc = "Bits 0:1 - Security access rules for the whole RAM2 : 0x2000_C000 - 0x2000_FFFF."]
118 #[inline(always)]
119 pub fn ram2_rule(&self) -> RAM2_RULE_R {
120 RAM2_RULE_R::new((self.bits & 3) as u8)
121 }
122}
123impl W {
124 #[doc = "Bits 0:1 - Security access rules for the whole RAM2 : 0x2000_C000 - 0x2000_FFFF."]
125 #[inline(always)]
126 pub fn ram2_rule(&mut self) -> RAM2_RULE_W<0> {
127 RAM2_RULE_W::new(self)
128 }
129 #[doc = "Writes raw bits to the register."]
130 #[inline(always)]
131 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
132 self.0.bits(bits);
133 self
134 }
135}
136#[doc = "Security access rules for RAM2 slaves.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sec_ctrl_ram2_slave_rule](index.html) module"]
137pub struct SEC_CTRL_RAM2_SLAVE_RULE_SPEC;
138impl crate::RegisterSpec for SEC_CTRL_RAM2_SLAVE_RULE_SPEC {
139 type Ux = u32;
140}
141#[doc = "`read()` method returns [sec_ctrl_ram2_slave_rule::R](R) reader structure"]
142impl crate::Readable for SEC_CTRL_RAM2_SLAVE_RULE_SPEC {
143 type Reader = R;
144}
145#[doc = "`write(|w| ..)` method takes [sec_ctrl_ram2_slave_rule::W](W) writer structure"]
146impl crate::Writable for SEC_CTRL_RAM2_SLAVE_RULE_SPEC {
147 type Writer = W;
148}
149#[doc = "`reset()` method sets SEC_CTRL_RAM2_SLAVE_RULE to value 0"]
150impl crate::Resettable for SEC_CTRL_RAM2_SLAVE_RULE_SPEC {
151 #[inline(always)]
152 fn reset_value() -> Self::Ux {
153 0
154 }
155}