lpc550x/secgpio/
b0_9.rs

1#[doc = "Register `B0_9` reader"]
2pub struct R(crate::R<B0_9_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<B0_9_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<B0_9_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<B0_9_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `B0_9` writer"]
17pub struct W(crate::W<B0_9_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<B0_9_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<B0_9_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<B0_9_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PBYTE` reader - Read: state of the pin PIOm_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. One register for each port pin. Supported pins depends on the specific device and package. Write: loads the pin's output bit. One register for each port pin. Supported pins depends on the specific device and package."]
38pub type PBYTE_R = crate::BitReader<bool>;
39#[doc = "Field `PBYTE` writer - Read: state of the pin PIOm_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. One register for each port pin. Supported pins depends on the specific device and package. Write: loads the pin's output bit. One register for each port pin. Supported pins depends on the specific device and package."]
40pub type PBYTE_W<'a, const O: u8> = crate::BitWriter<'a, u8, B0_9_SPEC, bool, O>;
41impl R {
42    #[doc = "Bit 0 - Read: state of the pin PIOm_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. One register for each port pin. Supported pins depends on the specific device and package. Write: loads the pin's output bit. One register for each port pin. Supported pins depends on the specific device and package."]
43    #[inline(always)]
44    pub fn pbyte(&self) -> PBYTE_R {
45        PBYTE_R::new((self.bits & 1) != 0)
46    }
47}
48impl W {
49    #[doc = "Bit 0 - Read: state of the pin PIOm_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. One register for each port pin. Supported pins depends on the specific device and package. Write: loads the pin's output bit. One register for each port pin. Supported pins depends on the specific device and package."]
50    #[inline(always)]
51    pub fn pbyte(&mut self) -> PBYTE_W<0> {
52        PBYTE_W::new(self)
53    }
54    #[doc = "Writes raw bits to the register."]
55    #[inline(always)]
56    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
57        self.0.bits(bits);
58        self
59    }
60}
61#[doc = "Byte pin registers for all port GPIO pins.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [b0_9](index.html) module"]
62pub struct B0_9_SPEC;
63impl crate::RegisterSpec for B0_9_SPEC {
64    type Ux = u8;
65}
66#[doc = "`read()` method returns [b0_9::R](R) reader structure"]
67impl crate::Readable for B0_9_SPEC {
68    type Reader = R;
69}
70#[doc = "`write(|w| ..)` method takes [b0_9::W](W) writer structure"]
71impl crate::Writable for B0_9_SPEC {
72    type Writer = W;
73}
74#[doc = "`reset()` method sets B0_9 to value 0"]
75impl crate::Resettable for B0_9_SPEC {
76    #[inline(always)]
77    fn reset_value() -> Self::Ux {
78        0
79    }
80}
lpc550x/secgpio/b0_9.rs

lpc550x/secgpio/
b0_9.rs
