1#[doc = "Register `LPM` reader"]
2pub struct R(crate::R<LPM_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<LPM_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<LPM_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<LPM_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `LPM` writer"]
17pub struct W(crate::W<LPM_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<LPM_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<LPM_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<LPM_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `HIRD_HW` reader - Host Initiated Resume Duration - HW."]
38pub struct HIRD_HW_R(crate::FieldReader<u8, u8>);
39impl HIRD_HW_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: u8) -> Self {
42 HIRD_HW_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for HIRD_HW_R {
46 type Target = crate::FieldReader<u8, u8>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `HIRD_SW` reader - Host Initiated Resume Duration - SW."]
53pub struct HIRD_SW_R(crate::FieldReader<u8, u8>);
54impl HIRD_SW_R {
55 #[inline(always)]
56 pub(crate) fn new(bits: u8) -> Self {
57 HIRD_SW_R(crate::FieldReader::new(bits))
58 }
59}
60impl core::ops::Deref for HIRD_SW_R {
61 type Target = crate::FieldReader<u8, u8>;
62 #[inline(always)]
63 fn deref(&self) -> &Self::Target {
64 &self.0
65 }
66}
67#[doc = "Field `HIRD_SW` writer - Host Initiated Resume Duration - SW."]
68pub struct HIRD_SW_W<'a> {
69 w: &'a mut W,
70}
71impl<'a> HIRD_SW_W<'a> {
72 #[doc = r"Writes raw bits to the field"]
73 #[inline(always)]
74 pub unsafe fn bits(self, value: u8) -> &'a mut W {
75 self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4);
76 self.w
77 }
78}
79#[doc = "Field `DATA_PENDING` reader - As long as this bit is set to one and LPM supported bit is set to one, HW will return a NYET handshake on every LPM token it receives."]
80pub struct DATA_PENDING_R(crate::FieldReader<bool, bool>);
81impl DATA_PENDING_R {
82 #[inline(always)]
83 pub(crate) fn new(bits: bool) -> Self {
84 DATA_PENDING_R(crate::FieldReader::new(bits))
85 }
86}
87impl core::ops::Deref for DATA_PENDING_R {
88 type Target = crate::FieldReader<bool, bool>;
89 #[inline(always)]
90 fn deref(&self) -> &Self::Target {
91 &self.0
92 }
93}
94#[doc = "Field `DATA_PENDING` writer - As long as this bit is set to one and LPM supported bit is set to one, HW will return a NYET handshake on every LPM token it receives."]
95pub struct DATA_PENDING_W<'a> {
96 w: &'a mut W,
97}
98impl<'a> DATA_PENDING_W<'a> {
99 #[doc = r"Sets the field bit"]
100 #[inline(always)]
101 pub fn set_bit(self) -> &'a mut W {
102 self.bit(true)
103 }
104 #[doc = r"Clears the field bit"]
105 #[inline(always)]
106 pub fn clear_bit(self) -> &'a mut W {
107 self.bit(false)
108 }
109 #[doc = r"Writes raw bits to the field"]
110 #[inline(always)]
111 pub fn bit(self, value: bool) -> &'a mut W {
112 self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
113 self.w
114 }
115}
116impl R {
117 #[doc = "Bits 0:3 - Host Initiated Resume Duration - HW."]
118 #[inline(always)]
119 pub fn hird_hw(&self) -> HIRD_HW_R {
120 HIRD_HW_R::new((self.bits & 0x0f) as u8)
121 }
122 #[doc = "Bits 4:7 - Host Initiated Resume Duration - SW."]
123 #[inline(always)]
124 pub fn hird_sw(&self) -> HIRD_SW_R {
125 HIRD_SW_R::new(((self.bits >> 4) & 0x0f) as u8)
126 }
127 #[doc = "Bit 8 - As long as this bit is set to one and LPM supported bit is set to one, HW will return a NYET handshake on every LPM token it receives."]
128 #[inline(always)]
129 pub fn data_pending(&self) -> DATA_PENDING_R {
130 DATA_PENDING_R::new(((self.bits >> 8) & 0x01) != 0)
131 }
132}
133impl W {
134 #[doc = "Bits 4:7 - Host Initiated Resume Duration - SW."]
135 #[inline(always)]
136 pub fn hird_sw(&mut self) -> HIRD_SW_W {
137 HIRD_SW_W { w: self }
138 }
139 #[doc = "Bit 8 - As long as this bit is set to one and LPM supported bit is set to one, HW will return a NYET handshake on every LPM token it receives."]
140 #[inline(always)]
141 pub fn data_pending(&mut self) -> DATA_PENDING_W {
142 DATA_PENDING_W { w: self }
143 }
144 #[doc = "Writes raw bits to the register."]
145 #[inline(always)]
146 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
147 self.0.bits(bits);
148 self
149 }
150}
151#[doc = "USB Link Power Management register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lpm](index.html) module"]
152pub struct LPM_SPEC;
153impl crate::RegisterSpec for LPM_SPEC {
154 type Ux = u32;
155}
156#[doc = "`read()` method returns [lpm::R](R) reader structure"]
157impl crate::Readable for LPM_SPEC {
158 type Reader = R;
159}
160#[doc = "`write(|w| ..)` method takes [lpm::W](W) writer structure"]
161impl crate::Writable for LPM_SPEC {
162 type Writer = W;
163}
164#[doc = "`reset()` method sets LPM to value 0"]
165impl crate::Resettable for LPM_SPEC {
166 #[inline(always)]
167 fn reset_value() -> Self::Ux {
168 0
169 }
170}