lpc55_pac/syscon/
pll0ctrl.rs

1#[doc = "Register `PLL0CTRL` reader"]
2pub struct R(crate::R<PLL0CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PLL0CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PLL0CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PLL0CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PLL0CTRL` writer"]
17pub struct W(crate::W<PLL0CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PLL0CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PLL0CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PLL0CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SELR` reader - Bandwidth select R value."]
38pub struct SELR_R(crate::FieldReader<u8, u8>);
39impl SELR_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        SELR_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for SELR_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `SELR` writer - Bandwidth select R value."]
53pub struct SELR_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> SELR_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f);
61        self.w
62    }
63}
64#[doc = "Field `SELI` reader - Bandwidth select I value."]
65pub struct SELI_R(crate::FieldReader<u8, u8>);
66impl SELI_R {
67    #[inline(always)]
68    pub(crate) fn new(bits: u8) -> Self {
69        SELI_R(crate::FieldReader::new(bits))
70    }
71}
72impl core::ops::Deref for SELI_R {
73    type Target = crate::FieldReader<u8, u8>;
74    #[inline(always)]
75    fn deref(&self) -> &Self::Target {
76        &self.0
77    }
78}
79#[doc = "Field `SELI` writer - Bandwidth select I value."]
80pub struct SELI_W<'a> {
81    w: &'a mut W,
82}
83impl<'a> SELI_W<'a> {
84    #[doc = r"Writes raw bits to the field"]
85    #[inline(always)]
86    pub unsafe fn bits(self, value: u8) -> &'a mut W {
87        self.w.bits = (self.w.bits & !(0x3f << 4)) | ((value as u32 & 0x3f) << 4);
88        self.w
89    }
90}
91#[doc = "Field `SELP` reader - Bandwidth select P value."]
92pub struct SELP_R(crate::FieldReader<u8, u8>);
93impl SELP_R {
94    #[inline(always)]
95    pub(crate) fn new(bits: u8) -> Self {
96        SELP_R(crate::FieldReader::new(bits))
97    }
98}
99impl core::ops::Deref for SELP_R {
100    type Target = crate::FieldReader<u8, u8>;
101    #[inline(always)]
102    fn deref(&self) -> &Self::Target {
103        &self.0
104    }
105}
106#[doc = "Field `SELP` writer - Bandwidth select P value."]
107pub struct SELP_W<'a> {
108    w: &'a mut W,
109}
110impl<'a> SELP_W<'a> {
111    #[doc = r"Writes raw bits to the field"]
112    #[inline(always)]
113    pub unsafe fn bits(self, value: u8) -> &'a mut W {
114        self.w.bits = (self.w.bits & !(0x1f << 10)) | ((value as u32 & 0x1f) << 10);
115        self.w
116    }
117}
118#[doc = "Bypass PLL input clock is sent directly to the PLL output (default).\n\nValue on reset: 0"]
119#[derive(Clone, Copy, Debug, PartialEq)]
120pub enum BYPASSPLL_A {
121    #[doc = "0: use PLL."]
122    USED = 0,
123    #[doc = "1: Bypass PLL input clock is sent directly to the PLL output."]
124    BYPASSED = 1,
125}
126impl From<BYPASSPLL_A> for bool {
127    #[inline(always)]
128    fn from(variant: BYPASSPLL_A) -> Self {
129        variant as u8 != 0
130    }
131}
132#[doc = "Field `BYPASSPLL` reader - Bypass PLL input clock is sent directly to the PLL output (default)."]
133pub struct BYPASSPLL_R(crate::FieldReader<bool, BYPASSPLL_A>);
134impl BYPASSPLL_R {
135    #[inline(always)]
136    pub(crate) fn new(bits: bool) -> Self {
137        BYPASSPLL_R(crate::FieldReader::new(bits))
138    }
139    #[doc = r"Get enumerated values variant"]
140    #[inline(always)]
141    pub fn variant(&self) -> BYPASSPLL_A {
142        match self.bits {
143            false => BYPASSPLL_A::USED,
144            true => BYPASSPLL_A::BYPASSED,
145        }
146    }
147    #[doc = "Checks if the value of the field is `USED`"]
148    #[inline(always)]
149    pub fn is_used(&self) -> bool {
150        **self == BYPASSPLL_A::USED
151    }
152    #[doc = "Checks if the value of the field is `BYPASSED`"]
153    #[inline(always)]
154    pub fn is_bypassed(&self) -> bool {
155        **self == BYPASSPLL_A::BYPASSED
156    }
157}
158impl core::ops::Deref for BYPASSPLL_R {
159    type Target = crate::FieldReader<bool, BYPASSPLL_A>;
160    #[inline(always)]
161    fn deref(&self) -> &Self::Target {
162        &self.0
163    }
164}
165#[doc = "Field `BYPASSPLL` writer - Bypass PLL input clock is sent directly to the PLL output (default)."]
166pub struct BYPASSPLL_W<'a> {
167    w: &'a mut W,
168}
169impl<'a> BYPASSPLL_W<'a> {
170    #[doc = r"Writes `variant` to the field"]
171    #[inline(always)]
172    pub fn variant(self, variant: BYPASSPLL_A) -> &'a mut W {
173        self.bit(variant.into())
174    }
175    #[doc = "use PLL."]
176    #[inline(always)]
177    pub fn used(self) -> &'a mut W {
178        self.variant(BYPASSPLL_A::USED)
179    }
180    #[doc = "Bypass PLL input clock is sent directly to the PLL output."]
181    #[inline(always)]
182    pub fn bypassed(self) -> &'a mut W {
183        self.variant(BYPASSPLL_A::BYPASSED)
184    }
185    #[doc = r"Sets the field bit"]
186    #[inline(always)]
187    pub fn set_bit(self) -> &'a mut W {
188        self.bit(true)
189    }
190    #[doc = r"Clears the field bit"]
191    #[inline(always)]
192    pub fn clear_bit(self) -> &'a mut W {
193        self.bit(false)
194    }
195    #[doc = r"Writes raw bits to the field"]
196    #[inline(always)]
197    pub fn bit(self, value: bool) -> &'a mut W {
198        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
199        self.w
200    }
201}
202#[doc = "bypass of the divide-by-2 divider in the post-divider.\n\nValue on reset: 0"]
203#[derive(Clone, Copy, Debug, PartialEq)]
204pub enum BYPASSPOSTDIV2_A {
205    #[doc = "0: use the divide-by-2 divider in the post-divider."]
206    USED = 0,
207    #[doc = "1: bypass of the divide-by-2 divider in the post-divider."]
208    BYPASSED = 1,
209}
210impl From<BYPASSPOSTDIV2_A> for bool {
211    #[inline(always)]
212    fn from(variant: BYPASSPOSTDIV2_A) -> Self {
213        variant as u8 != 0
214    }
215}
216#[doc = "Field `BYPASSPOSTDIV2` reader - bypass of the divide-by-2 divider in the post-divider."]
217pub struct BYPASSPOSTDIV2_R(crate::FieldReader<bool, BYPASSPOSTDIV2_A>);
218impl BYPASSPOSTDIV2_R {
219    #[inline(always)]
220    pub(crate) fn new(bits: bool) -> Self {
221        BYPASSPOSTDIV2_R(crate::FieldReader::new(bits))
222    }
223    #[doc = r"Get enumerated values variant"]
224    #[inline(always)]
225    pub fn variant(&self) -> BYPASSPOSTDIV2_A {
226        match self.bits {
227            false => BYPASSPOSTDIV2_A::USED,
228            true => BYPASSPOSTDIV2_A::BYPASSED,
229        }
230    }
231    #[doc = "Checks if the value of the field is `USED`"]
232    #[inline(always)]
233    pub fn is_used(&self) -> bool {
234        **self == BYPASSPOSTDIV2_A::USED
235    }
236    #[doc = "Checks if the value of the field is `BYPASSED`"]
237    #[inline(always)]
238    pub fn is_bypassed(&self) -> bool {
239        **self == BYPASSPOSTDIV2_A::BYPASSED
240    }
241}
242impl core::ops::Deref for BYPASSPOSTDIV2_R {
243    type Target = crate::FieldReader<bool, BYPASSPOSTDIV2_A>;
244    #[inline(always)]
245    fn deref(&self) -> &Self::Target {
246        &self.0
247    }
248}
249#[doc = "Field `BYPASSPOSTDIV2` writer - bypass of the divide-by-2 divider in the post-divider."]
250pub struct BYPASSPOSTDIV2_W<'a> {
251    w: &'a mut W,
252}
253impl<'a> BYPASSPOSTDIV2_W<'a> {
254    #[doc = r"Writes `variant` to the field"]
255    #[inline(always)]
256    pub fn variant(self, variant: BYPASSPOSTDIV2_A) -> &'a mut W {
257        self.bit(variant.into())
258    }
259    #[doc = "use the divide-by-2 divider in the post-divider."]
260    #[inline(always)]
261    pub fn used(self) -> &'a mut W {
262        self.variant(BYPASSPOSTDIV2_A::USED)
263    }
264    #[doc = "bypass of the divide-by-2 divider in the post-divider."]
265    #[inline(always)]
266    pub fn bypassed(self) -> &'a mut W {
267        self.variant(BYPASSPOSTDIV2_A::BYPASSED)
268    }
269    #[doc = r"Sets the field bit"]
270    #[inline(always)]
271    pub fn set_bit(self) -> &'a mut W {
272        self.bit(true)
273    }
274    #[doc = r"Clears the field bit"]
275    #[inline(always)]
276    pub fn clear_bit(self) -> &'a mut W {
277        self.bit(false)
278    }
279    #[doc = r"Writes raw bits to the field"]
280    #[inline(always)]
281    pub fn bit(self, value: bool) -> &'a mut W {
282        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
283        self.w
284    }
285}
286#[doc = "Field `LIMUPOFF` reader - limup_off = 1 in spread spectrum and fractional PLL applications."]
287pub struct LIMUPOFF_R(crate::FieldReader<bool, bool>);
288impl LIMUPOFF_R {
289    #[inline(always)]
290    pub(crate) fn new(bits: bool) -> Self {
291        LIMUPOFF_R(crate::FieldReader::new(bits))
292    }
293}
294impl core::ops::Deref for LIMUPOFF_R {
295    type Target = crate::FieldReader<bool, bool>;
296    #[inline(always)]
297    fn deref(&self) -> &Self::Target {
298        &self.0
299    }
300}
301#[doc = "Field `LIMUPOFF` writer - limup_off = 1 in spread spectrum and fractional PLL applications."]
302pub struct LIMUPOFF_W<'a> {
303    w: &'a mut W,
304}
305impl<'a> LIMUPOFF_W<'a> {
306    #[doc = r"Sets the field bit"]
307    #[inline(always)]
308    pub fn set_bit(self) -> &'a mut W {
309        self.bit(true)
310    }
311    #[doc = r"Clears the field bit"]
312    #[inline(always)]
313    pub fn clear_bit(self) -> &'a mut W {
314        self.bit(false)
315    }
316    #[doc = r"Writes raw bits to the field"]
317    #[inline(always)]
318    pub fn bit(self, value: bool) -> &'a mut W {
319        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
320        self.w
321    }
322}
323#[doc = "Control of the bandwidth of the PLL.\n\nValue on reset: 0"]
324#[derive(Clone, Copy, Debug, PartialEq)]
325pub enum BWDIRECT_A {
326    #[doc = "0: the bandwidth is changed synchronously with the feedback-divider."]
327    SYNC = 0,
328    #[doc = "1: modify the bandwidth of the PLL directly."]
329    DIRECT = 1,
330}
331impl From<BWDIRECT_A> for bool {
332    #[inline(always)]
333    fn from(variant: BWDIRECT_A) -> Self {
334        variant as u8 != 0
335    }
336}
337#[doc = "Field `BWDIRECT` reader - Control of the bandwidth of the PLL."]
338pub struct BWDIRECT_R(crate::FieldReader<bool, BWDIRECT_A>);
339impl BWDIRECT_R {
340    #[inline(always)]
341    pub(crate) fn new(bits: bool) -> Self {
342        BWDIRECT_R(crate::FieldReader::new(bits))
343    }
344    #[doc = r"Get enumerated values variant"]
345    #[inline(always)]
346    pub fn variant(&self) -> BWDIRECT_A {
347        match self.bits {
348            false => BWDIRECT_A::SYNC,
349            true => BWDIRECT_A::DIRECT,
350        }
351    }
352    #[doc = "Checks if the value of the field is `SYNC`"]
353    #[inline(always)]
354    pub fn is_sync(&self) -> bool {
355        **self == BWDIRECT_A::SYNC
356    }
357    #[doc = "Checks if the value of the field is `DIRECT`"]
358    #[inline(always)]
359    pub fn is_direct(&self) -> bool {
360        **self == BWDIRECT_A::DIRECT
361    }
362}
363impl core::ops::Deref for BWDIRECT_R {
364    type Target = crate::FieldReader<bool, BWDIRECT_A>;
365    #[inline(always)]
366    fn deref(&self) -> &Self::Target {
367        &self.0
368    }
369}
370#[doc = "Field `BWDIRECT` writer - Control of the bandwidth of the PLL."]
371pub struct BWDIRECT_W<'a> {
372    w: &'a mut W,
373}
374impl<'a> BWDIRECT_W<'a> {
375    #[doc = r"Writes `variant` to the field"]
376    #[inline(always)]
377    pub fn variant(self, variant: BWDIRECT_A) -> &'a mut W {
378        self.bit(variant.into())
379    }
380    #[doc = "the bandwidth is changed synchronously with the feedback-divider."]
381    #[inline(always)]
382    pub fn sync(self) -> &'a mut W {
383        self.variant(BWDIRECT_A::SYNC)
384    }
385    #[doc = "modify the bandwidth of the PLL directly."]
386    #[inline(always)]
387    pub fn direct(self) -> &'a mut W {
388        self.variant(BWDIRECT_A::DIRECT)
389    }
390    #[doc = r"Sets the field bit"]
391    #[inline(always)]
392    pub fn set_bit(self) -> &'a mut W {
393        self.bit(true)
394    }
395    #[doc = r"Clears the field bit"]
396    #[inline(always)]
397    pub fn clear_bit(self) -> &'a mut W {
398        self.bit(false)
399    }
400    #[doc = r"Writes raw bits to the field"]
401    #[inline(always)]
402    pub fn bit(self, value: bool) -> &'a mut W {
403        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
404        self.w
405    }
406}
407#[doc = "bypass of the pre-divider.\n\nValue on reset: 0"]
408#[derive(Clone, Copy, Debug, PartialEq)]
409pub enum BYPASSPREDIV_A {
410    #[doc = "0: use the pre-divider."]
411    USED = 0,
412    #[doc = "1: bypass of the pre-divider."]
413    BYPASSED = 1,
414}
415impl From<BYPASSPREDIV_A> for bool {
416    #[inline(always)]
417    fn from(variant: BYPASSPREDIV_A) -> Self {
418        variant as u8 != 0
419    }
420}
421#[doc = "Field `BYPASSPREDIV` reader - bypass of the pre-divider."]
422pub struct BYPASSPREDIV_R(crate::FieldReader<bool, BYPASSPREDIV_A>);
423impl BYPASSPREDIV_R {
424    #[inline(always)]
425    pub(crate) fn new(bits: bool) -> Self {
426        BYPASSPREDIV_R(crate::FieldReader::new(bits))
427    }
428    #[doc = r"Get enumerated values variant"]
429    #[inline(always)]
430    pub fn variant(&self) -> BYPASSPREDIV_A {
431        match self.bits {
432            false => BYPASSPREDIV_A::USED,
433            true => BYPASSPREDIV_A::BYPASSED,
434        }
435    }
436    #[doc = "Checks if the value of the field is `USED`"]
437    #[inline(always)]
438    pub fn is_used(&self) -> bool {
439        **self == BYPASSPREDIV_A::USED
440    }
441    #[doc = "Checks if the value of the field is `BYPASSED`"]
442    #[inline(always)]
443    pub fn is_bypassed(&self) -> bool {
444        **self == BYPASSPREDIV_A::BYPASSED
445    }
446}
447impl core::ops::Deref for BYPASSPREDIV_R {
448    type Target = crate::FieldReader<bool, BYPASSPREDIV_A>;
449    #[inline(always)]
450    fn deref(&self) -> &Self::Target {
451        &self.0
452    }
453}
454#[doc = "Field `BYPASSPREDIV` writer - bypass of the pre-divider."]
455pub struct BYPASSPREDIV_W<'a> {
456    w: &'a mut W,
457}
458impl<'a> BYPASSPREDIV_W<'a> {
459    #[doc = r"Writes `variant` to the field"]
460    #[inline(always)]
461    pub fn variant(self, variant: BYPASSPREDIV_A) -> &'a mut W {
462        self.bit(variant.into())
463    }
464    #[doc = "use the pre-divider."]
465    #[inline(always)]
466    pub fn used(self) -> &'a mut W {
467        self.variant(BYPASSPREDIV_A::USED)
468    }
469    #[doc = "bypass of the pre-divider."]
470    #[inline(always)]
471    pub fn bypassed(self) -> &'a mut W {
472        self.variant(BYPASSPREDIV_A::BYPASSED)
473    }
474    #[doc = r"Sets the field bit"]
475    #[inline(always)]
476    pub fn set_bit(self) -> &'a mut W {
477        self.bit(true)
478    }
479    #[doc = r"Clears the field bit"]
480    #[inline(always)]
481    pub fn clear_bit(self) -> &'a mut W {
482        self.bit(false)
483    }
484    #[doc = r"Writes raw bits to the field"]
485    #[inline(always)]
486    pub fn bit(self, value: bool) -> &'a mut W {
487        self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19);
488        self.w
489    }
490}
491#[doc = "bypass of the post-divider.\n\nValue on reset: 0"]
492#[derive(Clone, Copy, Debug, PartialEq)]
493pub enum BYPASSPOSTDIV_A {
494    #[doc = "0: use the post-divider."]
495    USED = 0,
496    #[doc = "1: bypass of the post-divider."]
497    BYPASSED = 1,
498}
499impl From<BYPASSPOSTDIV_A> for bool {
500    #[inline(always)]
501    fn from(variant: BYPASSPOSTDIV_A) -> Self {
502        variant as u8 != 0
503    }
504}
505#[doc = "Field `BYPASSPOSTDIV` reader - bypass of the post-divider."]
506pub struct BYPASSPOSTDIV_R(crate::FieldReader<bool, BYPASSPOSTDIV_A>);
507impl BYPASSPOSTDIV_R {
508    #[inline(always)]
509    pub(crate) fn new(bits: bool) -> Self {
510        BYPASSPOSTDIV_R(crate::FieldReader::new(bits))
511    }
512    #[doc = r"Get enumerated values variant"]
513    #[inline(always)]
514    pub fn variant(&self) -> BYPASSPOSTDIV_A {
515        match self.bits {
516            false => BYPASSPOSTDIV_A::USED,
517            true => BYPASSPOSTDIV_A::BYPASSED,
518        }
519    }
520    #[doc = "Checks if the value of the field is `USED`"]
521    #[inline(always)]
522    pub fn is_used(&self) -> bool {
523        **self == BYPASSPOSTDIV_A::USED
524    }
525    #[doc = "Checks if the value of the field is `BYPASSED`"]
526    #[inline(always)]
527    pub fn is_bypassed(&self) -> bool {
528        **self == BYPASSPOSTDIV_A::BYPASSED
529    }
530}
531impl core::ops::Deref for BYPASSPOSTDIV_R {
532    type Target = crate::FieldReader<bool, BYPASSPOSTDIV_A>;
533    #[inline(always)]
534    fn deref(&self) -> &Self::Target {
535        &self.0
536    }
537}
538#[doc = "Field `BYPASSPOSTDIV` writer - bypass of the post-divider."]
539pub struct BYPASSPOSTDIV_W<'a> {
540    w: &'a mut W,
541}
542impl<'a> BYPASSPOSTDIV_W<'a> {
543    #[doc = r"Writes `variant` to the field"]
544    #[inline(always)]
545    pub fn variant(self, variant: BYPASSPOSTDIV_A) -> &'a mut W {
546        self.bit(variant.into())
547    }
548    #[doc = "use the post-divider."]
549    #[inline(always)]
550    pub fn used(self) -> &'a mut W {
551        self.variant(BYPASSPOSTDIV_A::USED)
552    }
553    #[doc = "bypass of the post-divider."]
554    #[inline(always)]
555    pub fn bypassed(self) -> &'a mut W {
556        self.variant(BYPASSPOSTDIV_A::BYPASSED)
557    }
558    #[doc = r"Sets the field bit"]
559    #[inline(always)]
560    pub fn set_bit(self) -> &'a mut W {
561        self.bit(true)
562    }
563    #[doc = r"Clears the field bit"]
564    #[inline(always)]
565    pub fn clear_bit(self) -> &'a mut W {
566        self.bit(false)
567    }
568    #[doc = r"Writes raw bits to the field"]
569    #[inline(always)]
570    pub fn bit(self, value: bool) -> &'a mut W {
571        self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
572        self.w
573    }
574}
575#[doc = "enable the output clock.\n\nValue on reset: 0"]
576#[derive(Clone, Copy, Debug, PartialEq)]
577pub enum CLKEN_A {
578    #[doc = "0: disable the output clock."]
579    DISABLE = 0,
580    #[doc = "1: enable the output clock."]
581    ENABLE = 1,
582}
583impl From<CLKEN_A> for bool {
584    #[inline(always)]
585    fn from(variant: CLKEN_A) -> Self {
586        variant as u8 != 0
587    }
588}
589#[doc = "Field `CLKEN` reader - enable the output clock."]
590pub struct CLKEN_R(crate::FieldReader<bool, CLKEN_A>);
591impl CLKEN_R {
592    #[inline(always)]
593    pub(crate) fn new(bits: bool) -> Self {
594        CLKEN_R(crate::FieldReader::new(bits))
595    }
596    #[doc = r"Get enumerated values variant"]
597    #[inline(always)]
598    pub fn variant(&self) -> CLKEN_A {
599        match self.bits {
600            false => CLKEN_A::DISABLE,
601            true => CLKEN_A::ENABLE,
602        }
603    }
604    #[doc = "Checks if the value of the field is `DISABLE`"]
605    #[inline(always)]
606    pub fn is_disable(&self) -> bool {
607        **self == CLKEN_A::DISABLE
608    }
609    #[doc = "Checks if the value of the field is `ENABLE`"]
610    #[inline(always)]
611    pub fn is_enable(&self) -> bool {
612        **self == CLKEN_A::ENABLE
613    }
614}
615impl core::ops::Deref for CLKEN_R {
616    type Target = crate::FieldReader<bool, CLKEN_A>;
617    #[inline(always)]
618    fn deref(&self) -> &Self::Target {
619        &self.0
620    }
621}
622#[doc = "Field `CLKEN` writer - enable the output clock."]
623pub struct CLKEN_W<'a> {
624    w: &'a mut W,
625}
626impl<'a> CLKEN_W<'a> {
627    #[doc = r"Writes `variant` to the field"]
628    #[inline(always)]
629    pub fn variant(self, variant: CLKEN_A) -> &'a mut W {
630        self.bit(variant.into())
631    }
632    #[doc = "disable the output clock."]
633    #[inline(always)]
634    pub fn disable(self) -> &'a mut W {
635        self.variant(CLKEN_A::DISABLE)
636    }
637    #[doc = "enable the output clock."]
638    #[inline(always)]
639    pub fn enable(self) -> &'a mut W {
640        self.variant(CLKEN_A::ENABLE)
641    }
642    #[doc = r"Sets the field bit"]
643    #[inline(always)]
644    pub fn set_bit(self) -> &'a mut W {
645        self.bit(true)
646    }
647    #[doc = r"Clears the field bit"]
648    #[inline(always)]
649    pub fn clear_bit(self) -> &'a mut W {
650        self.bit(false)
651    }
652    #[doc = r"Writes raw bits to the field"]
653    #[inline(always)]
654    pub fn bit(self, value: bool) -> &'a mut W {
655        self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
656        self.w
657    }
658}
659#[doc = "free running mode.\n\nValue on reset: 0"]
660#[derive(Clone, Copy, Debug, PartialEq)]
661pub enum FRMEN_A {
662    #[doc = "0: free running mode is disable."]
663    DISABLE = 0,
664    #[doc = "1: free running mode is enable."]
665    ENABLE = 1,
666}
667impl From<FRMEN_A> for bool {
668    #[inline(always)]
669    fn from(variant: FRMEN_A) -> Self {
670        variant as u8 != 0
671    }
672}
673#[doc = "Field `FRMEN` reader - free running mode."]
674pub struct FRMEN_R(crate::FieldReader<bool, FRMEN_A>);
675impl FRMEN_R {
676    #[inline(always)]
677    pub(crate) fn new(bits: bool) -> Self {
678        FRMEN_R(crate::FieldReader::new(bits))
679    }
680    #[doc = r"Get enumerated values variant"]
681    #[inline(always)]
682    pub fn variant(&self) -> FRMEN_A {
683        match self.bits {
684            false => FRMEN_A::DISABLE,
685            true => FRMEN_A::ENABLE,
686        }
687    }
688    #[doc = "Checks if the value of the field is `DISABLE`"]
689    #[inline(always)]
690    pub fn is_disable(&self) -> bool {
691        **self == FRMEN_A::DISABLE
692    }
693    #[doc = "Checks if the value of the field is `ENABLE`"]
694    #[inline(always)]
695    pub fn is_enable(&self) -> bool {
696        **self == FRMEN_A::ENABLE
697    }
698}
699impl core::ops::Deref for FRMEN_R {
700    type Target = crate::FieldReader<bool, FRMEN_A>;
701    #[inline(always)]
702    fn deref(&self) -> &Self::Target {
703        &self.0
704    }
705}
706#[doc = "Field `FRMEN` writer - free running mode."]
707pub struct FRMEN_W<'a> {
708    w: &'a mut W,
709}
710impl<'a> FRMEN_W<'a> {
711    #[doc = r"Writes `variant` to the field"]
712    #[inline(always)]
713    pub fn variant(self, variant: FRMEN_A) -> &'a mut W {
714        self.bit(variant.into())
715    }
716    #[doc = "free running mode is disable."]
717    #[inline(always)]
718    pub fn disable(self) -> &'a mut W {
719        self.variant(FRMEN_A::DISABLE)
720    }
721    #[doc = "free running mode is enable."]
722    #[inline(always)]
723    pub fn enable(self) -> &'a mut W {
724        self.variant(FRMEN_A::ENABLE)
725    }
726    #[doc = r"Sets the field bit"]
727    #[inline(always)]
728    pub fn set_bit(self) -> &'a mut W {
729        self.bit(true)
730    }
731    #[doc = r"Clears the field bit"]
732    #[inline(always)]
733    pub fn clear_bit(self) -> &'a mut W {
734        self.bit(false)
735    }
736    #[doc = r"Writes raw bits to the field"]
737    #[inline(always)]
738    pub fn bit(self, value: bool) -> &'a mut W {
739        self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
740        self.w
741    }
742}
743#[doc = "Field `FRMCLKSTABLE` reader - free running mode clockstable: Warning: Only make frm_clockstable =1 after the PLL output frequency is stable."]
744pub struct FRMCLKSTABLE_R(crate::FieldReader<bool, bool>);
745impl FRMCLKSTABLE_R {
746    #[inline(always)]
747    pub(crate) fn new(bits: bool) -> Self {
748        FRMCLKSTABLE_R(crate::FieldReader::new(bits))
749    }
750}
751impl core::ops::Deref for FRMCLKSTABLE_R {
752    type Target = crate::FieldReader<bool, bool>;
753    #[inline(always)]
754    fn deref(&self) -> &Self::Target {
755        &self.0
756    }
757}
758#[doc = "Field `FRMCLKSTABLE` writer - free running mode clockstable: Warning: Only make frm_clockstable =1 after the PLL output frequency is stable."]
759pub struct FRMCLKSTABLE_W<'a> {
760    w: &'a mut W,
761}
762impl<'a> FRMCLKSTABLE_W<'a> {
763    #[doc = r"Sets the field bit"]
764    #[inline(always)]
765    pub fn set_bit(self) -> &'a mut W {
766        self.bit(true)
767    }
768    #[doc = r"Clears the field bit"]
769    #[inline(always)]
770    pub fn clear_bit(self) -> &'a mut W {
771        self.bit(false)
772    }
773    #[doc = r"Writes raw bits to the field"]
774    #[inline(always)]
775    pub fn bit(self, value: bool) -> &'a mut W {
776        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
777        self.w
778    }
779}
780#[doc = "skew mode.\n\nValue on reset: 0"]
781#[derive(Clone, Copy, Debug, PartialEq)]
782pub enum SKEWEN_A {
783    #[doc = "0: skew mode is disable."]
784    DISABLE = 0,
785    #[doc = "1: skew mode is enable."]
786    ENABLE = 1,
787}
788impl From<SKEWEN_A> for bool {
789    #[inline(always)]
790    fn from(variant: SKEWEN_A) -> Self {
791        variant as u8 != 0
792    }
793}
794#[doc = "Field `SKEWEN` reader - skew mode."]
795pub struct SKEWEN_R(crate::FieldReader<bool, SKEWEN_A>);
796impl SKEWEN_R {
797    #[inline(always)]
798    pub(crate) fn new(bits: bool) -> Self {
799        SKEWEN_R(crate::FieldReader::new(bits))
800    }
801    #[doc = r"Get enumerated values variant"]
802    #[inline(always)]
803    pub fn variant(&self) -> SKEWEN_A {
804        match self.bits {
805            false => SKEWEN_A::DISABLE,
806            true => SKEWEN_A::ENABLE,
807        }
808    }
809    #[doc = "Checks if the value of the field is `DISABLE`"]
810    #[inline(always)]
811    pub fn is_disable(&self) -> bool {
812        **self == SKEWEN_A::DISABLE
813    }
814    #[doc = "Checks if the value of the field is `ENABLE`"]
815    #[inline(always)]
816    pub fn is_enable(&self) -> bool {
817        **self == SKEWEN_A::ENABLE
818    }
819}
820impl core::ops::Deref for SKEWEN_R {
821    type Target = crate::FieldReader<bool, SKEWEN_A>;
822    #[inline(always)]
823    fn deref(&self) -> &Self::Target {
824        &self.0
825    }
826}
827#[doc = "Field `SKEWEN` writer - skew mode."]
828pub struct SKEWEN_W<'a> {
829    w: &'a mut W,
830}
831impl<'a> SKEWEN_W<'a> {
832    #[doc = r"Writes `variant` to the field"]
833    #[inline(always)]
834    pub fn variant(self, variant: SKEWEN_A) -> &'a mut W {
835        self.bit(variant.into())
836    }
837    #[doc = "skew mode is disable."]
838    #[inline(always)]
839    pub fn disable(self) -> &'a mut W {
840        self.variant(SKEWEN_A::DISABLE)
841    }
842    #[doc = "skew mode is enable."]
843    #[inline(always)]
844    pub fn enable(self) -> &'a mut W {
845        self.variant(SKEWEN_A::ENABLE)
846    }
847    #[doc = r"Sets the field bit"]
848    #[inline(always)]
849    pub fn set_bit(self) -> &'a mut W {
850        self.bit(true)
851    }
852    #[doc = r"Clears the field bit"]
853    #[inline(always)]
854    pub fn clear_bit(self) -> &'a mut W {
855        self.bit(false)
856    }
857    #[doc = r"Writes raw bits to the field"]
858    #[inline(always)]
859    pub fn bit(self, value: bool) -> &'a mut W {
860        self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24);
861        self.w
862    }
863}
864impl R {
865    #[doc = "Bits 0:3 - Bandwidth select R value."]
866    #[inline(always)]
867    pub fn selr(&self) -> SELR_R {
868        SELR_R::new((self.bits & 0x0f) as u8)
869    }
870    #[doc = "Bits 4:9 - Bandwidth select I value."]
871    #[inline(always)]
872    pub fn seli(&self) -> SELI_R {
873        SELI_R::new(((self.bits >> 4) & 0x3f) as u8)
874    }
875    #[doc = "Bits 10:14 - Bandwidth select P value."]
876    #[inline(always)]
877    pub fn selp(&self) -> SELP_R {
878        SELP_R::new(((self.bits >> 10) & 0x1f) as u8)
879    }
880    #[doc = "Bit 15 - Bypass PLL input clock is sent directly to the PLL output (default)."]
881    #[inline(always)]
882    pub fn bypasspll(&self) -> BYPASSPLL_R {
883        BYPASSPLL_R::new(((self.bits >> 15) & 0x01) != 0)
884    }
885    #[doc = "Bit 16 - bypass of the divide-by-2 divider in the post-divider."]
886    #[inline(always)]
887    pub fn bypasspostdiv2(&self) -> BYPASSPOSTDIV2_R {
888        BYPASSPOSTDIV2_R::new(((self.bits >> 16) & 0x01) != 0)
889    }
890    #[doc = "Bit 17 - limup_off = 1 in spread spectrum and fractional PLL applications."]
891    #[inline(always)]
892    pub fn limupoff(&self) -> LIMUPOFF_R {
893        LIMUPOFF_R::new(((self.bits >> 17) & 0x01) != 0)
894    }
895    #[doc = "Bit 18 - Control of the bandwidth of the PLL."]
896    #[inline(always)]
897    pub fn bwdirect(&self) -> BWDIRECT_R {
898        BWDIRECT_R::new(((self.bits >> 18) & 0x01) != 0)
899    }
900    #[doc = "Bit 19 - bypass of the pre-divider."]
901    #[inline(always)]
902    pub fn bypassprediv(&self) -> BYPASSPREDIV_R {
903        BYPASSPREDIV_R::new(((self.bits >> 19) & 0x01) != 0)
904    }
905    #[doc = "Bit 20 - bypass of the post-divider."]
906    #[inline(always)]
907    pub fn bypasspostdiv(&self) -> BYPASSPOSTDIV_R {
908        BYPASSPOSTDIV_R::new(((self.bits >> 20) & 0x01) != 0)
909    }
910    #[doc = "Bit 21 - enable the output clock."]
911    #[inline(always)]
912    pub fn clken(&self) -> CLKEN_R {
913        CLKEN_R::new(((self.bits >> 21) & 0x01) != 0)
914    }
915    #[doc = "Bit 22 - free running mode."]
916    #[inline(always)]
917    pub fn frmen(&self) -> FRMEN_R {
918        FRMEN_R::new(((self.bits >> 22) & 0x01) != 0)
919    }
920    #[doc = "Bit 23 - free running mode clockstable: Warning: Only make frm_clockstable =1 after the PLL output frequency is stable."]
921    #[inline(always)]
922    pub fn frmclkstable(&self) -> FRMCLKSTABLE_R {
923        FRMCLKSTABLE_R::new(((self.bits >> 23) & 0x01) != 0)
924    }
925    #[doc = "Bit 24 - skew mode."]
926    #[inline(always)]
927    pub fn skewen(&self) -> SKEWEN_R {
928        SKEWEN_R::new(((self.bits >> 24) & 0x01) != 0)
929    }
930}
931impl W {
932    #[doc = "Bits 0:3 - Bandwidth select R value."]
933    #[inline(always)]
934    pub fn selr(&mut self) -> SELR_W {
935        SELR_W { w: self }
936    }
937    #[doc = "Bits 4:9 - Bandwidth select I value."]
938    #[inline(always)]
939    pub fn seli(&mut self) -> SELI_W {
940        SELI_W { w: self }
941    }
942    #[doc = "Bits 10:14 - Bandwidth select P value."]
943    #[inline(always)]
944    pub fn selp(&mut self) -> SELP_W {
945        SELP_W { w: self }
946    }
947    #[doc = "Bit 15 - Bypass PLL input clock is sent directly to the PLL output (default)."]
948    #[inline(always)]
949    pub fn bypasspll(&mut self) -> BYPASSPLL_W {
950        BYPASSPLL_W { w: self }
951    }
952    #[doc = "Bit 16 - bypass of the divide-by-2 divider in the post-divider."]
953    #[inline(always)]
954    pub fn bypasspostdiv2(&mut self) -> BYPASSPOSTDIV2_W {
955        BYPASSPOSTDIV2_W { w: self }
956    }
957    #[doc = "Bit 17 - limup_off = 1 in spread spectrum and fractional PLL applications."]
958    #[inline(always)]
959    pub fn limupoff(&mut self) -> LIMUPOFF_W {
960        LIMUPOFF_W { w: self }
961    }
962    #[doc = "Bit 18 - Control of the bandwidth of the PLL."]
963    #[inline(always)]
964    pub fn bwdirect(&mut self) -> BWDIRECT_W {
965        BWDIRECT_W { w: self }
966    }
967    #[doc = "Bit 19 - bypass of the pre-divider."]
968    #[inline(always)]
969    pub fn bypassprediv(&mut self) -> BYPASSPREDIV_W {
970        BYPASSPREDIV_W { w: self }
971    }
972    #[doc = "Bit 20 - bypass of the post-divider."]
973    #[inline(always)]
974    pub fn bypasspostdiv(&mut self) -> BYPASSPOSTDIV_W {
975        BYPASSPOSTDIV_W { w: self }
976    }
977    #[doc = "Bit 21 - enable the output clock."]
978    #[inline(always)]
979    pub fn clken(&mut self) -> CLKEN_W {
980        CLKEN_W { w: self }
981    }
982    #[doc = "Bit 22 - free running mode."]
983    #[inline(always)]
984    pub fn frmen(&mut self) -> FRMEN_W {
985        FRMEN_W { w: self }
986    }
987    #[doc = "Bit 23 - free running mode clockstable: Warning: Only make frm_clockstable =1 after the PLL output frequency is stable."]
988    #[inline(always)]
989    pub fn frmclkstable(&mut self) -> FRMCLKSTABLE_W {
990        FRMCLKSTABLE_W { w: self }
991    }
992    #[doc = "Bit 24 - skew mode."]
993    #[inline(always)]
994    pub fn skewen(&mut self) -> SKEWEN_W {
995        SKEWEN_W { w: self }
996    }
997    #[doc = "Writes raw bits to the register."]
998    #[inline(always)]
999    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1000        self.0.bits(bits);
1001        self
1002    }
1003}
1004#[doc = "PLL0 550m control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pll0ctrl](index.html) module"]
1005pub struct PLL0CTRL_SPEC;
1006impl crate::RegisterSpec for PLL0CTRL_SPEC {
1007    type Ux = u32;
1008}
1009#[doc = "`read()` method returns [pll0ctrl::R](R) reader structure"]
1010impl crate::Readable for PLL0CTRL_SPEC {
1011    type Reader = R;
1012}
1013#[doc = "`write(|w| ..)` method takes [pll0ctrl::W](W) writer structure"]
1014impl crate::Writable for PLL0CTRL_SPEC {
1015    type Writer = W;
1016}
1017#[doc = "`reset()` method sets PLL0CTRL to value 0"]
1018impl crate::Resettable for PLL0CTRL_SPEC {
1019    #[inline(always)]
1020    fn reset_value() -> Self::Ux {
1021        0
1022    }
1023}
lpc55_pac/syscon/pll0ctrl.rs

lpc55_pac/syscon/
pll0ctrl.rs
