1#[doc = "Register `LOCK` reader"]
2pub struct R(crate::R<LOCK_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<LOCK_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<LOCK_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<LOCK_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `LOCK` writer"]
17pub struct W(crate::W<LOCK_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<LOCK_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<LOCK_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<LOCK_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Lock Region 0 registers.\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum LOCKREG0_A {
40 #[doc = "0: Disabled. IV_LSB0, IV_MSB0, BASE_ADDR0, and SR_ENABLE0 are writable.."]
41 DISABLED = 0,
42 #[doc = "1: Enabled. IV_LSB0, IV_MSB0, BASE_ADDR0, and SR_ENABLE0 are not writable.."]
43 ENABLED = 1,
44}
45impl From<LOCKREG0_A> for bool {
46 #[inline(always)]
47 fn from(variant: LOCKREG0_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `LOCKREG0` reader - Lock Region 0 registers."]
52pub struct LOCKREG0_R(crate::FieldReader<bool, LOCKREG0_A>);
53impl LOCKREG0_R {
54 #[inline(always)]
55 pub(crate) fn new(bits: bool) -> Self {
56 LOCKREG0_R(crate::FieldReader::new(bits))
57 }
58 #[doc = r"Get enumerated values variant"]
59 #[inline(always)]
60 pub fn variant(&self) -> LOCKREG0_A {
61 match self.bits {
62 false => LOCKREG0_A::DISABLED,
63 true => LOCKREG0_A::ENABLED,
64 }
65 }
66 #[doc = "Checks if the value of the field is `DISABLED`"]
67 #[inline(always)]
68 pub fn is_disabled(&self) -> bool {
69 **self == LOCKREG0_A::DISABLED
70 }
71 #[doc = "Checks if the value of the field is `ENABLED`"]
72 #[inline(always)]
73 pub fn is_enabled(&self) -> bool {
74 **self == LOCKREG0_A::ENABLED
75 }
76}
77impl core::ops::Deref for LOCKREG0_R {
78 type Target = crate::FieldReader<bool, LOCKREG0_A>;
79 #[inline(always)]
80 fn deref(&self) -> &Self::Target {
81 &self.0
82 }
83}
84#[doc = "Field `LOCKREG0` writer - Lock Region 0 registers."]
85pub struct LOCKREG0_W<'a> {
86 w: &'a mut W,
87}
88impl<'a> LOCKREG0_W<'a> {
89 #[doc = r"Writes `variant` to the field"]
90 #[inline(always)]
91 pub fn variant(self, variant: LOCKREG0_A) -> &'a mut W {
92 self.bit(variant.into())
93 }
94 #[doc = "Disabled. IV_LSB0, IV_MSB0, BASE_ADDR0, and SR_ENABLE0 are writable.."]
95 #[inline(always)]
96 pub fn disabled(self) -> &'a mut W {
97 self.variant(LOCKREG0_A::DISABLED)
98 }
99 #[doc = "Enabled. IV_LSB0, IV_MSB0, BASE_ADDR0, and SR_ENABLE0 are not writable.."]
100 #[inline(always)]
101 pub fn enabled(self) -> &'a mut W {
102 self.variant(LOCKREG0_A::ENABLED)
103 }
104 #[doc = r"Sets the field bit"]
105 #[inline(always)]
106 pub fn set_bit(self) -> &'a mut W {
107 self.bit(true)
108 }
109 #[doc = r"Clears the field bit"]
110 #[inline(always)]
111 pub fn clear_bit(self) -> &'a mut W {
112 self.bit(false)
113 }
114 #[doc = r"Writes raw bits to the field"]
115 #[inline(always)]
116 pub fn bit(self, value: bool) -> &'a mut W {
117 self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
118 self.w
119 }
120}
121#[doc = "Lock Region 1 registers.\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum LOCKREG1_A {
124 #[doc = "0: Disabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are writable.."]
125 DISABLED = 0,
126 #[doc = "1: Enabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are not writable.."]
127 ENABLED = 1,
128}
129impl From<LOCKREG1_A> for bool {
130 #[inline(always)]
131 fn from(variant: LOCKREG1_A) -> Self {
132 variant as u8 != 0
133 }
134}
135#[doc = "Field `LOCKREG1` reader - Lock Region 1 registers."]
136pub struct LOCKREG1_R(crate::FieldReader<bool, LOCKREG1_A>);
137impl LOCKREG1_R {
138 #[inline(always)]
139 pub(crate) fn new(bits: bool) -> Self {
140 LOCKREG1_R(crate::FieldReader::new(bits))
141 }
142 #[doc = r"Get enumerated values variant"]
143 #[inline(always)]
144 pub fn variant(&self) -> LOCKREG1_A {
145 match self.bits {
146 false => LOCKREG1_A::DISABLED,
147 true => LOCKREG1_A::ENABLED,
148 }
149 }
150 #[doc = "Checks if the value of the field is `DISABLED`"]
151 #[inline(always)]
152 pub fn is_disabled(&self) -> bool {
153 **self == LOCKREG1_A::DISABLED
154 }
155 #[doc = "Checks if the value of the field is `ENABLED`"]
156 #[inline(always)]
157 pub fn is_enabled(&self) -> bool {
158 **self == LOCKREG1_A::ENABLED
159 }
160}
161impl core::ops::Deref for LOCKREG1_R {
162 type Target = crate::FieldReader<bool, LOCKREG1_A>;
163 #[inline(always)]
164 fn deref(&self) -> &Self::Target {
165 &self.0
166 }
167}
168#[doc = "Field `LOCKREG1` writer - Lock Region 1 registers."]
169pub struct LOCKREG1_W<'a> {
170 w: &'a mut W,
171}
172impl<'a> LOCKREG1_W<'a> {
173 #[doc = r"Writes `variant` to the field"]
174 #[inline(always)]
175 pub fn variant(self, variant: LOCKREG1_A) -> &'a mut W {
176 self.bit(variant.into())
177 }
178 #[doc = "Disabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are writable.."]
179 #[inline(always)]
180 pub fn disabled(self) -> &'a mut W {
181 self.variant(LOCKREG1_A::DISABLED)
182 }
183 #[doc = "Enabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are not writable.."]
184 #[inline(always)]
185 pub fn enabled(self) -> &'a mut W {
186 self.variant(LOCKREG1_A::ENABLED)
187 }
188 #[doc = r"Sets the field bit"]
189 #[inline(always)]
190 pub fn set_bit(self) -> &'a mut W {
191 self.bit(true)
192 }
193 #[doc = r"Clears the field bit"]
194 #[inline(always)]
195 pub fn clear_bit(self) -> &'a mut W {
196 self.bit(false)
197 }
198 #[doc = r"Writes raw bits to the field"]
199 #[inline(always)]
200 pub fn bit(self, value: bool) -> &'a mut W {
201 self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
202 self.w
203 }
204}
205#[doc = "Lock Region 2 registers.\n\nValue on reset: 0"]
206#[derive(Clone, Copy, Debug, PartialEq)]
207pub enum LOCKREG2_A {
208 #[doc = "0: Disabled. IV_LSB2, IV_MSB2, BASE_ADDR2, and SR_ENABLE2 are writable.."]
209 DISABLED = 0,
210 #[doc = "1: Enabled. IV_LSB2, IV_MSB2, BASE_ADDR2, and SR_ENABLE2 are not writable.."]
211 ENABLED = 1,
212}
213impl From<LOCKREG2_A> for bool {
214 #[inline(always)]
215 fn from(variant: LOCKREG2_A) -> Self {
216 variant as u8 != 0
217 }
218}
219#[doc = "Field `LOCKREG2` reader - Lock Region 2 registers."]
220pub struct LOCKREG2_R(crate::FieldReader<bool, LOCKREG2_A>);
221impl LOCKREG2_R {
222 #[inline(always)]
223 pub(crate) fn new(bits: bool) -> Self {
224 LOCKREG2_R(crate::FieldReader::new(bits))
225 }
226 #[doc = r"Get enumerated values variant"]
227 #[inline(always)]
228 pub fn variant(&self) -> LOCKREG2_A {
229 match self.bits {
230 false => LOCKREG2_A::DISABLED,
231 true => LOCKREG2_A::ENABLED,
232 }
233 }
234 #[doc = "Checks if the value of the field is `DISABLED`"]
235 #[inline(always)]
236 pub fn is_disabled(&self) -> bool {
237 **self == LOCKREG2_A::DISABLED
238 }
239 #[doc = "Checks if the value of the field is `ENABLED`"]
240 #[inline(always)]
241 pub fn is_enabled(&self) -> bool {
242 **self == LOCKREG2_A::ENABLED
243 }
244}
245impl core::ops::Deref for LOCKREG2_R {
246 type Target = crate::FieldReader<bool, LOCKREG2_A>;
247 #[inline(always)]
248 fn deref(&self) -> &Self::Target {
249 &self.0
250 }
251}
252#[doc = "Field `LOCKREG2` writer - Lock Region 2 registers."]
253pub struct LOCKREG2_W<'a> {
254 w: &'a mut W,
255}
256impl<'a> LOCKREG2_W<'a> {
257 #[doc = r"Writes `variant` to the field"]
258 #[inline(always)]
259 pub fn variant(self, variant: LOCKREG2_A) -> &'a mut W {
260 self.bit(variant.into())
261 }
262 #[doc = "Disabled. IV_LSB2, IV_MSB2, BASE_ADDR2, and SR_ENABLE2 are writable.."]
263 #[inline(always)]
264 pub fn disabled(self) -> &'a mut W {
265 self.variant(LOCKREG2_A::DISABLED)
266 }
267 #[doc = "Enabled. IV_LSB2, IV_MSB2, BASE_ADDR2, and SR_ENABLE2 are not writable.."]
268 #[inline(always)]
269 pub fn enabled(self) -> &'a mut W {
270 self.variant(LOCKREG2_A::ENABLED)
271 }
272 #[doc = r"Sets the field bit"]
273 #[inline(always)]
274 pub fn set_bit(self) -> &'a mut W {
275 self.bit(true)
276 }
277 #[doc = r"Clears the field bit"]
278 #[inline(always)]
279 pub fn clear_bit(self) -> &'a mut W {
280 self.bit(false)
281 }
282 #[doc = r"Writes raw bits to the field"]
283 #[inline(always)]
284 pub fn bit(self, value: bool) -> &'a mut W {
285 self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
286 self.w
287 }
288}
289#[doc = "Lock the Mask registers.\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq)]
291pub enum LOCKMASK_A {
292 #[doc = "0: Disabled. MASK_LSB, and MASK_MSB are writable.."]
293 DISABLED = 0,
294 #[doc = "1: Enabled. MASK_LSB, and MASK_MSB are not writable.."]
295 ENABLED = 1,
296}
297impl From<LOCKMASK_A> for bool {
298 #[inline(always)]
299 fn from(variant: LOCKMASK_A) -> Self {
300 variant as u8 != 0
301 }
302}
303#[doc = "Field `LOCKMASK` reader - Lock the Mask registers."]
304pub struct LOCKMASK_R(crate::FieldReader<bool, LOCKMASK_A>);
305impl LOCKMASK_R {
306 #[inline(always)]
307 pub(crate) fn new(bits: bool) -> Self {
308 LOCKMASK_R(crate::FieldReader::new(bits))
309 }
310 #[doc = r"Get enumerated values variant"]
311 #[inline(always)]
312 pub fn variant(&self) -> LOCKMASK_A {
313 match self.bits {
314 false => LOCKMASK_A::DISABLED,
315 true => LOCKMASK_A::ENABLED,
316 }
317 }
318 #[doc = "Checks if the value of the field is `DISABLED`"]
319 #[inline(always)]
320 pub fn is_disabled(&self) -> bool {
321 **self == LOCKMASK_A::DISABLED
322 }
323 #[doc = "Checks if the value of the field is `ENABLED`"]
324 #[inline(always)]
325 pub fn is_enabled(&self) -> bool {
326 **self == LOCKMASK_A::ENABLED
327 }
328}
329impl core::ops::Deref for LOCKMASK_R {
330 type Target = crate::FieldReader<bool, LOCKMASK_A>;
331 #[inline(always)]
332 fn deref(&self) -> &Self::Target {
333 &self.0
334 }
335}
336#[doc = "Field `LOCKMASK` writer - Lock the Mask registers."]
337pub struct LOCKMASK_W<'a> {
338 w: &'a mut W,
339}
340impl<'a> LOCKMASK_W<'a> {
341 #[doc = r"Writes `variant` to the field"]
342 #[inline(always)]
343 pub fn variant(self, variant: LOCKMASK_A) -> &'a mut W {
344 self.bit(variant.into())
345 }
346 #[doc = "Disabled. MASK_LSB, and MASK_MSB are writable.."]
347 #[inline(always)]
348 pub fn disabled(self) -> &'a mut W {
349 self.variant(LOCKMASK_A::DISABLED)
350 }
351 #[doc = "Enabled. MASK_LSB, and MASK_MSB are not writable.."]
352 #[inline(always)]
353 pub fn enabled(self) -> &'a mut W {
354 self.variant(LOCKMASK_A::ENABLED)
355 }
356 #[doc = r"Sets the field bit"]
357 #[inline(always)]
358 pub fn set_bit(self) -> &'a mut W {
359 self.bit(true)
360 }
361 #[doc = r"Clears the field bit"]
362 #[inline(always)]
363 pub fn clear_bit(self) -> &'a mut W {
364 self.bit(false)
365 }
366 #[doc = r"Writes raw bits to the field"]
367 #[inline(always)]
368 pub fn bit(self, value: bool) -> &'a mut W {
369 self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
370 self.w
371 }
372}
373impl R {
374 #[doc = "Bit 0 - Lock Region 0 registers."]
375 #[inline(always)]
376 pub fn lockreg0(&self) -> LOCKREG0_R {
377 LOCKREG0_R::new((self.bits & 0x01) != 0)
378 }
379 #[doc = "Bit 1 - Lock Region 1 registers."]
380 #[inline(always)]
381 pub fn lockreg1(&self) -> LOCKREG1_R {
382 LOCKREG1_R::new(((self.bits >> 1) & 0x01) != 0)
383 }
384 #[doc = "Bit 2 - Lock Region 2 registers."]
385 #[inline(always)]
386 pub fn lockreg2(&self) -> LOCKREG2_R {
387 LOCKREG2_R::new(((self.bits >> 2) & 0x01) != 0)
388 }
389 #[doc = "Bit 8 - Lock the Mask registers."]
390 #[inline(always)]
391 pub fn lockmask(&self) -> LOCKMASK_R {
392 LOCKMASK_R::new(((self.bits >> 8) & 0x01) != 0)
393 }
394}
395impl W {
396 #[doc = "Bit 0 - Lock Region 0 registers."]
397 #[inline(always)]
398 pub fn lockreg0(&mut self) -> LOCKREG0_W {
399 LOCKREG0_W { w: self }
400 }
401 #[doc = "Bit 1 - Lock Region 1 registers."]
402 #[inline(always)]
403 pub fn lockreg1(&mut self) -> LOCKREG1_W {
404 LOCKREG1_W { w: self }
405 }
406 #[doc = "Bit 2 - Lock Region 2 registers."]
407 #[inline(always)]
408 pub fn lockreg2(&mut self) -> LOCKREG2_W {
409 LOCKREG2_W { w: self }
410 }
411 #[doc = "Bit 8 - Lock the Mask registers."]
412 #[inline(always)]
413 pub fn lockmask(&mut self) -> LOCKMASK_W {
414 LOCKMASK_W { w: self }
415 }
416 #[doc = "Writes raw bits to the register."]
417 #[inline(always)]
418 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
419 self.0.bits(bits);
420 self
421 }
422}
423#[doc = "Lock register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"]
424pub struct LOCK_SPEC;
425impl crate::RegisterSpec for LOCK_SPEC {
426 type Ux = u32;
427}
428#[doc = "`read()` method returns [lock::R](R) reader structure"]
429impl crate::Readable for LOCK_SPEC {
430 type Reader = R;
431}
432#[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"]
433impl crate::Writable for LOCK_SPEC {
434 type Writer = W;
435}
436#[doc = "`reset()` method sets LOCK to value 0"]
437impl crate::Resettable for LOCK_SPEC {
438 #[inline(always)]
439 fn reset_value() -> Self::Ux {
440 0
441 }
442}