1#[doc = "Register `CMDL9` reader"]
2pub struct R(crate::R<CMDL9_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CMDL9_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CMDL9_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CMDL9_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CMDL9` writer"]
17pub struct W(crate::W<CMDL9_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CMDL9_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CMDL9_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CMDL9_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Input channel select\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum ADCH_A {
41 #[doc = "0: Select CH0A or CH0B or CH0A/CH0B pair."]
42 ADCH_0 = 0,
43 #[doc = "1: Select CH1A or CH1B or CH1A/CH1B pair."]
44 ADCH_1 = 1,
45 #[doc = "2: Select CH2A or CH2B or CH2A/CH2B pair."]
46 ADCH_2 = 2,
47 #[doc = "3: Select CH3A or CH3B or CH3A/CH3B pair."]
48 ADCH_3 = 3,
49 #[doc = "4: Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
50 ADCH_4 = 4,
51 #[doc = "5: Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
52 ADCH_5 = 5,
53 #[doc = "6: Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
54 ADCH_6 = 6,
55 #[doc = "7: Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
56 ADCH_7 = 7,
57 #[doc = "8: Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
58 ADCH_8 = 8,
59 #[doc = "9: Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
60 ADCH_9 = 9,
61 #[doc = "30: Select CH30A or CH30B or CH30A/CH30B pair."]
62 ADCH_30 = 30,
63 #[doc = "31: Select CH31A or CH31B or CH31A/CH31B pair."]
64 ADCH_31 = 31,
65}
66impl From<ADCH_A> for u8 {
67 #[inline(always)]
68 fn from(variant: ADCH_A) -> Self {
69 variant as _
70 }
71}
72#[doc = "Field `ADCH` reader - Input channel select"]
73pub struct ADCH_R(crate::FieldReader<u8, ADCH_A>);
74impl ADCH_R {
75 #[inline(always)]
76 pub(crate) fn new(bits: u8) -> Self {
77 ADCH_R(crate::FieldReader::new(bits))
78 }
79 #[doc = r"Get enumerated values variant"]
80 #[inline(always)]
81 pub fn variant(&self) -> Option<ADCH_A> {
82 match self.bits {
83 0 => Some(ADCH_A::ADCH_0),
84 1 => Some(ADCH_A::ADCH_1),
85 2 => Some(ADCH_A::ADCH_2),
86 3 => Some(ADCH_A::ADCH_3),
87 4 => Some(ADCH_A::ADCH_4),
88 5 => Some(ADCH_A::ADCH_5),
89 6 => Some(ADCH_A::ADCH_6),
90 7 => Some(ADCH_A::ADCH_7),
91 8 => Some(ADCH_A::ADCH_8),
92 9 => Some(ADCH_A::ADCH_9),
93 30 => Some(ADCH_A::ADCH_30),
94 31 => Some(ADCH_A::ADCH_31),
95 _ => None,
96 }
97 }
98 #[doc = "Checks if the value of the field is `ADCH_0`"]
99 #[inline(always)]
100 pub fn is_adch_0(&self) -> bool {
101 **self == ADCH_A::ADCH_0
102 }
103 #[doc = "Checks if the value of the field is `ADCH_1`"]
104 #[inline(always)]
105 pub fn is_adch_1(&self) -> bool {
106 **self == ADCH_A::ADCH_1
107 }
108 #[doc = "Checks if the value of the field is `ADCH_2`"]
109 #[inline(always)]
110 pub fn is_adch_2(&self) -> bool {
111 **self == ADCH_A::ADCH_2
112 }
113 #[doc = "Checks if the value of the field is `ADCH_3`"]
114 #[inline(always)]
115 pub fn is_adch_3(&self) -> bool {
116 **self == ADCH_A::ADCH_3
117 }
118 #[doc = "Checks if the value of the field is `ADCH_4`"]
119 #[inline(always)]
120 pub fn is_adch_4(&self) -> bool {
121 **self == ADCH_A::ADCH_4
122 }
123 #[doc = "Checks if the value of the field is `ADCH_5`"]
124 #[inline(always)]
125 pub fn is_adch_5(&self) -> bool {
126 **self == ADCH_A::ADCH_5
127 }
128 #[doc = "Checks if the value of the field is `ADCH_6`"]
129 #[inline(always)]
130 pub fn is_adch_6(&self) -> bool {
131 **self == ADCH_A::ADCH_6
132 }
133 #[doc = "Checks if the value of the field is `ADCH_7`"]
134 #[inline(always)]
135 pub fn is_adch_7(&self) -> bool {
136 **self == ADCH_A::ADCH_7
137 }
138 #[doc = "Checks if the value of the field is `ADCH_8`"]
139 #[inline(always)]
140 pub fn is_adch_8(&self) -> bool {
141 **self == ADCH_A::ADCH_8
142 }
143 #[doc = "Checks if the value of the field is `ADCH_9`"]
144 #[inline(always)]
145 pub fn is_adch_9(&self) -> bool {
146 **self == ADCH_A::ADCH_9
147 }
148 #[doc = "Checks if the value of the field is `ADCH_30`"]
149 #[inline(always)]
150 pub fn is_adch_30(&self) -> bool {
151 **self == ADCH_A::ADCH_30
152 }
153 #[doc = "Checks if the value of the field is `ADCH_31`"]
154 #[inline(always)]
155 pub fn is_adch_31(&self) -> bool {
156 **self == ADCH_A::ADCH_31
157 }
158}
159impl core::ops::Deref for ADCH_R {
160 type Target = crate::FieldReader<u8, ADCH_A>;
161 #[inline(always)]
162 fn deref(&self) -> &Self::Target {
163 &self.0
164 }
165}
166#[doc = "Field `ADCH` writer - Input channel select"]
167pub struct ADCH_W<'a> {
168 w: &'a mut W,
169}
170impl<'a> ADCH_W<'a> {
171 #[doc = r"Writes `variant` to the field"]
172 #[inline(always)]
173 pub fn variant(self, variant: ADCH_A) -> &'a mut W {
174 unsafe { self.bits(variant.into()) }
175 }
176 #[doc = "Select CH0A or CH0B or CH0A/CH0B pair."]
177 #[inline(always)]
178 pub fn adch_0(self) -> &'a mut W {
179 self.variant(ADCH_A::ADCH_0)
180 }
181 #[doc = "Select CH1A or CH1B or CH1A/CH1B pair."]
182 #[inline(always)]
183 pub fn adch_1(self) -> &'a mut W {
184 self.variant(ADCH_A::ADCH_1)
185 }
186 #[doc = "Select CH2A or CH2B or CH2A/CH2B pair."]
187 #[inline(always)]
188 pub fn adch_2(self) -> &'a mut W {
189 self.variant(ADCH_A::ADCH_2)
190 }
191 #[doc = "Select CH3A or CH3B or CH3A/CH3B pair."]
192 #[inline(always)]
193 pub fn adch_3(self) -> &'a mut W {
194 self.variant(ADCH_A::ADCH_3)
195 }
196 #[doc = "Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
197 #[inline(always)]
198 pub fn adch_4(self) -> &'a mut W {
199 self.variant(ADCH_A::ADCH_4)
200 }
201 #[doc = "Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
202 #[inline(always)]
203 pub fn adch_5(self) -> &'a mut W {
204 self.variant(ADCH_A::ADCH_5)
205 }
206 #[doc = "Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
207 #[inline(always)]
208 pub fn adch_6(self) -> &'a mut W {
209 self.variant(ADCH_A::ADCH_6)
210 }
211 #[doc = "Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
212 #[inline(always)]
213 pub fn adch_7(self) -> &'a mut W {
214 self.variant(ADCH_A::ADCH_7)
215 }
216 #[doc = "Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
217 #[inline(always)]
218 pub fn adch_8(self) -> &'a mut W {
219 self.variant(ADCH_A::ADCH_8)
220 }
221 #[doc = "Select corresponding channel CHnA or CHnB or CHnA/CHnB pair."]
222 #[inline(always)]
223 pub fn adch_9(self) -> &'a mut W {
224 self.variant(ADCH_A::ADCH_9)
225 }
226 #[doc = "Select CH30A or CH30B or CH30A/CH30B pair."]
227 #[inline(always)]
228 pub fn adch_30(self) -> &'a mut W {
229 self.variant(ADCH_A::ADCH_30)
230 }
231 #[doc = "Select CH31A or CH31B or CH31A/CH31B pair."]
232 #[inline(always)]
233 pub fn adch_31(self) -> &'a mut W {
234 self.variant(ADCH_A::ADCH_31)
235 }
236 #[doc = r"Writes raw bits to the field"]
237 #[inline(always)]
238 pub unsafe fn bits(self, value: u8) -> &'a mut W {
239 self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f);
240 self.w
241 }
242}
243#[doc = "Conversion Type\n\nValue on reset: 0"]
244#[derive(Clone, Copy, Debug, PartialEq)]
245#[repr(u8)]
246pub enum CTYPE_A {
247 #[doc = "0: Single-Ended Mode. Only A side channel is converted."]
248 CTYPE_0 = 0,
249 #[doc = "1: Single-Ended Mode. Only B side channel is converted."]
250 CTYPE_1 = 1,
251 #[doc = "2: Differential Mode. A-B."]
252 CTYPE_2 = 2,
253 #[doc = "3: Dual-Single-Ended Mode. Both A side and B side channels are converted independently."]
254 CTYPE_3 = 3,
255}
256impl From<CTYPE_A> for u8 {
257 #[inline(always)]
258 fn from(variant: CTYPE_A) -> Self {
259 variant as _
260 }
261}
262#[doc = "Field `CTYPE` reader - Conversion Type"]
263pub struct CTYPE_R(crate::FieldReader<u8, CTYPE_A>);
264impl CTYPE_R {
265 #[inline(always)]
266 pub(crate) fn new(bits: u8) -> Self {
267 CTYPE_R(crate::FieldReader::new(bits))
268 }
269 #[doc = r"Get enumerated values variant"]
270 #[inline(always)]
271 pub fn variant(&self) -> CTYPE_A {
272 match self.bits {
273 0 => CTYPE_A::CTYPE_0,
274 1 => CTYPE_A::CTYPE_1,
275 2 => CTYPE_A::CTYPE_2,
276 3 => CTYPE_A::CTYPE_3,
277 _ => unreachable!(),
278 }
279 }
280 #[doc = "Checks if the value of the field is `CTYPE_0`"]
281 #[inline(always)]
282 pub fn is_ctype_0(&self) -> bool {
283 **self == CTYPE_A::CTYPE_0
284 }
285 #[doc = "Checks if the value of the field is `CTYPE_1`"]
286 #[inline(always)]
287 pub fn is_ctype_1(&self) -> bool {
288 **self == CTYPE_A::CTYPE_1
289 }
290 #[doc = "Checks if the value of the field is `CTYPE_2`"]
291 #[inline(always)]
292 pub fn is_ctype_2(&self) -> bool {
293 **self == CTYPE_A::CTYPE_2
294 }
295 #[doc = "Checks if the value of the field is `CTYPE_3`"]
296 #[inline(always)]
297 pub fn is_ctype_3(&self) -> bool {
298 **self == CTYPE_A::CTYPE_3
299 }
300}
301impl core::ops::Deref for CTYPE_R {
302 type Target = crate::FieldReader<u8, CTYPE_A>;
303 #[inline(always)]
304 fn deref(&self) -> &Self::Target {
305 &self.0
306 }
307}
308#[doc = "Field `CTYPE` writer - Conversion Type"]
309pub struct CTYPE_W<'a> {
310 w: &'a mut W,
311}
312impl<'a> CTYPE_W<'a> {
313 #[doc = r"Writes `variant` to the field"]
314 #[inline(always)]
315 pub fn variant(self, variant: CTYPE_A) -> &'a mut W {
316 self.bits(variant.into())
317 }
318 #[doc = "Single-Ended Mode. Only A side channel is converted."]
319 #[inline(always)]
320 pub fn ctype_0(self) -> &'a mut W {
321 self.variant(CTYPE_A::CTYPE_0)
322 }
323 #[doc = "Single-Ended Mode. Only B side channel is converted."]
324 #[inline(always)]
325 pub fn ctype_1(self) -> &'a mut W {
326 self.variant(CTYPE_A::CTYPE_1)
327 }
328 #[doc = "Differential Mode. A-B."]
329 #[inline(always)]
330 pub fn ctype_2(self) -> &'a mut W {
331 self.variant(CTYPE_A::CTYPE_2)
332 }
333 #[doc = "Dual-Single-Ended Mode. Both A side and B side channels are converted independently."]
334 #[inline(always)]
335 pub fn ctype_3(self) -> &'a mut W {
336 self.variant(CTYPE_A::CTYPE_3)
337 }
338 #[doc = r"Writes raw bits to the field"]
339 #[inline(always)]
340 pub fn bits(self, value: u8) -> &'a mut W {
341 self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5);
342 self.w
343 }
344}
345#[doc = "Select resolution of conversions\n\nValue on reset: 0"]
346#[derive(Clone, Copy, Debug, PartialEq)]
347pub enum MODE_A {
348 #[doc = "0: Standard resolution. Single-ended 12-bit conversion; Differential 13-bit conversion with 2's complement output."]
349 MODE_0 = 0,
350 #[doc = "1: High resolution. Single-ended 16-bit conversion; Differential 16-bit conversion with 2's complement output."]
351 MODE_1 = 1,
352}
353impl From<MODE_A> for bool {
354 #[inline(always)]
355 fn from(variant: MODE_A) -> Self {
356 variant as u8 != 0
357 }
358}
359#[doc = "Field `MODE` reader - Select resolution of conversions"]
360pub struct MODE_R(crate::FieldReader<bool, MODE_A>);
361impl MODE_R {
362 #[inline(always)]
363 pub(crate) fn new(bits: bool) -> Self {
364 MODE_R(crate::FieldReader::new(bits))
365 }
366 #[doc = r"Get enumerated values variant"]
367 #[inline(always)]
368 pub fn variant(&self) -> MODE_A {
369 match self.bits {
370 false => MODE_A::MODE_0,
371 true => MODE_A::MODE_1,
372 }
373 }
374 #[doc = "Checks if the value of the field is `MODE_0`"]
375 #[inline(always)]
376 pub fn is_mode_0(&self) -> bool {
377 **self == MODE_A::MODE_0
378 }
379 #[doc = "Checks if the value of the field is `MODE_1`"]
380 #[inline(always)]
381 pub fn is_mode_1(&self) -> bool {
382 **self == MODE_A::MODE_1
383 }
384}
385impl core::ops::Deref for MODE_R {
386 type Target = crate::FieldReader<bool, MODE_A>;
387 #[inline(always)]
388 fn deref(&self) -> &Self::Target {
389 &self.0
390 }
391}
392#[doc = "Field `MODE` writer - Select resolution of conversions"]
393pub struct MODE_W<'a> {
394 w: &'a mut W,
395}
396impl<'a> MODE_W<'a> {
397 #[doc = r"Writes `variant` to the field"]
398 #[inline(always)]
399 pub fn variant(self, variant: MODE_A) -> &'a mut W {
400 self.bit(variant.into())
401 }
402 #[doc = "Standard resolution. Single-ended 12-bit conversion; Differential 13-bit conversion with 2's complement output."]
403 #[inline(always)]
404 pub fn mode_0(self) -> &'a mut W {
405 self.variant(MODE_A::MODE_0)
406 }
407 #[doc = "High resolution. Single-ended 16-bit conversion; Differential 16-bit conversion with 2's complement output."]
408 #[inline(always)]
409 pub fn mode_1(self) -> &'a mut W {
410 self.variant(MODE_A::MODE_1)
411 }
412 #[doc = r"Sets the field bit"]
413 #[inline(always)]
414 pub fn set_bit(self) -> &'a mut W {
415 self.bit(true)
416 }
417 #[doc = r"Clears the field bit"]
418 #[inline(always)]
419 pub fn clear_bit(self) -> &'a mut W {
420 self.bit(false)
421 }
422 #[doc = r"Writes raw bits to the field"]
423 #[inline(always)]
424 pub fn bit(self, value: bool) -> &'a mut W {
425 self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
426 self.w
427 }
428}
429impl R {
430 #[doc = "Bits 0:4 - Input channel select"]
431 #[inline(always)]
432 pub fn adch(&self) -> ADCH_R {
433 ADCH_R::new((self.bits & 0x1f) as u8)
434 }
435 #[doc = "Bits 5:6 - Conversion Type"]
436 #[inline(always)]
437 pub fn ctype(&self) -> CTYPE_R {
438 CTYPE_R::new(((self.bits >> 5) & 0x03) as u8)
439 }
440 #[doc = "Bit 7 - Select resolution of conversions"]
441 #[inline(always)]
442 pub fn mode(&self) -> MODE_R {
443 MODE_R::new(((self.bits >> 7) & 0x01) != 0)
444 }
445}
446impl W {
447 #[doc = "Bits 0:4 - Input channel select"]
448 #[inline(always)]
449 pub fn adch(&mut self) -> ADCH_W {
450 ADCH_W { w: self }
451 }
452 #[doc = "Bits 5:6 - Conversion Type"]
453 #[inline(always)]
454 pub fn ctype(&mut self) -> CTYPE_W {
455 CTYPE_W { w: self }
456 }
457 #[doc = "Bit 7 - Select resolution of conversions"]
458 #[inline(always)]
459 pub fn mode(&mut self) -> MODE_W {
460 MODE_W { w: self }
461 }
462 #[doc = "Writes raw bits to the register."]
463 #[inline(always)]
464 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
465 self.0.bits(bits);
466 self
467 }
468}
469#[doc = "ADC Command Low Buffer Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmdl9](index.html) module"]
470pub struct CMDL9_SPEC;
471impl crate::RegisterSpec for CMDL9_SPEC {
472 type Ux = u32;
473}
474#[doc = "`read()` method returns [cmdl9::R](R) reader structure"]
475impl crate::Readable for CMDL9_SPEC {
476 type Reader = R;
477}
478#[doc = "`write(|w| ..)` method takes [cmdl9::W](W) writer structure"]
479impl crate::Writable for CMDL9_SPEC {
480 type Writer = W;
481}
482#[doc = "`reset()` method sets CMDL9 to value 0"]
483impl crate::Resettable for CMDL9_SPEC {
484 #[inline(always)]
485 fn reset_value() -> Self::Ux {
486 0
487 }
488}