lpc55_hal/peripherals/
rtc.rs

1use crate::{
2    peripherals::syscon::Syscon,
3    raw,
4    typestates::{init_state, ClocksSupport32KhzFroToken},
5};
6use core::time::Duration;
7
8crate::wrap_stateful_peripheral!(Rtc, RTC);
9
10impl<State> Rtc<State> {
11    pub fn enabled(
12        mut self,
13        syscon: &mut Syscon,
14        _token: ClocksSupport32KhzFroToken,
15    ) -> Rtc<init_state::Enabled> {
16        syscon.enable_clock(&mut self.raw);
17        self.raw.ctrl.write(|w| {
18            w.rtc_en()
19                .set_bit()
20                .rtc_subsec_ena()
21                .set_bit()
22                .swreset()
23                .clear_bit()
24                .rtc_osc_pd()
25                .clear_bit()
26        });
27        Rtc {
28            raw: self.raw,
29            _state: init_state::Enabled(()),
30        }
31    }
32
33    pub fn disabled(mut self, syscon: &mut Syscon) -> Rtc<init_state::Disabled> {
34        syscon.disable_clock(&mut self.raw);
35
36        Rtc {
37            raw: self.raw,
38            _state: init_state::Disabled,
39        }
40    }
41}
42
43impl Rtc<init_state::Enabled> {
44    pub fn uptime(&self) -> Duration {
45        let secs = self.raw.count.read().bits() as u64;
46        let ticks_32k = self.raw.subsec.read().bits() as u64;
47        Duration::from_secs(secs) + Duration::from_micros((ticks_32k * 61) / 2)
48    }
49
50    pub fn reset(&mut self) {
51        self.raw.ctrl.write(|w| w.swreset().set_bit());
52        while self.raw.ctrl.read().swreset().is_not_in_reset() {}
53        self.raw.ctrl.write(|w| w.swreset().clear_bit());
54        while self.raw.ctrl.read().swreset().is_in_reset() {}
55        self.raw.ctrl.write(|w| {
56            w.rtc_en()
57                .set_bit()
58                .swreset()
59                .clear_bit()
60                .rtc_osc_pd()
61                .clear_bit()
62        });
63        // After reset:
64        // This bit can only be set after the RTC_ENA bit (bit 7) is set by a previous write operation.
65        self.raw.ctrl.modify(|_, w| w.rtc_subsec_ena().set_bit())
66    }
67}
lpc55_hal/peripherals/rtc.rs

lpc55_hal/peripherals/
rtc.rs
