[][src]Type Definition lpc54606_pac::syscon::SYSTICKCLKDIV

type SYSTICKCLKDIV = Reg<u32, _SYSTICKCLKDIV>;

SYSTICK clock divider

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see systickclkdiv module

Trait Implementations

impl Readable for SYSTICKCLKDIV[src]

read() method returns systickclkdiv::R reader structure

impl ResetValue for SYSTICKCLKDIV[src]

Register SYSTICKCLKDIV reset()'s with value 0x4000_0000

type Type = u32

Register size

impl Writable for SYSTICKCLKDIV[src]

write(|w| ..) method takes systickclkdiv::W writer structure