[−][src]Type Definition lpc54606_pac::syscon::SC1CLKDIV
type SC1CLKDIV = Reg<u32, _SC1CLKDIV>;
Smartcard1 clock divider
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about available fields see sc1clkdiv module
Trait Implementations
impl Readable for SC1CLKDIV
[src]
read()
method returns sc1clkdiv::R reader structure
impl ResetValue for SC1CLKDIV
[src]
Register SC1CLKDIV reset()
's with value 0x4000_0000
impl Writable for SC1CLKDIV
[src]
write(|w| ..)
method takes sc1clkdiv::W writer structure