Type Definition lpc54606_pac::syscon::sdioclkctrl::R

type R = R<u32, SDIOCLKCTRL>;

Reader of register SDIOCLKCTRL

Methods

impl R

pub fn cclk_drv_phase(&self) -> CCLK_DRV_PHASE_R

Bits 0:1 - Programmable delay value by which cclk_in_drv is phase-shifted with regard to cclk_in.

pub fn cclk_sample_phase(&self) -> CCLK_SAMPLE_PHASE_R

Bits 2:3 - Programmable delay value by which cclk_in_sample is delayed with regard to cclk_in.

pub fn phase_active(&self) -> PHASE_ACTIVE_R

Bit 7 - sdio_clk by 2, before feeding into ccl_in, cclk_in_sample, and cclk_in_drv.

pub fn cclk_drv_delay(&self) -> CCLK_DRV_DELAY_R

Bits 16:20 - Programmable delay value by which cclk_in_drv is delayed with regard to cclk_in.

pub fn cclk_drv_delay_active(&self) -> CCLK_DRV_DELAY_ACTIVE_R

Bit 23 - Enables drive delay, as controlled by the CCLK_DRV_DELAY field.

pub fn cclk_sample_delay(&self) -> CCLK_SAMPLE_DELAY_R

Bits 24:28 - Programmable delay value by which cclk_in_sample is delayed with regard to cclk_in.

pub fn cclk_sample_delay_active(&self) -> CCLK_SAMPLE_DELAY_ACTIVE_R

Bit 31 - Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field.