Type Definition lpc54606_pac::syscon::ahbclkctrl0::W

type W = W<u32, AHBCLKCTRL0>;

Writer for register AHBCLKCTRL0

Methods

impl W

pub fn rom(&mut self) -> ROM_W

Bit 1 - Enables the clock for the Boot ROM. 0 = Disable; 1 = Enable.

pub fn sram1(&mut self) -> SRAM1_W

Bit 3 - Enables the clock for SRAM1. 0 = Disable; 1 = Enable.

pub fn sram2(&mut self) -> SRAM2_W

Bit 4 - Enables the clock for SRAM2. 0 = Disable; 1 = Enable.

pub fn sram3(&mut self) -> SRAM3_W

Bit 5 - Enables the clock for SRAM3.

pub fn flash(&mut self) -> FLASH_W

Bit 7 - Enables the clock for the flash controller. 0 = Disable; 1 = Enable. This clock is needed for flash programming, not for flash read.

pub fn fmc(&mut self) -> FMC_W

Bit 8 - Enables the clock for the Flash accelerator. 0 = Disable; 1 = Enable. This clock is needed if the flash is being read.

pub fn eeprom(&mut self) -> EEPROM_W

Bit 9 - Enables the clock for EEPROM.

pub fn spifi(&mut self) -> SPIFI_W

Bit 10 - Enables the clock for the SPIFI. 0 = Disable; 1 = Enable.

pub fn inputmux(&mut self) -> INPUTMUX_W

Bit 11 - Enables the clock for the input muxes. 0 = Disable; 1 = Enable.

pub fn iocon(&mut self) -> IOCON_W

Bit 13 - Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.

pub fn gpio0(&mut self) -> GPIO0_W

Bit 14 - Enables the clock for the GPIO0 port registers. 0 = Disable; 1 = Enable.

pub fn gpio1(&mut self) -> GPIO1_W

Bit 15 - Enables the clock for the GPIO1 port registers. 0 = Disable; 1 = Enable.

pub fn gpio2(&mut self) -> GPIO2_W

Bit 16 - Enables the clock for the GPIO2 port registers.

pub fn gpio3(&mut self) -> GPIO3_W

Bit 17 - Enables the clock for the GPIO3 port registers.

pub fn pint(&mut self) -> PINT_W

Bit 18 - Enables the clock for the pin interrupt block.0 = Disable; 1 = Enable.

pub fn gint(&mut self) -> GINT_W

Bit 19 - Enables the clock for the grouped pin interrupt block. 0 = Disable; 1 = Enable.

pub fn dma(&mut self) -> DMA_W

Bit 20 - Enables the clock for the DMA controller. 0 = Disable; 1 = Enable.

pub fn crc(&mut self) -> CRC_W

Bit 21 - Enables the clock for the CRC engine. 0 = Disable; 1 = Enable.

pub fn wwdt(&mut self) -> WWDT_W

Bit 22 - Enables the clock for the Watchdog Timer. 0 = Disable; 1 = Enable.

pub fn rtc(&mut self) -> RTC_W

Bit 23 - Enables the bus clock for the RTC. 0 = Disable; 1 = Enable.

pub fn adc0(&mut self) -> ADC0_W

Bit 27 - Enables the clock for the ADC0 register interface.