[−][src]Type Definition lpc54606_pac::syscon::ahbclkctrl0::R
type R = R<u32, AHBCLKCTRL0>;
Reader of register AHBCLKCTRL0
Methods
impl R
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pub fn rom(&self) -> ROM_R
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Bit 1 - Enables the clock for the Boot ROM. 0 = Disable; 1 = Enable.
pub fn sram1(&self) -> SRAM1_R
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Bit 3 - Enables the clock for SRAM1. 0 = Disable; 1 = Enable.
pub fn sram2(&self) -> SRAM2_R
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Bit 4 - Enables the clock for SRAM2. 0 = Disable; 1 = Enable.
pub fn sram3(&self) -> SRAM3_R
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Bit 5 - Enables the clock for SRAM3.
pub fn flash(&self) -> FLASH_R
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Bit 7 - Enables the clock for the flash controller. 0 = Disable; 1 = Enable. This clock is needed for flash programming, not for flash read.
pub fn fmc(&self) -> FMC_R
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Bit 8 - Enables the clock for the Flash accelerator. 0 = Disable; 1 = Enable. This clock is needed if the flash is being read.
pub fn eeprom(&self) -> EEPROM_R
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Bit 9 - Enables the clock for EEPROM.
pub fn spifi(&self) -> SPIFI_R
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Bit 10 - Enables the clock for the SPIFI. 0 = Disable; 1 = Enable.
pub fn inputmux(&self) -> INPUTMUX_R
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Bit 11 - Enables the clock for the input muxes. 0 = Disable; 1 = Enable.
pub fn iocon(&self) -> IOCON_R
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Bit 13 - Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.
pub fn gpio0(&self) -> GPIO0_R
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Bit 14 - Enables the clock for the GPIO0 port registers. 0 = Disable; 1 = Enable.
pub fn gpio1(&self) -> GPIO1_R
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Bit 15 - Enables the clock for the GPIO1 port registers. 0 = Disable; 1 = Enable.
pub fn gpio2(&self) -> GPIO2_R
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Bit 16 - Enables the clock for the GPIO2 port registers.
pub fn gpio3(&self) -> GPIO3_R
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Bit 17 - Enables the clock for the GPIO3 port registers.
pub fn pint(&self) -> PINT_R
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Bit 18 - Enables the clock for the pin interrupt block.0 = Disable; 1 = Enable.
pub fn gint(&self) -> GINT_R
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Bit 19 - Enables the clock for the grouped pin interrupt block. 0 = Disable; 1 = Enable.
pub fn dma(&self) -> DMA_R
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Bit 20 - Enables the clock for the DMA controller. 0 = Disable; 1 = Enable.
pub fn crc(&self) -> CRC_R
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Bit 21 - Enables the clock for the CRC engine. 0 = Disable; 1 = Enable.
pub fn wwdt(&self) -> WWDT_R
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Bit 22 - Enables the clock for the Watchdog Timer. 0 = Disable; 1 = Enable.
pub fn rtc(&self) -> RTC_R
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Bit 23 - Enables the bus clock for the RTC. 0 = Disable; 1 = Enable.
pub fn adc0(&self) -> ADC0_R
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Bit 27 - Enables the clock for the ADC0 register interface.