[][src]Type Definition lpc54606_pac::syscon::ahbclkctrl0::R

type R = R<u32, AHBCLKCTRL0>;

Reader of register AHBCLKCTRL0

Methods

impl R[src]

pub fn rom(&self) -> ROM_R[src]

Bit 1 - Enables the clock for the Boot ROM. 0 = Disable; 1 = Enable.

pub fn sram1(&self) -> SRAM1_R[src]

Bit 3 - Enables the clock for SRAM1. 0 = Disable; 1 = Enable.

pub fn sram2(&self) -> SRAM2_R[src]

Bit 4 - Enables the clock for SRAM2. 0 = Disable; 1 = Enable.

pub fn sram3(&self) -> SRAM3_R[src]

Bit 5 - Enables the clock for SRAM3.

pub fn flash(&self) -> FLASH_R[src]

Bit 7 - Enables the clock for the flash controller. 0 = Disable; 1 = Enable. This clock is needed for flash programming, not for flash read.

pub fn fmc(&self) -> FMC_R[src]

Bit 8 - Enables the clock for the Flash accelerator. 0 = Disable; 1 = Enable. This clock is needed if the flash is being read.

pub fn eeprom(&self) -> EEPROM_R[src]

Bit 9 - Enables the clock for EEPROM.

pub fn spifi(&self) -> SPIFI_R[src]

Bit 10 - Enables the clock for the SPIFI. 0 = Disable; 1 = Enable.

pub fn inputmux(&self) -> INPUTMUX_R[src]

Bit 11 - Enables the clock for the input muxes. 0 = Disable; 1 = Enable.

pub fn iocon(&self) -> IOCON_R[src]

Bit 13 - Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.

pub fn gpio0(&self) -> GPIO0_R[src]

Bit 14 - Enables the clock for the GPIO0 port registers. 0 = Disable; 1 = Enable.

pub fn gpio1(&self) -> GPIO1_R[src]

Bit 15 - Enables the clock for the GPIO1 port registers. 0 = Disable; 1 = Enable.

pub fn gpio2(&self) -> GPIO2_R[src]

Bit 16 - Enables the clock for the GPIO2 port registers.

pub fn gpio3(&self) -> GPIO3_R[src]

Bit 17 - Enables the clock for the GPIO3 port registers.

pub fn pint(&self) -> PINT_R[src]

Bit 18 - Enables the clock for the pin interrupt block.0 = Disable; 1 = Enable.

pub fn gint(&self) -> GINT_R[src]

Bit 19 - Enables the clock for the grouped pin interrupt block. 0 = Disable; 1 = Enable.

pub fn dma(&self) -> DMA_R[src]

Bit 20 - Enables the clock for the DMA controller. 0 = Disable; 1 = Enable.

pub fn crc(&self) -> CRC_R[src]

Bit 21 - Enables the clock for the CRC engine. 0 = Disable; 1 = Enable.

pub fn wwdt(&self) -> WWDT_R[src]

Bit 22 - Enables the clock for the Watchdog Timer. 0 = Disable; 1 = Enable.

pub fn rtc(&self) -> RTC_R[src]

Bit 23 - Enables the bus clock for the RTC. 0 = Disable; 1 = Enable.

pub fn adc0(&self) -> ADC0_R[src]

Bit 27 - Enables the clock for the ADC0 register interface.